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AArch64: Use __memcpy_simd on Neoverse N2/V1
Add CPU detection of Neoverse N2 and Neoverse V1, and select __memcpy_simd as the memcpy/memmove ifunc. Reviewed-by: Adhemerval Zanella <adhemerval.zanella@linaro.org>
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@ -41,7 +41,8 @@ libc_ifunc (__libc_memcpy,
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? __memcpy_falkor
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: (IS_THUNDERX2 (midr) || IS_THUNDERX2PA (midr)
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? __memcpy_thunderx2
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: (IS_NEOVERSE_N1 (midr)
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: (IS_NEOVERSE_N1 (midr) || IS_NEOVERSE_N2 (midr)
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|| IS_NEOVERSE_V1 (midr)
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? __memcpy_simd
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: __memcpy_generic)))));
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@ -41,7 +41,8 @@ libc_ifunc (__libc_memmove,
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? __memmove_falkor
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: (IS_THUNDERX2 (midr) || IS_THUNDERX2PA (midr)
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? __memmove_thunderx2
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: (IS_NEOVERSE_N1 (midr)
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: (IS_NEOVERSE_N1 (midr) || IS_NEOVERSE_N2 (midr)
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|| IS_NEOVERSE_V1 (midr)
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? __memmove_simd
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: __memmove_generic)))));
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@ -54,6 +54,10 @@
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&& MIDR_PARTNUM(midr) == 0x000)
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#define IS_NEOVERSE_N1(midr) (MIDR_IMPLEMENTOR(midr) == 'A' \
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&& MIDR_PARTNUM(midr) == 0xd0c)
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#define IS_NEOVERSE_N2(midr) (MIDR_IMPLEMENTOR(midr) == 'A' \
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&& MIDR_PARTNUM(midr) == 0xd49)
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#define IS_NEOVERSE_V1(midr) (MIDR_IMPLEMENTOR(midr) == 'A' \
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&& MIDR_PARTNUM(midr) == 0xd40)
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#define IS_EMAG(midr) (MIDR_IMPLEMENTOR(midr) == 'P' \
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&& MIDR_PARTNUM(midr) == 0x000)
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