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Workaround R10K ll/sc errata.
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@ -1,3 +1,7 @@
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2011-08-02 Matt Turner <mattst88@gmail.com>
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* sysdeps/mips/bits/atomic.h: Workaround R10K ll/sc errata.
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2011-07-25 Joseph Myers <joseph@codesourcery.com>
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2011-07-25 Joseph Myers <joseph@codesourcery.com>
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* sysdeps/unix/sysv/linux/mips/bits/socket.h (PF_NFC, AF_NFC):
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* sysdeps/unix/sysv/linux/mips/bits/socket.h (PF_NFC, AF_NFC):
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@ -49,6 +49,32 @@ typedef uintmax_t uatomic_max_t;
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# define MIPS_SYNC sync
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# define MIPS_SYNC sync
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#endif
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#endif
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/* Certain revisions of the R10000 Processor need an LL/SC Workaround
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enabled. Revisions before 3.0 misbehave on atomic operations, and
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Revs 2.6 and lower deadlock after several seconds due to other errata.
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To quote the R10K Errata:
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Workaround: The basic idea is to inhibit the four instructions
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from simultaneously becoming active in R10000. Padding all
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ll/sc sequences with nops or changing the looping branch in the
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routines to a branch likely (which is always predicted taken
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by R10000) will work. The nops should go after the loop, and the
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number of them should be 28. This number could be decremented for
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each additional instruction in the ll/sc loop such as the lock
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modifier(s) between the ll and sc, the looping branch and its
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delay slot. For typical short routines with one ll/sc loop, any
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instructions after the loop could also count as a decrement. The
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nop workaround pollutes the cache more but would be a few cycles
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faster if all the code is in the cache and the looping branch
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is predicted not taken. */
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#ifdef _MIPS_ARCH_R10000
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#define R10K_BEQZ_INSN "beqzl"
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#else
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#define R10K_BEQZ_INSN "beqz"
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#endif
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#define MIPS_SYNC_STR_2(X) #X
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#define MIPS_SYNC_STR_2(X) #X
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#define MIPS_SYNC_STR_1(X) MIPS_SYNC_STR_2(X)
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#define MIPS_SYNC_STR_1(X) MIPS_SYNC_STR_2(X)
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#define MIPS_SYNC_STR MIPS_SYNC_STR_1(MIPS_SYNC)
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#define MIPS_SYNC_STR MIPS_SYNC_STR_1(MIPS_SYNC)
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@ -74,7 +100,7 @@ typedef uintmax_t uatomic_max_t;
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"bne %0,%3,2f\n\t" \
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"bne %0,%3,2f\n\t" \
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"move %1,%4\n\t" \
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"move %1,%4\n\t" \
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"sc %1,%2\n\t" \
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"sc %1,%2\n\t" \
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"beqz %1,1b\n" \
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R10K_BEQZ_INSN" %1,1b\n" \
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acq "\n\t" \
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acq "\n\t" \
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".set pop\n" \
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".set pop\n" \
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"2:\n\t" \
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"2:\n\t" \
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@ -98,7 +124,7 @@ typedef uintmax_t uatomic_max_t;
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"bne %0,%3,2f\n\t" \
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"bne %0,%3,2f\n\t" \
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"move %1,%4\n\t" \
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"move %1,%4\n\t" \
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"scd %1,%2\n\t" \
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"scd %1,%2\n\t" \
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"beqz %1,1b\n" \
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R10K_BEQZ_INSN" %1,1b\n" \
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acq "\n\t" \
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acq "\n\t" \
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".set pop\n" \
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".set pop\n" \
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"2:\n\t" \
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"2:\n\t" \
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@ -192,7 +218,7 @@ typedef uintmax_t uatomic_max_t;
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"ll %0,%4\n\t" \
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"ll %0,%4\n\t" \
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"move %1,%3\n\t" \
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"move %1,%3\n\t" \
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"sc %1,%2\n\t" \
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"sc %1,%2\n\t" \
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"beqz %1,1b\n" \
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R10K_BEQZ_INSN" %1,1b\n" \
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acq "\n\t" \
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acq "\n\t" \
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".set pop\n" \
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".set pop\n" \
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"2:\n\t" \
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"2:\n\t" \
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@ -216,7 +242,7 @@ typedef uintmax_t uatomic_max_t;
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"lld %0,%4\n\t" \
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"lld %0,%4\n\t" \
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"move %1,%3\n\t" \
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"move %1,%3\n\t" \
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"scd %1,%2\n\t" \
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"scd %1,%2\n\t" \
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"beqz %1,1b\n" \
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R10K_BEQZ_INSN" %1,1b\n" \
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acq "\n\t" \
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acq "\n\t" \
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".set pop\n" \
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".set pop\n" \
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"2:\n\t" \
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"2:\n\t" \
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@ -251,7 +277,7 @@ typedef uintmax_t uatomic_max_t;
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"ll %0,%4\n\t" \
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"ll %0,%4\n\t" \
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"addu %1,%0,%3\n\t" \
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"addu %1,%0,%3\n\t" \
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"sc %1,%2\n\t" \
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"sc %1,%2\n\t" \
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"beqz %1,1b\n" \
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R10K_BEQZ_INSN" %1,1b\n" \
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acq "\n\t" \
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acq "\n\t" \
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".set pop\n" \
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".set pop\n" \
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"2:\n\t" \
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"2:\n\t" \
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@ -275,7 +301,7 @@ typedef uintmax_t uatomic_max_t;
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"lld %0,%4\n\t" \
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"lld %0,%4\n\t" \
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"daddu %1,%0,%3\n\t" \
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"daddu %1,%0,%3\n\t" \
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"scd %1,%2\n\t" \
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"scd %1,%2\n\t" \
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"beqz %1,1b\n" \
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R10K_BEQZ_INSN" %1,1b\n" \
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acq "\n\t" \
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acq "\n\t" \
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".set pop\n" \
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".set pop\n" \
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"2:\n\t" \
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"2:\n\t" \
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