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x86_64: Fix svml_s_log10f8_core_avx2.S code formatting
This commit contains following formatting changes 1. Instructions proceeded by a tab. 2. Instruction less than 8 characters in length have a tab between it and the first operand. 3. Instruction greater than 7 characters in length have a space between it and the first operand. 4. Tabs after `#define`d names and their value. 5. 8 space at the beginning of line replaced by tab. 6. Indent comments with code. 7. Remove redundent .text section. 8. 1 space between line content and line comment. 9. Space after all commas. Reviewed-by: Noah Goldstein <goldstein.w.n@gmail.com>
This commit is contained in:
Sunil K Pandey
parent
fda62f29aa
commit
eb20f196bb
@ -29,215 +29,214 @@
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/* Offsets for data table __svml_slog10_data_internal
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*/
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#define MinNorm 0
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#define MaxNorm 32
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#define L2H 64
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#define L2L 96
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#define iBrkValue 128
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#define iOffExpoMask 160
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#define One 192
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#define sPoly 224
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#define L2 512
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#define MinNorm 0
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#define MaxNorm 32
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#define L2H 64
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#define L2L 96
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#define iBrkValue 128
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#define iOffExpoMask 160
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#define One 192
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#define sPoly 224
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#define L2 512
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#include <sysdep.h>
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.text
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.section .text.avx2,"ax",@progbits
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.section .text.avx2, "ax", @progbits
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ENTRY(_ZGVdN8v_log10f_avx2)
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pushq %rbp
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cfi_def_cfa_offset(16)
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movq %rsp, %rbp
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cfi_def_cfa(6, 16)
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cfi_offset(6, -16)
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andq $-32, %rsp
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subq $96, %rsp
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pushq %rbp
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cfi_def_cfa_offset(16)
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movq %rsp, %rbp
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cfi_def_cfa(6, 16)
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cfi_offset(6, -16)
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andq $-32, %rsp
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subq $96, %rsp
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/* reduction: compute r,n */
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vmovups iBrkValue+__svml_slog10_data_internal(%rip), %ymm4
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vmovups sPoly+__svml_slog10_data_internal(%rip), %ymm15
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vmovups sPoly+64+__svml_slog10_data_internal(%rip), %ymm9
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vmovups sPoly+128+__svml_slog10_data_internal(%rip), %ymm10
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vmovups sPoly+192+__svml_slog10_data_internal(%rip), %ymm12
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vpsubd %ymm4, %ymm0, %ymm1
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vcmplt_oqps MinNorm+__svml_slog10_data_internal(%rip), %ymm0, %ymm5
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vcmpnle_uqps MaxNorm+__svml_slog10_data_internal(%rip), %ymm0, %ymm6
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vpand iOffExpoMask+__svml_slog10_data_internal(%rip), %ymm1, %ymm3
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vpsrad $23, %ymm1, %ymm2
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vpaddd %ymm4, %ymm3, %ymm8
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vcvtdq2ps %ymm2, %ymm1
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vsubps One+__svml_slog10_data_internal(%rip), %ymm8, %ymm13
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vmulps L2L+__svml_slog10_data_internal(%rip), %ymm1, %ymm14
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vfmadd213ps sPoly+32+__svml_slog10_data_internal(%rip), %ymm13, %ymm15
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vfmadd213ps sPoly+96+__svml_slog10_data_internal(%rip), %ymm13, %ymm9
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vmulps %ymm13, %ymm13, %ymm11
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vfmadd213ps sPoly+160+__svml_slog10_data_internal(%rip), %ymm13, %ymm10
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vfmadd213ps sPoly+224+__svml_slog10_data_internal(%rip), %ymm13, %ymm12
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vfmadd213ps %ymm9, %ymm11, %ymm15
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vfmadd213ps %ymm10, %ymm11, %ymm15
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vfmadd213ps %ymm12, %ymm11, %ymm15
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vfmadd213ps sPoly+256+__svml_slog10_data_internal(%rip), %ymm13, %ymm15
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vfmadd213ps %ymm14, %ymm13, %ymm15
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vorps %ymm6, %ymm5, %ymm7
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/* reduction: compute r, n */
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vmovups iBrkValue+__svml_slog10_data_internal(%rip), %ymm4
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vmovups sPoly+__svml_slog10_data_internal(%rip), %ymm15
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vmovups sPoly+64+__svml_slog10_data_internal(%rip), %ymm9
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vmovups sPoly+128+__svml_slog10_data_internal(%rip), %ymm10
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vmovups sPoly+192+__svml_slog10_data_internal(%rip), %ymm12
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vpsubd %ymm4, %ymm0, %ymm1
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vcmplt_oqps MinNorm+__svml_slog10_data_internal(%rip), %ymm0, %ymm5
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vcmpnle_uqps MaxNorm+__svml_slog10_data_internal(%rip), %ymm0, %ymm6
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vpand iOffExpoMask+__svml_slog10_data_internal(%rip), %ymm1, %ymm3
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vpsrad $23, %ymm1, %ymm2
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vpaddd %ymm4, %ymm3, %ymm8
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vcvtdq2ps %ymm2, %ymm1
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vsubps One+__svml_slog10_data_internal(%rip), %ymm8, %ymm13
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vmulps L2L+__svml_slog10_data_internal(%rip), %ymm1, %ymm14
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vfmadd213ps sPoly+32+__svml_slog10_data_internal(%rip), %ymm13, %ymm15
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vfmadd213ps sPoly+96+__svml_slog10_data_internal(%rip), %ymm13, %ymm9
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vmulps %ymm13, %ymm13, %ymm11
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vfmadd213ps sPoly+160+__svml_slog10_data_internal(%rip), %ymm13, %ymm10
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vfmadd213ps sPoly+224+__svml_slog10_data_internal(%rip), %ymm13, %ymm12
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vfmadd213ps %ymm9, %ymm11, %ymm15
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vfmadd213ps %ymm10, %ymm11, %ymm15
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vfmadd213ps %ymm12, %ymm11, %ymm15
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vfmadd213ps sPoly+256+__svml_slog10_data_internal(%rip), %ymm13, %ymm15
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vfmadd213ps %ymm14, %ymm13, %ymm15
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vorps %ymm6, %ymm5, %ymm7
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/* combine and get argument value range mask */
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vmovmskps %ymm7, %edx
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vfmadd132ps L2H+__svml_slog10_data_internal(%rip), %ymm15, %ymm1
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testl %edx, %edx
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/* combine and get argument value range mask */
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vmovmskps %ymm7, %edx
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vfmadd132ps L2H+__svml_slog10_data_internal(%rip), %ymm15, %ymm1
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testl %edx, %edx
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/* Go to special inputs processing branch */
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jne L(SPECIAL_VALUES_BRANCH)
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# LOE rbx r12 r13 r14 r15 edx ymm0 ymm1
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/* Go to special inputs processing branch */
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jne L(SPECIAL_VALUES_BRANCH)
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# LOE rbx r12 r13 r14 r15 edx ymm0 ymm1
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/* Restore registers
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* and exit the function
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*/
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/* Restore registers
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* and exit the function
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*/
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L(EXIT):
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vmovaps %ymm1, %ymm0
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movq %rbp, %rsp
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popq %rbp
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cfi_def_cfa(7, 8)
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cfi_restore(6)
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ret
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cfi_def_cfa(6, 16)
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cfi_offset(6, -16)
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vmovaps %ymm1, %ymm0
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movq %rbp, %rsp
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popq %rbp
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cfi_def_cfa(7, 8)
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cfi_restore(6)
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ret
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cfi_def_cfa(6, 16)
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cfi_offset(6, -16)
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/* Branch to process
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* special inputs
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*/
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/* Branch to process
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* special inputs
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*/
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L(SPECIAL_VALUES_BRANCH):
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vmovups %ymm0, 32(%rsp)
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vmovups %ymm1, 64(%rsp)
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# LOE rbx r12 r13 r14 r15 edx ymm1
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vmovups %ymm0, 32(%rsp)
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vmovups %ymm1, 64(%rsp)
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# LOE rbx r12 r13 r14 r15 edx ymm1
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xorl %eax, %eax
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# LOE rbx r12 r13 r14 r15 eax edx
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xorl %eax, %eax
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# LOE rbx r12 r13 r14 r15 eax edx
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vzeroupper
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movq %r12, 16(%rsp)
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/* DW_CFA_expression: r12 (r12) (DW_OP_lit8; DW_OP_minus; DW_OP_const4s: -32; DW_OP_and; DW_OP_const4s: -80; DW_OP_plus) */
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.cfi_escape 0x10, 0x0c, 0x0e, 0x38, 0x1c, 0x0d, 0xe0, 0xff, 0xff, 0xff, 0x1a, 0x0d, 0xb0, 0xff, 0xff, 0xff, 0x22
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movl %eax, %r12d
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movq %r13, 8(%rsp)
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/* DW_CFA_expression: r13 (r13) (DW_OP_lit8; DW_OP_minus; DW_OP_const4s: -32; DW_OP_and; DW_OP_const4s: -88; DW_OP_plus) */
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.cfi_escape 0x10, 0x0d, 0x0e, 0x38, 0x1c, 0x0d, 0xe0, 0xff, 0xff, 0xff, 0x1a, 0x0d, 0xa8, 0xff, 0xff, 0xff, 0x22
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movl %edx, %r13d
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movq %r14, (%rsp)
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/* DW_CFA_expression: r14 (r14) (DW_OP_lit8; DW_OP_minus; DW_OP_const4s: -32; DW_OP_and; DW_OP_const4s: -96; DW_OP_plus) */
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.cfi_escape 0x10, 0x0e, 0x0e, 0x38, 0x1c, 0x0d, 0xe0, 0xff, 0xff, 0xff, 0x1a, 0x0d, 0xa0, 0xff, 0xff, 0xff, 0x22
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# LOE rbx r15 r12d r13d
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vzeroupper
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movq %r12, 16(%rsp)
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/* DW_CFA_expression: r12 (r12) (DW_OP_lit8; DW_OP_minus; DW_OP_const4s: -32; DW_OP_and; DW_OP_const4s: -80; DW_OP_plus) */
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.cfi_escape 0x10, 0x0c, 0x0e, 0x38, 0x1c, 0x0d, 0xe0, 0xff, 0xff, 0xff, 0x1a, 0x0d, 0xb0, 0xff, 0xff, 0xff, 0x22
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movl %eax, %r12d
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movq %r13, 8(%rsp)
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/* DW_CFA_expression: r13 (r13) (DW_OP_lit8; DW_OP_minus; DW_OP_const4s: -32; DW_OP_and; DW_OP_const4s: -88; DW_OP_plus) */
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.cfi_escape 0x10, 0x0d, 0x0e, 0x38, 0x1c, 0x0d, 0xe0, 0xff, 0xff, 0xff, 0x1a, 0x0d, 0xa8, 0xff, 0xff, 0xff, 0x22
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movl %edx, %r13d
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movq %r14, (%rsp)
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/* DW_CFA_expression: r14 (r14) (DW_OP_lit8; DW_OP_minus; DW_OP_const4s: -32; DW_OP_and; DW_OP_const4s: -96; DW_OP_plus) */
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.cfi_escape 0x10, 0x0e, 0x0e, 0x38, 0x1c, 0x0d, 0xe0, 0xff, 0xff, 0xff, 0x1a, 0x0d, 0xa0, 0xff, 0xff, 0xff, 0x22
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# LOE rbx r15 r12d r13d
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/* Range mask
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* bits check
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*/
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/* Range mask
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* bits check
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*/
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L(RANGEMASK_CHECK):
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btl %r12d, %r13d
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btl %r12d, %r13d
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/* Call scalar math function */
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jc L(SCALAR_MATH_CALL)
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# LOE rbx r15 r12d r13d
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/* Call scalar math function */
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jc L(SCALAR_MATH_CALL)
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# LOE rbx r15 r12d r13d
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/* Special inputs
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* processing loop
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*/
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/* Special inputs
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* processing loop
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*/
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L(SPECIAL_VALUES_LOOP):
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incl %r12d
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cmpl $8, %r12d
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incl %r12d
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cmpl $8, %r12d
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/* Check bits in range mask */
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jl L(RANGEMASK_CHECK)
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# LOE rbx r15 r12d r13d
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/* Check bits in range mask */
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jl L(RANGEMASK_CHECK)
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# LOE rbx r15 r12d r13d
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movq 16(%rsp), %r12
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cfi_restore(12)
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movq 8(%rsp), %r13
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cfi_restore(13)
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movq (%rsp), %r14
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cfi_restore(14)
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vmovups 64(%rsp), %ymm1
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movq 16(%rsp), %r12
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cfi_restore(12)
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movq 8(%rsp), %r13
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cfi_restore(13)
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movq (%rsp), %r14
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cfi_restore(14)
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vmovups 64(%rsp), %ymm1
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/* Go to exit */
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jmp L(EXIT)
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/* DW_CFA_expression: r12 (r12) (DW_OP_lit8; DW_OP_minus; DW_OP_const4s: -32; DW_OP_and; DW_OP_const4s: -80; DW_OP_plus) */
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.cfi_escape 0x10, 0x0c, 0x0e, 0x38, 0x1c, 0x0d, 0xe0, 0xff, 0xff, 0xff, 0x1a, 0x0d, 0xb0, 0xff, 0xff, 0xff, 0x22
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/* DW_CFA_expression: r13 (r13) (DW_OP_lit8; DW_OP_minus; DW_OP_const4s: -32; DW_OP_and; DW_OP_const4s: -88; DW_OP_plus) */
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.cfi_escape 0x10, 0x0d, 0x0e, 0x38, 0x1c, 0x0d, 0xe0, 0xff, 0xff, 0xff, 0x1a, 0x0d, 0xa8, 0xff, 0xff, 0xff, 0x22
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/* DW_CFA_expression: r14 (r14) (DW_OP_lit8; DW_OP_minus; DW_OP_const4s: -32; DW_OP_and; DW_OP_const4s: -96; DW_OP_plus) */
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.cfi_escape 0x10, 0x0e, 0x0e, 0x38, 0x1c, 0x0d, 0xe0, 0xff, 0xff, 0xff, 0x1a, 0x0d, 0xa0, 0xff, 0xff, 0xff, 0x22
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# LOE rbx r12 r13 r14 r15 ymm1
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/* Go to exit */
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jmp L(EXIT)
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/* DW_CFA_expression: r12 (r12) (DW_OP_lit8; DW_OP_minus; DW_OP_const4s: -32; DW_OP_and; DW_OP_const4s: -80; DW_OP_plus) */
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.cfi_escape 0x10, 0x0c, 0x0e, 0x38, 0x1c, 0x0d, 0xe0, 0xff, 0xff, 0xff, 0x1a, 0x0d, 0xb0, 0xff, 0xff, 0xff, 0x22
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/* DW_CFA_expression: r13 (r13) (DW_OP_lit8; DW_OP_minus; DW_OP_const4s: -32; DW_OP_and; DW_OP_const4s: -88; DW_OP_plus) */
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.cfi_escape 0x10, 0x0d, 0x0e, 0x38, 0x1c, 0x0d, 0xe0, 0xff, 0xff, 0xff, 0x1a, 0x0d, 0xa8, 0xff, 0xff, 0xff, 0x22
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/* DW_CFA_expression: r14 (r14) (DW_OP_lit8; DW_OP_minus; DW_OP_const4s: -32; DW_OP_and; DW_OP_const4s: -96; DW_OP_plus) */
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.cfi_escape 0x10, 0x0e, 0x0e, 0x38, 0x1c, 0x0d, 0xe0, 0xff, 0xff, 0xff, 0x1a, 0x0d, 0xa0, 0xff, 0xff, 0xff, 0x22
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# LOE rbx r12 r13 r14 r15 ymm1
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/* Scalar math fucntion call
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* to process special input
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*/
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/* Scalar math fucntion call
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* to process special input
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*/
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L(SCALAR_MATH_CALL):
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movl %r12d, %r14d
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movss 32(%rsp,%r14,4), %xmm0
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call log10f@PLT
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# LOE rbx r14 r15 r12d r13d xmm0
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movl %r12d, %r14d
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movss 32(%rsp, %r14, 4), %xmm0
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call log10f@PLT
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# LOE rbx r14 r15 r12d r13d xmm0
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movss %xmm0, 64(%rsp,%r14,4)
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movss %xmm0, 64(%rsp, %r14, 4)
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/* Process special inputs in loop */
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jmp L(SPECIAL_VALUES_LOOP)
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# LOE rbx r15 r12d r13d
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/* Process special inputs in loop */
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jmp L(SPECIAL_VALUES_LOOP)
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# LOE rbx r15 r12d r13d
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END(_ZGVdN8v_log10f_avx2)
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.section .rodata, "a"
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.align 32
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.section .rodata, "a"
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.align 32
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#ifdef __svml_slog10_data_internal_typedef
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typedef unsigned int VUINT32;
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typedef struct {
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__declspec(align(32)) VUINT32 MinNorm[8][1];
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__declspec(align(32)) VUINT32 MaxNorm[8][1];
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__declspec(align(32)) VUINT32 L2H[8][1];
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__declspec(align(32)) VUINT32 L2L[8][1];
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__declspec(align(32)) VUINT32 iBrkValue[8][1];
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__declspec(align(32)) VUINT32 iOffExpoMask[8][1];
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__declspec(align(32)) VUINT32 One[8][1];
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__declspec(align(32)) VUINT32 sPoly[9][8][1];
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__declspec(align(32)) VUINT32 L2[8][1];
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__declspec(align(32)) VUINT32 MinNorm[8][1];
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__declspec(align(32)) VUINT32 MaxNorm[8][1];
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__declspec(align(32)) VUINT32 L2H[8][1];
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__declspec(align(32)) VUINT32 L2L[8][1];
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__declspec(align(32)) VUINT32 iBrkValue[8][1];
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__declspec(align(32)) VUINT32 iOffExpoMask[8][1];
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__declspec(align(32)) VUINT32 One[8][1];
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__declspec(align(32)) VUINT32 sPoly[9][8][1];
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__declspec(align(32)) VUINT32 L2[8][1];
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} __svml_slog10_data_internal;
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#endif
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__svml_slog10_data_internal:
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/*== MinNorm ==*/
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.long 0x00800000, 0x00800000, 0x00800000, 0x00800000, 0x00800000, 0x00800000, 0x00800000, 0x00800000
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/*== MaxNorm ==*/
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.align 32
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.long 0x7f7fffff, 0x7f7fffff, 0x7f7fffff, 0x7f7fffff, 0x7f7fffff, 0x7f7fffff, 0x7f7fffff, 0x7f7fffff
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/*== L2H ==*/
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.align 32
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.long 0x3e9a2100, 0x3e9a2100, 0x3e9a2100, 0x3e9a2100, 0x3e9a2100, 0x3e9a2100, 0x3e9a2100, 0x3e9a2100
|
||||
/*== L2L ==*/
|
||||
.align 32
|
||||
.long 0xb64AF600, 0xb64AF600, 0xb64AF600, 0xb64AF600, 0xb64AF600, 0xb64AF600, 0xb64AF600, 0xb64AF600
|
||||
/*== iBrkValue = SP 2/3 ==*/
|
||||
.align 32
|
||||
.long 0x3f2aaaab, 0x3f2aaaab, 0x3f2aaaab, 0x3f2aaaab, 0x3f2aaaab, 0x3f2aaaab, 0x3f2aaaab, 0x3f2aaaab
|
||||
/*== iOffExpoMask = SP significand mask ==*/
|
||||
.align 32
|
||||
.long 0x007fffff, 0x007fffff, 0x007fffff, 0x007fffff, 0x007fffff, 0x007fffff, 0x007fffff, 0x007fffff
|
||||
/*== sOne = SP 1.0 ==*/
|
||||
.align 32
|
||||
.long 0x3f800000, 0x3f800000, 0x3f800000, 0x3f800000, 0x3f800000, 0x3f800000, 0x3f800000, 0x3f800000
|
||||
/*== spoly[9] ==*/
|
||||
.align 32
|
||||
.long 0x3d8063B4, 0x3d8063B4, 0x3d8063B4, 0x3d8063B4, 0x3d8063B4, 0x3d8063B4, 0x3d8063B4, 0x3d8063B4 /* coeff9 */
|
||||
.long 0xbd890073, 0xbd890073, 0xbd890073, 0xbd890073, 0xbd890073, 0xbd890073, 0xbd890073, 0xbd890073 /* coeff8 */
|
||||
.long 0x3d775317, 0x3d775317, 0x3d775317, 0x3d775317, 0x3d775317, 0x3d775317, 0x3d775317, 0x3d775317 /* coeff7 */
|
||||
.long 0xbd91FB27, 0xbd91FB27, 0xbd91FB27, 0xbd91FB27, 0xbd91FB27, 0xbd91FB27, 0xbd91FB27, 0xbd91FB27 /* coeff6 */
|
||||
.long 0x3dB20B96, 0x3dB20B96, 0x3dB20B96, 0x3dB20B96, 0x3dB20B96, 0x3dB20B96, 0x3dB20B96, 0x3dB20B96 /* coeff5 */
|
||||
.long 0xbdDE6E20, 0xbdDE6E20, 0xbdDE6E20, 0xbdDE6E20, 0xbdDE6E20, 0xbdDE6E20, 0xbdDE6E20, 0xbdDE6E20 /* coeff4 */
|
||||
.long 0x3e143CE5, 0x3e143CE5, 0x3e143CE5, 0x3e143CE5, 0x3e143CE5, 0x3e143CE5, 0x3e143CE5, 0x3e143CE5 /* coeff3 */
|
||||
.long 0xbe5E5BC5, 0xbe5E5BC5, 0xbe5E5BC5, 0xbe5E5BC5, 0xbe5E5BC5, 0xbe5E5BC5, 0xbe5E5BC5, 0xbe5E5BC5 /* coeff2 */
|
||||
.long 0x3eDE5BD9, 0x3eDE5BD9, 0x3eDE5BD9, 0x3eDE5BD9, 0x3eDE5BD9, 0x3eDE5BD9, 0x3eDE5BD9, 0x3eDE5BD9 /* coeff1 */
|
||||
/*== L2 ==*/
|
||||
.align 32
|
||||
.long 0x3e9a209b, 0x3e9a209b, 0x3e9a209b, 0x3e9a209b, 0x3e9a209b, 0x3e9a209b, 0x3e9a209b, 0x3e9a209b
|
||||
.align 32
|
||||
.type __svml_slog10_data_internal,@object
|
||||
.size __svml_slog10_data_internal,.-__svml_slog10_data_internal
|
||||
/* MinNorm */
|
||||
.long 0x00800000, 0x00800000, 0x00800000, 0x00800000, 0x00800000, 0x00800000, 0x00800000, 0x00800000
|
||||
/* MaxNorm */
|
||||
.align 32
|
||||
.long 0x7f7fffff, 0x7f7fffff, 0x7f7fffff, 0x7f7fffff, 0x7f7fffff, 0x7f7fffff, 0x7f7fffff, 0x7f7fffff
|
||||
/* L2H */
|
||||
.align 32
|
||||
.long 0x3e9a2100, 0x3e9a2100, 0x3e9a2100, 0x3e9a2100, 0x3e9a2100, 0x3e9a2100, 0x3e9a2100, 0x3e9a2100
|
||||
/* L2L */
|
||||
.align 32
|
||||
.long 0xb64AF600, 0xb64AF600, 0xb64AF600, 0xb64AF600, 0xb64AF600, 0xb64AF600, 0xb64AF600, 0xb64AF600
|
||||
/* iBrkValue = SP 2/3 */
|
||||
.align 32
|
||||
.long 0x3f2aaaab, 0x3f2aaaab, 0x3f2aaaab, 0x3f2aaaab, 0x3f2aaaab, 0x3f2aaaab, 0x3f2aaaab, 0x3f2aaaab
|
||||
/* iOffExpoMask = SP significand mask */
|
||||
.align 32
|
||||
.long 0x007fffff, 0x007fffff, 0x007fffff, 0x007fffff, 0x007fffff, 0x007fffff, 0x007fffff, 0x007fffff
|
||||
/* sOne = SP 1.0 */
|
||||
.align 32
|
||||
.long 0x3f800000, 0x3f800000, 0x3f800000, 0x3f800000, 0x3f800000, 0x3f800000, 0x3f800000, 0x3f800000
|
||||
/* spoly[9] */
|
||||
.align 32
|
||||
.long 0x3d8063B4, 0x3d8063B4, 0x3d8063B4, 0x3d8063B4, 0x3d8063B4, 0x3d8063B4, 0x3d8063B4, 0x3d8063B4 /* coeff9 */
|
||||
.long 0xbd890073, 0xbd890073, 0xbd890073, 0xbd890073, 0xbd890073, 0xbd890073, 0xbd890073, 0xbd890073 /* coeff8 */
|
||||
.long 0x3d775317, 0x3d775317, 0x3d775317, 0x3d775317, 0x3d775317, 0x3d775317, 0x3d775317, 0x3d775317 /* coeff7 */
|
||||
.long 0xbd91FB27, 0xbd91FB27, 0xbd91FB27, 0xbd91FB27, 0xbd91FB27, 0xbd91FB27, 0xbd91FB27, 0xbd91FB27 /* coeff6 */
|
||||
.long 0x3dB20B96, 0x3dB20B96, 0x3dB20B96, 0x3dB20B96, 0x3dB20B96, 0x3dB20B96, 0x3dB20B96, 0x3dB20B96 /* coeff5 */
|
||||
.long 0xbdDE6E20, 0xbdDE6E20, 0xbdDE6E20, 0xbdDE6E20, 0xbdDE6E20, 0xbdDE6E20, 0xbdDE6E20, 0xbdDE6E20 /* coeff4 */
|
||||
.long 0x3e143CE5, 0x3e143CE5, 0x3e143CE5, 0x3e143CE5, 0x3e143CE5, 0x3e143CE5, 0x3e143CE5, 0x3e143CE5 /* coeff3 */
|
||||
.long 0xbe5E5BC5, 0xbe5E5BC5, 0xbe5E5BC5, 0xbe5E5BC5, 0xbe5E5BC5, 0xbe5E5BC5, 0xbe5E5BC5, 0xbe5E5BC5 /* coeff2 */
|
||||
.long 0x3eDE5BD9, 0x3eDE5BD9, 0x3eDE5BD9, 0x3eDE5BD9, 0x3eDE5BD9, 0x3eDE5BD9, 0x3eDE5BD9, 0x3eDE5BD9 /* coeff1 */
|
||||
/* L2 */
|
||||
.align 32
|
||||
.long 0x3e9a209b, 0x3e9a209b, 0x3e9a209b, 0x3e9a209b, 0x3e9a209b, 0x3e9a209b, 0x3e9a209b, 0x3e9a209b
|
||||
.align 32
|
||||
.type __svml_slog10_data_internal, @object
|
||||
.size __svml_slog10_data_internal, .-__svml_slog10_data_internal
|
||||
|
||||
Loading…
Reference in New Issue
Block a user