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* sysdeps/x86_64/cacheinfo.c (intel_02_known): Add new descriptors.

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* sysdeps/unix/sysv/linux/i386/sysconf.c (intel_02_known): Likewise.
This commit is contained in:
Ulrich Drepper 2009-02-01 18:13:41 +00:00
parent 00f5df0e73
commit ebc22416e4
3 changed files with 33 additions and 0 deletions
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5
ChangeLog
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@ -1,3 +1,8 @@
2009-02-01 Ulrich Drepper <drepper@redhat.com>
* sysdeps/x86_64/cacheinfo.c (intel_02_known): Add new descriptors.
* sysdeps/unix/sysv/linux/i386/sysconf.c (intel_02_known): Likewise.
2009-01-29 Andrew Stubbs <ams@codesourcery.com> 2009-01-29 Andrew Stubbs <ams@codesourcery.com>
* elf/Makefile (ld.so): Adjust the sed script to insert _begin in to * elf/Makefile (ld.so): Adjust the sed script to insert _begin in to

14
sysdeps/unix/sysv/linux/i386/sysconf.c
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@ -76,8 +76,10 @@ static const struct intel_02_cache_info
{ {
{ 0x06, _SC_LEVEL1_ICACHE_SIZE, 8192, 4, 32 }, { 0x06, _SC_LEVEL1_ICACHE_SIZE, 8192, 4, 32 },
{ 0x08, _SC_LEVEL1_ICACHE_SIZE, 16384, 4, 32 }, { 0x08, _SC_LEVEL1_ICACHE_SIZE, 16384, 4, 32 },
{ 0x09, _SC_LEVEL1_ICACHE_SIZE, 32768, 4, 32 },
{ 0x0a, _SC_LEVEL1_DCACHE_SIZE, 8192, 2, 32 }, { 0x0a, _SC_LEVEL1_DCACHE_SIZE, 8192, 2, 32 },
{ 0x0c, _SC_LEVEL1_DCACHE_SIZE, 16384, 4, 32 }, { 0x0c, _SC_LEVEL1_DCACHE_SIZE, 16384, 4, 32 },
{ 0x0d, _SC_LEVEL1_DCACHE_SIZE, 16384, 4, 64 },
{ 0x22, _SC_LEVEL3_CACHE_SIZE, 524288, 4, 64 }, { 0x22, _SC_LEVEL3_CACHE_SIZE, 524288, 4, 64 },
{ 0x23, _SC_LEVEL3_CACHE_SIZE, 1048576, 8, 64 }, { 0x23, _SC_LEVEL3_CACHE_SIZE, 1048576, 8, 64 },
{ 0x25, _SC_LEVEL3_CACHE_SIZE, 2097152, 8, 64 }, { 0x25, _SC_LEVEL3_CACHE_SIZE, 2097152, 8, 64 },
@ -122,6 +124,18 @@ static const struct intel_02_cache_info
{ 0x85, _SC_LEVEL2_CACHE_SIZE, 2097152, 8, 32 }, { 0x85, _SC_LEVEL2_CACHE_SIZE, 2097152, 8, 32 },
{ 0x86, _SC_LEVEL2_CACHE_SIZE, 524288, 4, 64 }, { 0x86, _SC_LEVEL2_CACHE_SIZE, 524288, 4, 64 },
{ 0x87, _SC_LEVEL2_CACHE_SIZE, 1048576, 8, 64 }, { 0x87, _SC_LEVEL2_CACHE_SIZE, 1048576, 8, 64 },
{ 0xd0, _SC_LEVEL3_CACHE_SIZE, 524288, 4, 64 },
{ 0xd1, _SC_LEVEL3_CACHE_SIZE, 1048576, 4, 64 },
{ 0xd2, _SC_LEVEL3_CACHE_SIZE, 2097152, 4, 64 },
{ 0xd6, _SC_LEVEL3_CACHE_SIZE, 1048576, 8, 64 },
{ 0xd7, _SC_LEVEL3_CACHE_SIZE, 2097152, 8, 64 },
{ 0xd8, _SC_LEVEL3_CACHE_SIZE, 4194304, 8, 64 },
{ 0xdc, _SC_LEVEL3_CACHE_SIZE, 2097152, 12, 64 },
{ 0xdd, _SC_LEVEL3_CACHE_SIZE, 4194304, 12, 64 },
{ 0xde, _SC_LEVEL3_CACHE_SIZE, 8388608, 12, 64 },
{ 0xe3, _SC_LEVEL3_CACHE_SIZE, 2097152, 16, 64 },
{ 0xe3, _SC_LEVEL3_CACHE_SIZE, 4194304, 16, 64 },
{ 0xe4, _SC_LEVEL3_CACHE_SIZE, 8388608, 16, 64 },
}; };
#define nintel_02_known (sizeof (intel_02_known) / sizeof (intel_02_known[0])) #define nintel_02_known (sizeof (intel_02_known) / sizeof (intel_02_known[0]))

14
sysdeps/x86_64/cacheinfo.c
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@ -34,8 +34,10 @@ static const struct intel_02_cache_info
{ {
{ 0x06, _SC_LEVEL1_ICACHE_SIZE, 8192, 4, 32 }, { 0x06, _SC_LEVEL1_ICACHE_SIZE, 8192, 4, 32 },
{ 0x08, _SC_LEVEL1_ICACHE_SIZE, 16384, 4, 32 }, { 0x08, _SC_LEVEL1_ICACHE_SIZE, 16384, 4, 32 },
{ 0x09, _SC_LEVEL1_ICACHE_SIZE, 32768, 4, 32 },
{ 0x0a, _SC_LEVEL1_DCACHE_SIZE, 8192, 2, 32 }, { 0x0a, _SC_LEVEL1_DCACHE_SIZE, 8192, 2, 32 },
{ 0x0c, _SC_LEVEL1_DCACHE_SIZE, 16384, 4, 32 }, { 0x0c, _SC_LEVEL1_DCACHE_SIZE, 16384, 4, 32 },
{ 0x0d, _SC_LEVEL1_DCACHE_SIZE, 16384, 4, 64 },
{ 0x22, _SC_LEVEL3_CACHE_SIZE, 524288, 4, 64 }, { 0x22, _SC_LEVEL3_CACHE_SIZE, 524288, 4, 64 },
{ 0x23, _SC_LEVEL3_CACHE_SIZE, 1048576, 8, 64 }, { 0x23, _SC_LEVEL3_CACHE_SIZE, 1048576, 8, 64 },
{ 0x25, _SC_LEVEL3_CACHE_SIZE, 2097152, 8, 64 }, { 0x25, _SC_LEVEL3_CACHE_SIZE, 2097152, 8, 64 },
@ -80,6 +82,18 @@ static const struct intel_02_cache_info
{ 0x85, _SC_LEVEL2_CACHE_SIZE, 2097152, 8, 32 }, { 0x85, _SC_LEVEL2_CACHE_SIZE, 2097152, 8, 32 },
{ 0x86, _SC_LEVEL2_CACHE_SIZE, 524288, 4, 64 }, { 0x86, _SC_LEVEL2_CACHE_SIZE, 524288, 4, 64 },
{ 0x87, _SC_LEVEL2_CACHE_SIZE, 1048576, 8, 64 }, { 0x87, _SC_LEVEL2_CACHE_SIZE, 1048576, 8, 64 },
{ 0xd0, _SC_LEVEL3_CACHE_SIZE, 524288, 4, 64 },
{ 0xd1, _SC_LEVEL3_CACHE_SIZE, 1048576, 4, 64 },
{ 0xd2, _SC_LEVEL3_CACHE_SIZE, 2097152, 4, 64 },
{ 0xd6, _SC_LEVEL3_CACHE_SIZE, 1048576, 8, 64 },
{ 0xd7, _SC_LEVEL3_CACHE_SIZE, 2097152, 8, 64 },
{ 0xd8, _SC_LEVEL3_CACHE_SIZE, 4194304, 8, 64 },
{ 0xdc, _SC_LEVEL3_CACHE_SIZE, 2097152, 12, 64 },
{ 0xdd, _SC_LEVEL3_CACHE_SIZE, 4194304, 12, 64 },
{ 0xde, _SC_LEVEL3_CACHE_SIZE, 8388608, 12, 64 },
{ 0xe3, _SC_LEVEL3_CACHE_SIZE, 2097152, 16, 64 },
{ 0xe3, _SC_LEVEL3_CACHE_SIZE, 4194304, 16, 64 },
{ 0xe4, _SC_LEVEL3_CACHE_SIZE, 8388608, 16, 64 },
}; };
#define nintel_02_known (sizeof (intel_02_known) / sizeof (intel_02_known [0])) #define nintel_02_known (sizeof (intel_02_known) / sizeof (intel_02_known [0]))