Force 32-bit displacement in memset-vec-unaligned-erms.S

* sysdeps/x86_64/multiarch/memset-vec-unaligned-erms.S: Force
	32-bit displacement to avoid long nop between instructions.
This commit is contained in:
H.J. Lu 2016-04-05 05:21:07 -07:00
parent 696ac77484
commit ec0cac9a1f
2 changed files with 18 additions and 0 deletions

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@ -1,3 +1,8 @@
2016-04-05 H.J. Lu <hongjiu.lu@intel.com>
* sysdeps/x86_64/multiarch/memset-vec-unaligned-erms.S: Force
32-bit displacement to avoid long nop between instructions.
2016-04-05 H.J. Lu <hongjiu.lu@intel.com>
* sysdeps/x86_64/multiarch/memset-sse2-unaligned-erms.S: Add

View File

@ -159,10 +159,23 @@ L(return):
.p2align 4
L(loop_start):
leaq (VEC_SIZE * 4)(%rdi), %rcx
# if VEC_SIZE == 32 || VEC_SIZE == 64
/* Force 32-bit displacement to avoid long nop between
instructions. */
VMOVU.d32 %VEC(0), (%rdi)
# else
VMOVU %VEC(0), (%rdi)
# endif
andq $-(VEC_SIZE * 4), %rcx
# if VEC_SIZE == 32
/* Force 32-bit displacement to avoid long nop between
instructions. */
VMOVU.d32 %VEC(0), -VEC_SIZE(%rdi,%rdx)
VMOVU.d32 %VEC(0), VEC_SIZE(%rdi)
# else
VMOVU %VEC(0), -VEC_SIZE(%rdi,%rdx)
VMOVU %VEC(0), VEC_SIZE(%rdi)
# endif
VMOVU %VEC(0), -(VEC_SIZE * 2)(%rdi,%rdx)
VMOVU %VEC(0), (VEC_SIZE * 2)(%rdi)
VMOVU %VEC(0), -(VEC_SIZE * 3)(%rdi,%rdx)