AuroraMiddleware/glibc
1
0
Fork 0
mirror of https://sourceware.org/git/glibc.git synced 2024-11-05 21:00:05 +00:00
Code Issues Packages Projects Releases Wiki Activity

(atomic_add): Don't allow address register for operand 0.

Browse Source
This commit is contained in:
Andreas Schwab 2001-08-15 13:09:16 +00:00
parent 8444680170
commit ee30b66dd6
1 changed files with 1 additions and 1 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

2
sysdeps/m68k/m68020/atomicity.h
View File

@ -45,7 +45,7 @@ atomic_add (volatile uint32_t *mem, int val)
{ {
/* XXX Use cas here as well? */ /* XXX Use cas here as well? */
__asm__ __volatile__ ("add%.l %0,%1" __asm__ __volatile__ ("add%.l %0,%1"
: : "ir" (val), "m" (*mem) : "memory"); : : "id" (val), "m" (*mem) : "memory");
} }
static inline int static inline int