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aarch64/fpu: Add vector variants of sinh

Browse Source 
Reviewed-by: Szabolcs Nagy <szabolcs.nagy@arm.com>
This commit is contained in:
Joe Ramsay 2024-04-03 12:15:41 +01:00 committed by Szabolcs Nagy
parent 8b67920528
commit eedbbca0bf
16 changed files with 572 additions and 0 deletions
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1
sysdeps/aarch64/fpu/Makefile
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@ -17,6 +17,7 @@ libmvec-supported-funcs = acos \
log1p \
log2 \
sin \
sinh \
tan
float-advsimd-funcs = $(libmvec-supported-funcs)

5
sysdeps/aarch64/fpu/Versions
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@ -104,5 +104,10 @@ libmvec {
_ZGVnN4v_erff;
_ZGVsMxv_erf;
_ZGVsMxv_erff;
_ZGVnN2v_sinh;
_ZGVnN2v_sinhf;
_ZGVnN4v_sinhf;
_ZGVsMxv_sinh;
_ZGVsMxv_sinhf;
}
}

1
sysdeps/aarch64/fpu/advsimd_f32_protos.h
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@ -35,5 +35,6 @@ libmvec_hidden_proto (V_NAME_F1(log1p));
libmvec_hidden_proto (V_NAME_F1(log2));
libmvec_hidden_proto (V_NAME_F1(log));
libmvec_hidden_proto (V_NAME_F1(sin));
libmvec_hidden_proto (V_NAME_F1(sinh));
libmvec_hidden_proto (V_NAME_F1(tan));
libmvec_hidden_proto (V_NAME_F2(atan2));

8
sysdeps/aarch64/fpu/bits/math-vector.h
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@ -105,6 +105,10 @@
# define __DECL_SIMD_sin __DECL_SIMD_aarch64
# undef __DECL_SIMD_sinf
# define __DECL_SIMD_sinf __DECL_SIMD_aarch64
# undef __DECL_SIMD_sinh
# define __DECL_SIMD_sinh __DECL_SIMD_aarch64
# undef __DECL_SIMD_sinhf
# define __DECL_SIMD_sinhf __DECL_SIMD_aarch64
# undef __DECL_SIMD_tan
# define __DECL_SIMD_tan __DECL_SIMD_aarch64
# undef __DECL_SIMD_tanf
@ -154,6 +158,7 @@ __vpcs __f32x4_t _ZGVnN4v_log10f (__f32x4_t);
__vpcs __f32x4_t _ZGVnN4v_log1pf (__f32x4_t);
__vpcs __f32x4_t _ZGVnN4v_log2f (__f32x4_t);
__vpcs __f32x4_t _ZGVnN4v_sinf (__f32x4_t);
__vpcs __f32x4_t _ZGVnN4v_sinhf (__f32x4_t);
__vpcs __f32x4_t _ZGVnN4v_tanf (__f32x4_t);
__vpcs __f64x2_t _ZGVnN2vv_atan2 (__f64x2_t, __f64x2_t);
@ -175,6 +180,7 @@ __vpcs __f64x2_t _ZGVnN2v_log10 (__f64x2_t);
__vpcs __f64x2_t _ZGVnN2v_log1p (__f64x2_t);
__vpcs __f64x2_t _ZGVnN2v_log2 (__f64x2_t);
__vpcs __f64x2_t _ZGVnN2v_sin (__f64x2_t);
__vpcs __f64x2_t _ZGVnN2v_sinh (__f64x2_t);
__vpcs __f64x2_t _ZGVnN2v_tan (__f64x2_t);
# undef __ADVSIMD_VEC_MATH_SUPPORTED
@ -201,6 +207,7 @@ __sv_f32_t _ZGVsMxv_log10f (__sv_f32_t, __sv_bool_t);
__sv_f32_t _ZGVsMxv_log1pf (__sv_f32_t, __sv_bool_t);
__sv_f32_t _ZGVsMxv_log2f (__sv_f32_t, __sv_bool_t);
__sv_f32_t _ZGVsMxv_sinf (__sv_f32_t, __sv_bool_t);
__sv_f32_t _ZGVsMxv_sinhf (__sv_f32_t, __sv_bool_t);
__sv_f32_t _ZGVsMxv_tanf (__sv_f32_t, __sv_bool_t);
__sv_f64_t _ZGVsMxvv_atan2 (__sv_f64_t, __sv_f64_t, __sv_bool_t);
@ -222,6 +229,7 @@ __sv_f64_t _ZGVsMxv_log10 (__sv_f64_t, __sv_bool_t);
__sv_f64_t _ZGVsMxv_log1p (__sv_f64_t, __sv_bool_t);
__sv_f64_t _ZGVsMxv_log2 (__sv_f64_t, __sv_bool_t);
__sv_f64_t _ZGVsMxv_sin (__sv_f64_t, __sv_bool_t);
__sv_f64_t _ZGVsMxv_sinh (__sv_f64_t, __sv_bool_t);
__sv_f64_t _ZGVsMxv_tan (__sv_f64_t, __sv_bool_t);
# undef __SVE_VEC_MATH_SUPPORTED

121
sysdeps/aarch64/fpu/sinh_advsimd.c Normal file
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@ -0,0 +1,121 @@
/* Double-precision vector (Advanced SIMD) sinh function
Copyright (C) 2024 Free Software Foundation, Inc.
This file is part of the GNU C Library.
The GNU C Library is free software; you can redistribute it and/or
modify it under the terms of the GNU Lesser General Public
License as published by the Free Software Foundation; either
version 2.1 of the License, or (at your option) any later version.
The GNU C Library is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
Lesser General Public License for more details.
You should have received a copy of the GNU Lesser General Public
License along with the GNU C Library; if not, see
<https://www.gnu.org/licenses/>. */
#include "v_math.h"
#include "poly_advsimd_f64.h"
static const struct data
{
float64x2_t poly[11];
float64x2_t inv_ln2, m_ln2, shift;
uint64x2_t halff;
int64x2_t onef;
#if WANT_SIMD_EXCEPT
uint64x2_t tiny_bound, thresh;
#else
uint64x2_t large_bound;
#endif
} data = {
/* Generated using Remez, deg=12 in [-log(2)/2, log(2)/2]. */
.poly = { V2 (0x1p-1), V2 (0x1.5555555555559p-3), V2 (0x1.555555555554bp-5),
V2 (0x1.111111110f663p-7), V2 (0x1.6c16c16c1b5f3p-10),
V2 (0x1.a01a01affa35dp-13), V2 (0x1.a01a018b4ecbbp-16),
V2 (0x1.71ddf82db5bb4p-19), V2 (0x1.27e517fc0d54bp-22),
V2 (0x1.af5eedae67435p-26), V2 (0x1.1f143d060a28ap-29), },
.inv_ln2 = V2 (0x1.71547652b82fep0),
.m_ln2 = (float64x2_t) {-0x1.62e42fefa39efp-1, -0x1.abc9e3b39803fp-56},
.shift = V2 (0x1.8p52),
.halff = V2 (0x3fe0000000000000),
.onef = V2 (0x3ff0000000000000),
#if WANT_SIMD_EXCEPT
/* 2^-26, below which sinh(x) rounds to x. */
.tiny_bound = V2 (0x3e50000000000000),
/* asuint(large_bound) - asuint(tiny_bound). */
.thresh = V2 (0x0230000000000000),
#else
/* 2^9. expm1 helper overflows for large input. */
.large_bound = V2 (0x4080000000000000),
#endif
};
static inline float64x2_t
expm1_inline (float64x2_t x)
{
const struct data *d = ptr_barrier (&data);
/* Reduce argument:
exp(x) - 1 = 2^i * (expm1(f) + 1) - 1
where i = round(x / ln2)
and f = x - i * ln2 (f in [-ln2/2, ln2/2]). */
float64x2_t j = vsubq_f64 (vfmaq_f64 (d->shift, d->inv_ln2, x), d->shift);
int64x2_t i = vcvtq_s64_f64 (j);
float64x2_t f = vfmaq_laneq_f64 (x, j, d->m_ln2, 0);
f = vfmaq_laneq_f64 (f, j, d->m_ln2, 1);
/* Approximate expm1(f) using polynomial. */
float64x2_t f2 = vmulq_f64 (f, f);
float64x2_t f4 = vmulq_f64 (f2, f2);
float64x2_t f8 = vmulq_f64 (f4, f4);
float64x2_t p = vfmaq_f64 (f, f2, v_estrin_10_f64 (f, f2, f4, f8, d->poly));
/* t = 2^i. */
float64x2_t t = vreinterpretq_f64_u64 (
vreinterpretq_u64_s64 (vaddq_s64 (vshlq_n_s64 (i, 52), d->onef)));
/* expm1(x) ~= p * t + (t - 1). */
return vfmaq_f64 (vsubq_f64 (t, v_f64 (1.0)), p, t);
}
static float64x2_t NOINLINE VPCS_ATTR
special_case (float64x2_t x)
{
return v_call_f64 (sinh, x, x, v_u64 (-1));
}
/* Approximation for vector double-precision sinh(x) using expm1.
sinh(x) = (exp(x) - exp(-x)) / 2.
The greatest observed error is 2.57 ULP:
_ZGVnN2v_sinh (0x1.9fb1d49d1d58bp-2) got 0x1.ab34e59d678dcp-2
want 0x1.ab34e59d678d9p-2. */
float64x2_t VPCS_ATTR V_NAME_D1 (sinh) (float64x2_t x)
{
const struct data *d = ptr_barrier (&data);
float64x2_t ax = vabsq_f64 (x);
uint64x2_t sign
= veorq_u64 (vreinterpretq_u64_f64 (x), vreinterpretq_u64_f64 (ax));
float64x2_t halfsign = vreinterpretq_f64_u64 (vorrq_u64 (sign, d->halff));
#if WANT_SIMD_EXCEPT
uint64x2_t special = vcgeq_u64 (
vsubq_u64 (vreinterpretq_u64_f64 (ax), d->tiny_bound), d->thresh);
#else
uint64x2_t special = vcgeq_u64 (vreinterpretq_u64_f64 (ax), d->large_bound);
#endif
/* Fall back to scalar variant for all lanes if any of them are special. */
if (__glibc_unlikely (v_any_u64 (special)))
return special_case (x);
/* Up to the point that expm1 overflows, we can use it to calculate sinh
using a slight rearrangement of the definition of sinh. This allows us to
retain acceptable accuracy for very small inputs. */
float64x2_t t = expm1_inline (ax);
t = vaddq_f64 (t, vdivq_f64 (t, vaddq_f64 (t, v_f64 (1.0))));
return vmulq_f64 (t, halfsign);
}

107
sysdeps/aarch64/fpu/sinh_sve.c Normal file
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@ -0,0 +1,107 @@
/* Double-precision vector (SVE) atanh function
Copyright (C) 2024 Free Software Foundation, Inc.
This file is part of the GNU C Library.
The GNU C Library is free software; you can redistribute it and/or
modify it under the terms of the GNU Lesser General Public
License as published by the Free Software Foundation; either
version 2.1 of the License, or (at your option) any later version.
The GNU C Library is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
Lesser General Public License for more details.
You should have received a copy of the GNU Lesser General Public
License along with the GNU C Library; if not, see
<https://www.gnu.org/licenses/>. */
#include "sv_math.h"
#include "poly_sve_f64.h"
static const struct data
{
float64_t poly[11];
float64_t inv_ln2, m_ln2_hi, m_ln2_lo, shift;
uint64_t halff;
int64_t onef;
uint64_t large_bound;
} data = {
/* Generated using Remez, deg=12 in [-log(2)/2, log(2)/2]. */
.poly = { 0x1p-1, 0x1.5555555555559p-3, 0x1.555555555554bp-5,
0x1.111111110f663p-7, 0x1.6c16c16c1b5f3p-10,
0x1.a01a01affa35dp-13, 0x1.a01a018b4ecbbp-16,
0x1.71ddf82db5bb4p-19, 0x1.27e517fc0d54bp-22,
0x1.af5eedae67435p-26, 0x1.1f143d060a28ap-29, },
.inv_ln2 = 0x1.71547652b82fep0,
.m_ln2_hi = -0x1.62e42fefa39efp-1,
.m_ln2_lo = -0x1.abc9e3b39803fp-56,
.shift = 0x1.8p52,
.halff = 0x3fe0000000000000,
.onef = 0x3ff0000000000000,
/* 2^9. expm1 helper overflows for large input. */
.large_bound = 0x4080000000000000,
};
static inline svfloat64_t
expm1_inline (svfloat64_t x, svbool_t pg)
{
const struct data *d = ptr_barrier (&data);
/* Reduce argument:
exp(x) - 1 = 2^i * (expm1(f) + 1) - 1
where i = round(x / ln2)
and f = x - i * ln2 (f in [-ln2/2, ln2/2]). */
svfloat64_t j
= svsub_x (pg, svmla_x (pg, sv_f64 (d->shift), x, d->inv_ln2), d->shift);
svint64_t i = svcvt_s64_x (pg, j);
svfloat64_t f = svmla_x (pg, x, j, d->m_ln2_hi);
f = svmla_x (pg, f, j, d->m_ln2_lo);
/* Approximate expm1(f) using polynomial. */
svfloat64_t f2 = svmul_x (pg, f, f);
svfloat64_t f4 = svmul_x (pg, f2, f2);
svfloat64_t f8 = svmul_x (pg, f4, f4);
svfloat64_t p
= svmla_x (pg, f, f2, sv_estrin_10_f64_x (pg, f, f2, f4, f8, d->poly));
/* t = 2^i. */
svfloat64_t t = svscale_x (pg, sv_f64 (1), i);
/* expm1(x) ~= p * t + (t - 1). */
return svmla_x (pg, svsub_x (pg, t, 1.0), p, t);
}
static svfloat64_t NOINLINE
special_case (svfloat64_t x, svbool_t pg)
{
return sv_call_f64 (sinh, x, x, pg);
}
/* Approximation for SVE double-precision sinh(x) using expm1.
sinh(x) = (exp(x) - exp(-x)) / 2.
The greatest observed error is 2.57 ULP:
_ZGVsMxv_sinh (0x1.a008538399931p-2) got 0x1.ab929fc64bd66p-2
want 0x1.ab929fc64bd63p-2. */
svfloat64_t SV_NAME_D1 (sinh) (svfloat64_t x, svbool_t pg)
{
const struct data *d = ptr_barrier (&data);
svfloat64_t ax = svabs_x (pg, x);
svuint64_t sign
= sveor_x (pg, svreinterpret_u64 (x), svreinterpret_u64 (ax));
svfloat64_t halfsign = svreinterpret_f64 (svorr_x (pg, sign, d->halff));
svbool_t special = svcmpge (pg, svreinterpret_u64 (ax), d->large_bound);
/* Fall back to scalar variant for all lanes if any are special. */
if (__glibc_unlikely (svptest_any (pg, special)))
return special_case (x, pg);
/* Up to the point that expm1 overflows, we can use it to calculate sinh
using a slight rearrangement of the definition of sinh. This allows us to
retain acceptable accuracy for very small inputs. */
svfloat64_t t = expm1_inline (ax, pg);
t = svadd_x (pg, t, svdiv_x (pg, t, svadd_x (pg, t, 1.0)));
return svmul_x (pg, t, halfsign);
}

88
sysdeps/aarch64/fpu/sinhf_advsimd.c Normal file
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@ -0,0 +1,88 @@
/* Single-precision vector (Advanced SIMD) sinh function
Copyright (C) 2024 Free Software Foundation, Inc.
This file is part of the GNU C Library.
The GNU C Library is free software; you can redistribute it and/or
modify it under the terms of the GNU Lesser General Public
License as published by the Free Software Foundation; either
version 2.1 of the License, or (at your option) any later version.
The GNU C Library is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
Lesser General Public License for more details.
You should have received a copy of the GNU Lesser General Public
License along with the GNU C Library; if not, see
<https://www.gnu.org/licenses/>. */
#include "v_math.h"
#include "v_expm1f_inline.h"
static const struct data
{
struct v_expm1f_data expm1f_consts;
uint32x4_t halff;
#if WANT_SIMD_EXCEPT
uint32x4_t tiny_bound, thresh;
#else
uint32x4_t oflow_bound;
#endif
} data = {
.expm1f_consts = V_EXPM1F_DATA,
.halff = V4 (0x3f000000),
#if WANT_SIMD_EXCEPT
/* 0x1.6a09e8p-32, below which expm1f underflows. */
.tiny_bound = V4 (0x2fb504f4),
/* asuint(oflow_bound) - asuint(tiny_bound). */
.thresh = V4 (0x12fbbbb3),
#else
/* 0x1.61814ep+6, above which expm1f helper overflows. */
.oflow_bound = V4 (0x42b0c0a7),
#endif
};
static float32x4_t NOINLINE VPCS_ATTR
special_case (float32x4_t x, float32x4_t y, uint32x4_t special)
{
return v_call_f32 (sinhf, x, y, special);
}
/* Approximation for vector single-precision sinh(x) using expm1.
sinh(x) = (exp(x) - exp(-x)) / 2.
The maximum error is 2.26 ULP:
_ZGVnN4v_sinhf (0x1.e34a9ep-4) got 0x1.e469ep-4
want 0x1.e469e4p-4. */
float32x4_t VPCS_ATTR NOINLINE V_NAME_F1 (sinh) (float32x4_t x)
{
const struct data *d = ptr_barrier (&data);
uint32x4_t ix = vreinterpretq_u32_f32 (x);
float32x4_t ax = vabsq_f32 (x);
uint32x4_t iax = vreinterpretq_u32_f32 (ax);
uint32x4_t sign = veorq_u32 (ix, iax);
float32x4_t halfsign = vreinterpretq_f32_u32 (vorrq_u32 (sign, d->halff));
#if WANT_SIMD_EXCEPT
uint32x4_t special = vcgeq_u32 (vsubq_u32 (iax, d->tiny_bound), d->thresh);
ax = v_zerofy_f32 (ax, special);
#else
uint32x4_t special = vcgeq_u32 (iax, d->oflow_bound);
#endif
/* Up to the point that expm1f overflows, we can use it to calculate sinhf
using a slight rearrangement of the definition of asinh. This allows us
to retain acceptable accuracy for very small inputs. */
float32x4_t t = expm1f_inline (ax, &d->expm1f_consts);
t = vaddq_f32 (t, vdivq_f32 (t, vaddq_f32 (t, v_f32 (1.0))));
/* Fall back to the scalar variant for any lanes that should trigger an
exception. */
if (__glibc_unlikely (v_any_u32 (special)))
return special_case (x, vmulq_f32 (t, halfsign), special);
return vmulq_f32 (t, halfsign);
}
libmvec_hidden_def (V_NAME_F1 (sinh))
HALF_WIDTH_ALIAS_F1 (sinh)

67
sysdeps/aarch64/fpu/sinhf_sve.c Normal file
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@ -0,0 +1,67 @@
/* Single-precision vector (SVE) sinh function
Copyright (C) 2024 Free Software Foundation, Inc.
This file is part of the GNU C Library.
The GNU C Library is free software; you can redistribute it and/or
modify it under the terms of the GNU Lesser General Public
License as published by the Free Software Foundation; either
version 2.1 of the License, or (at your option) any later version.
The GNU C Library is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
Lesser General Public License for more details.
You should have received a copy of the GNU Lesser General Public
License along with the GNU C Library; if not, see
<https://www.gnu.org/licenses/>. */
#include "sv_expm1f_inline.h"
#include "sv_math.h"
static const struct data
{
struct sv_expm1f_data expm1f_consts;
uint32_t halff, large_bound;
} data = {
.expm1f_consts = SV_EXPM1F_DATA,
.halff = 0x3f000000,
/* 0x1.61814ep+6, above which expm1f helper overflows. */
.large_bound = 0x42b0c0a7,
};
static svfloat32_t NOINLINE
special_case (svfloat32_t x, svfloat32_t y, svbool_t pg)
{
return sv_call_f32 (sinhf, x, y, pg);
}
/* Approximation for SVE single-precision sinh(x) using expm1.
sinh(x) = (exp(x) - exp(-x)) / 2.
The maximum error is 2.26 ULP:
_ZGVsMxv_sinhf (0x1.e34a9ep-4) got 0x1.e469ep-4
want 0x1.e469e4p-4. */
svfloat32_t SV_NAME_F1 (sinh) (svfloat32_t x, const svbool_t pg)
{
const struct data *d = ptr_barrier (&data);
svfloat32_t ax = svabs_x (pg, x);
svuint32_t sign
= sveor_x (pg, svreinterpret_u32 (x), svreinterpret_u32 (ax));
svfloat32_t halfsign = svreinterpret_f32 (svorr_x (pg, sign, d->halff));
svbool_t special = svcmpge (pg, svreinterpret_u32 (ax), d->large_bound);
/* Up to the point that expm1f overflows, we can use it to calculate sinhf
using a slight rearrangement of the definition of asinh. This allows us to
retain acceptable accuracy for very small inputs. */
svfloat32_t t = expm1f_inline (ax, pg, &d->expm1f_consts);
t = svadd_x (pg, t, svdiv_x (pg, t, svadd_x (pg, t, 1.0)));
/* Fall back to the scalar variant for any lanes which would cause
expm1f to overflow. */
if (__glibc_unlikely (svptest_any (pg, special)))
return special_case (x, svmul_x (pg, t, halfsign), special);
return svmul_x (pg, t, halfsign);
}

84
sysdeps/aarch64/fpu/sv_expm1f_inline.h Normal file
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@ -0,0 +1,84 @@
/* Single-precision inline helper for vector (SVE) expm1 function
Copyright (C) 2024 Free Software Foundation, Inc.
This file is part of the GNU C Library.
The GNU C Library is free software; you can redistribute it and/or
modify it under the terms of the GNU Lesser General Public
License as published by the Free Software Foundation; either
version 2.1 of the License, or (at your option) any later version.
The GNU C Library is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
Lesser General Public License for more details.
You should have received a copy of the GNU Lesser General Public
License along with the GNU C Library; if not, see
<https://www.gnu.org/licenses/>. */
#ifndef AARCH64_FPU_SV_EXPM1F_INLINE_H
#define AARCH64_FPU_SV_EXPM1F_INLINE_H
#include "sv_math.h"
struct sv_expm1f_data
{
/* These 4 are grouped together so they can be loaded as one quadword, then
used with _lane forms of svmla/svmls. */
float32_t c2, c4, ln2_hi, ln2_lo;
float32_t c0, c1, c3, inv_ln2, shift;
};
/* Coefficients generated using fpminimax. */
#define SV_EXPM1F_DATA \
{ \
.c0 = 0x1.fffffep-2, .c1 = 0x1.5554aep-3, .c2 = 0x1.555736p-5, \
.c3 = 0x1.12287cp-7, .c4 = 0x1.6b55a2p-10, \
\
.shift = 0x1.8p23f, .inv_ln2 = 0x1.715476p+0f, .ln2_hi = 0x1.62e4p-1f, \
.ln2_lo = 0x1.7f7d1cp-20f, \
}
#define C(i) sv_f32 (d->c##i)
static inline svfloat32_t
expm1f_inline (svfloat32_t x, svbool_t pg, const struct sv_expm1f_data *d)
{
/* This vector is reliant on layout of data - it contains constants
that can be used with _lane forms of svmla/svmls. Values are:
[ coeff_2, coeff_4, ln2_hi, ln2_lo ]. */
svfloat32_t lane_constants = svld1rq (svptrue_b32 (), &d->c2);
/* Reduce argument to smaller range:
Let i = round(x / ln2)
and f = x - i * ln2, then f is in [-ln2/2, ln2/2].
exp(x) - 1 = 2^i * (expm1(f) + 1) - 1
where 2^i is exact because i is an integer. */
svfloat32_t j = svmla_x (pg, sv_f32 (d->shift), x, d->inv_ln2);
j = svsub_x (pg, j, d->shift);
svint32_t i = svcvt_s32_x (pg, j);
svfloat32_t f = svmls_lane (x, j, lane_constants, 2);
f = svmls_lane (f, j, lane_constants, 3);
/* Approximate expm1(f) using polynomial.
Taylor expansion for expm1(x) has the form:
x + ax^2 + bx^3 + cx^4 ....
So we calculate the polynomial P(f) = a + bf + cf^2 + ...
and assemble the approximation expm1(f) ~= f + f^2 * P(f). */
svfloat32_t p12 = svmla_lane (C (1), f, lane_constants, 0);
svfloat32_t p34 = svmla_lane (C (3), f, lane_constants, 1);
svfloat32_t f2 = svmul_x (pg, f, f);
svfloat32_t p = svmla_x (pg, p12, f2, p34);
p = svmla_x (pg, C (0), f, p);
p = svmla_x (pg, f, f2, p);
/* Assemble the result.
expm1(x) ~= 2^i * (p + 1) - 1
Let t = 2^i. */
svfloat32_t t = svscale_x (pg, sv_f32 (1), i);
return svmla_x (pg, svsub_x (pg, t, 1), p, t);
}
#endif

1
sysdeps/aarch64/fpu/test-double-advsimd-wrappers.c
View File

@ -42,4 +42,5 @@ VPCS_VECTOR_WRAPPER (log10_advsimd, _ZGVnN2v_log10)
VPCS_VECTOR_WRAPPER (log1p_advsimd, _ZGVnN2v_log1p)
VPCS_VECTOR_WRAPPER (log2_advsimd, _ZGVnN2v_log2)
VPCS_VECTOR_WRAPPER (sin_advsimd, _ZGVnN2v_sin)
VPCS_VECTOR_WRAPPER (sinh_advsimd, _ZGVnN2v_sinh)
VPCS_VECTOR_WRAPPER (tan_advsimd, _ZGVnN2v_tan)

1
sysdeps/aarch64/fpu/test-double-sve-wrappers.c
View File

@ -61,4 +61,5 @@ SVE_VECTOR_WRAPPER (log10_sve, _ZGVsMxv_log10)
SVE_VECTOR_WRAPPER (log1p_sve, _ZGVsMxv_log1p)
SVE_VECTOR_WRAPPER (log2_sve, _ZGVsMxv_log2)
SVE_VECTOR_WRAPPER (sin_sve, _ZGVsMxv_sin)
SVE_VECTOR_WRAPPER (sinh_sve, _ZGVsMxv_sinh)
SVE_VECTOR_WRAPPER (tan_sve, _ZGVsMxv_tan)

1
sysdeps/aarch64/fpu/test-float-advsimd-wrappers.c
View File

@ -42,4 +42,5 @@ VPCS_VECTOR_WRAPPER (log10f_advsimd, _ZGVnN4v_log10f)
VPCS_VECTOR_WRAPPER (log1pf_advsimd, _ZGVnN4v_log1pf)
VPCS_VECTOR_WRAPPER (log2f_advsimd, _ZGVnN4v_log2f)
VPCS_VECTOR_WRAPPER (sinf_advsimd, _ZGVnN4v_sinf)
VPCS_VECTOR_WRAPPER (sinhf_advsimd, _ZGVnN4v_sinhf)
VPCS_VECTOR_WRAPPER (tanf_advsimd, _ZGVnN4v_tanf)

1
sysdeps/aarch64/fpu/test-float-sve-wrappers.c
View File

@ -61,4 +61,5 @@ SVE_VECTOR_WRAPPER (log10f_sve, _ZGVsMxv_log10f)
SVE_VECTOR_WRAPPER (log1pf_sve, _ZGVsMxv_log1pf)
SVE_VECTOR_WRAPPER (log2f_sve, _ZGVsMxv_log2f)
SVE_VECTOR_WRAPPER (sinf_sve, _ZGVsMxv_sinf)
SVE_VECTOR_WRAPPER (sinhf_sve, _ZGVsMxv_sinhf)
SVE_VECTOR_WRAPPER (tanf_sve, _ZGVsMxv_tanf)

73
sysdeps/aarch64/fpu/v_expm1f_inline.h Normal file
View File

@ -0,0 +1,73 @@
/* Single-precision inline helper for vector (Advanced SIMD) expm1 function
Copyright (C) 2024 Free Software Foundation, Inc.
This file is part of the GNU C Library.
The GNU C Library is free software; you can redistribute it and/or
modify it under the terms of the GNU Lesser General Public
License as published by the Free Software Foundation; either
version 2.1 of the License, or (at your option) any later version.
The GNU C Library is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
Lesser General Public License for more details.
You should have received a copy of the GNU Lesser General Public
License along with the GNU C Library; if not, see
<https://www.gnu.org/licenses/>. */
#ifndef AARCH64_FPU_V_EXPM1F_INLINE_H
#define AARCH64_FPU_V_EXPM1F_INLINE_H
#include "v_math.h"
#include "poly_advsimd_f32.h"
struct v_expm1f_data
{
float32x4_t poly[5];
float32x4_t invln2_and_ln2, shift;
int32x4_t exponent_bias;
};
/* Coefficients generated using fpminimax with degree=5 in [-log(2)/2,
log(2)/2]. Exponent bias is asuint(1.0f).
invln2_and_ln2 Stores constants: invln2, ln2_lo, ln2_hi, 0. */
#define V_EXPM1F_DATA \
{ \
.poly = { V4 (0x1.fffffep-2), V4 (0x1.5554aep-3), V4 (0x1.555736p-5), \
V4 (0x1.12287cp-7), V4 (0x1.6b55a2p-10) }, \
.shift = V4 (0x1.8p23f), .exponent_bias = V4 (0x3f800000), \
.invln2_and_ln2 = { 0x1.715476p+0f, 0x1.62e4p-1f, 0x1.7f7d1cp-20f, 0 }, \
}
static inline float32x4_t
expm1f_inline (float32x4_t x, const struct v_expm1f_data *d)
{
/* Helper routine for calculating exp(x) - 1.
Copied from v_expm1f_1u6.c, with all special-case handling removed - the
calling routine should handle special values if required. */
/* Reduce argument: f in [-ln2/2, ln2/2], i is exact. */
float32x4_t j = vsubq_f32 (
vfmaq_laneq_f32 (d->shift, x, d->invln2_and_ln2, 0), d->shift);
int32x4_t i = vcvtq_s32_f32 (j);
float32x4_t f = vfmsq_laneq_f32 (x, j, d->invln2_and_ln2, 1);
f = vfmsq_laneq_f32 (f, j, d->invln2_and_ln2, 2);
/* Approximate expm1(f) with polynomial P, expm1(f) ~= f + f^2 * P(f).
Uses Estrin scheme, where the main _ZGVnN4v_expm1f routine uses
Horner. */
float32x4_t f2 = vmulq_f32 (f, f);
float32x4_t f4 = vmulq_f32 (f2, f2);
float32x4_t p = v_estrin_4_f32 (f, f2, f4, d->poly);
p = vfmaq_f32 (f, f2, p);
/* t = 2^i. */
int32x4_t u = vaddq_s32 (vshlq_n_s32 (i, 23), d->exponent_bias);
float32x4_t t = vreinterpretq_f32_s32 (u);
/* expm1(x) ~= p * t + (t - 1). */
return vfmaq_f32 (vsubq_f32 (t, v_f32 (1.0f)), p, t);
}
#endif

8
sysdeps/aarch64/libm-test-ulps
View File

@ -1441,11 +1441,19 @@ double: 2
float: 2
ldouble: 2
Function: "sinh_advsimd":
double: 2
float: 1
Function: "sinh_downward":
double: 3
float: 3
ldouble: 3
Function: "sinh_sve":
double: 2
float: 1
Function: "sinh_towardzero":
double: 3
float: 2

5
sysdeps/unix/sysv/linux/aarch64/libmvec.abilist
View File

@ -83,11 +83,14 @@ GLIBC_2.40 _ZGVnN2v_cosh F
GLIBC_2.40 _ZGVnN2v_coshf F
GLIBC_2.40 _ZGVnN2v_erf F
GLIBC_2.40 _ZGVnN2v_erff F
GLIBC_2.40 _ZGVnN2v_sinh F
GLIBC_2.40 _ZGVnN2v_sinhf F
GLIBC_2.40 _ZGVnN4v_acoshf F
GLIBC_2.40 _ZGVnN4v_asinhf F
GLIBC_2.40 _ZGVnN4v_atanhf F
GLIBC_2.40 _ZGVnN4v_coshf F
GLIBC_2.40 _ZGVnN4v_erff F
GLIBC_2.40 _ZGVnN4v_sinhf F
GLIBC_2.40 _ZGVsMxv_acosh F
GLIBC_2.40 _ZGVsMxv_acoshf F
GLIBC_2.40 _ZGVsMxv_asinh F
@ -98,3 +101,5 @@ GLIBC_2.40 _ZGVsMxv_cosh F
GLIBC_2.40 _ZGVsMxv_coshf F
GLIBC_2.40 _ZGVsMxv_erf F
GLIBC_2.40 _ZGVsMxv_erff F
GLIBC_2.40 _ZGVsMxv_sinh F
GLIBC_2.40 _ZGVsMxv_sinhf F