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x86_64: Fix svml_d_log1p4_core_avx2.S code formatting

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This commit contains following formatting changes

1. Instructions proceeded by a tab.
2. Instruction less than 8 characters in length have a tab
   between it and the first operand.
3. Instruction greater than 7 characters in length have a
   space between it and the first operand.
4. Tabs after `#define`d names and their value.
5. 8 space at the beginning of line replaced by tab.
6. Indent comments with code.
7. Remove redundent .text section.
8. 1 space between line content and line comment.
9. Space after all commas.

Reviewed-by: Noah Goldstein <goldstein.w.n@gmail.com>
This commit is contained in:
Sunil K Pandey 2022-03-07 10:47:14 -08:00
parent 1025469bf6
commit f2469622f5
1 changed files with 1293 additions and 1294 deletions
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33
sysdeps/x86_64/fpu/multiarch/svml_d_log1p4_core_avx2.S
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@ -53,7 +53,6 @@
#include <sysdep.h>
.text
.section .text.avx2, "ax", @progbits
ENTRY(_ZGVdN4v_log1p_avx2)
pushq %rbp
@ -815,7 +814,7 @@ __svml_dlog1p_data_internal:
.quad 0xc08628b36d39ec08, 0xbe1cf1abc231f7b2
.quad 0xc08628b56dfa36d0, 0xbe1cf2074d5ba303
.quad 0xc08628b76e3a4180, 0xbe1cf05cd5eed880
/*== Log_LA_table ==*/
/* Log_LA_table */
.align 32
.quad 0x8000000000000000
.quad 0xbf5ff802a9ab10e6
@ -1330,52 +1329,52 @@ __svml_dlog1p_data_internal:
.quad 0x3f60040155d5889e
.quad 0x3f50020055655889
.quad 0x0000000000000000
/*== poly_coeff[4] ==*/
/* poly_coeff[4] */
.align 32
.quad 0x3fc9999CACDB4D0A, 0x3fc9999CACDB4D0A, 0x3fc9999CACDB4D0A, 0x3fc9999CACDB4D0A /* coeff4 */
.quad 0xbfd0000148058EE1, 0xbfd0000148058EE1, 0xbfd0000148058EE1, 0xbfd0000148058EE1 /* coeff3 */
.quad 0x3fd55555555543C5, 0x3fd55555555543C5, 0x3fd55555555543C5, 0x3fd55555555543C5 /* coeff2 */
.quad 0xbfdFFFFFFFFFF81F, 0xbfdFFFFFFFFFF81F, 0xbfdFFFFFFFFFF81F, 0xbfdFFFFFFFFFF81F /* coeff1 */
/*== ExpMask ==*/
/* ExpMask */
.align 32
.quad 0x000fffffffffffff, 0x000fffffffffffff, 0x000fffffffffffff, 0x000fffffffffffff
/*== Two10 ==*/
/* Two10 */
.align 32
.quad 0x3f50000000000000, 0x3f50000000000000, 0x3f50000000000000, 0x3f50000000000000
/*== MinLog1p = -1+2^(-53) ==*/
/* MinLog1p = -1+2^(-53) */
.align 32
.quad 0xbfefffffffffffff, 0xbfefffffffffffff, 0xbfefffffffffffff, 0xbfefffffffffffff
/*== MaxLog1p ==*/
/* MaxLog1p */
.align 32
.quad 0x7f3ffffffffff000, 0x7f3ffffffffff000, 0x7f3ffffffffff000, 0x7f3ffffffffff000
/*== One ==*/
/* One */
.align 32
.quad 0x3ff0000000000000, 0x3ff0000000000000, 0x3ff0000000000000, 0x3ff0000000000000
/*== SgnMask ==*/
/* SgnMask */
.align 32
.quad 0x7fffffffffffffff, 0x7fffffffffffffff, 0x7fffffffffffffff, 0x7fffffffffffffff
/*== XThreshold ==*/
/* XThreshold */
.align 32
.quad 0x3e00000000000000, 0x3e00000000000000, 0x3e00000000000000, 0x3e00000000000000
/*== XhMask ==*/
/* XhMask */
.align 32
.quad 0xfffffffffffffc00, 0xfffffffffffffc00, 0xfffffffffffffc00, 0xfffffffffffffc00
/*== Threshold ==*/
/* Threshold */
.align 32
.quad 0x4086a00000000000, 0x4086a00000000000, 0x4086a00000000000, 0x4086a00000000000
/*== Bias ==*/
/* Bias */
.align 32
.quad 0x408ff80000000000, 0x408ff80000000000, 0x408ff80000000000, 0x408ff80000000000
/*== Bias1 ==*/
/* Bias1 */
.align 32
.quad 0x408ff00000000000, 0x408ff00000000000, 0x408ff00000000000, 0x408ff00000000000
/*== ExpMask ==*/
/* ExpMask */
.align 32
.quad 0x7ff0000000000000, 0x7ff0000000000000, 0x7ff0000000000000, 0x7ff0000000000000
/*== ExpMask2 ==*/
/* ExpMask2 */
.align 32
.quad 0x7f40000000000000, 0x7f40000000000000, 0x7f40000000000000, 0x7f40000000000000
/*== L2L ==*/
/* L2L */
.align 32
.quad 0x3fe62E42FEFA39EF, 0x3fe62E42FEFA39EF, 0x3fe62E42FEFA39EF, 0x3fe62E42FEFA39EF
.align 32