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S/390: Get cache information via sysconf
This patch adds support to query cache information on s390 via sysconf() function - e.g. with _SC_LEVEL1_ICACHE_SIZE. The attributes size, linesize and assoc can be queried for cache level 1 - 4 via "extract cpu attribute" instruction, which was first available with z10. * NEWS: Mention sysconf() cache information support for s390. * sysdeps/unix/sysv/linux/s390/sysconf.c: New File.
This commit is contained in:
Stefan Liebler
Andreas Krebbel
parent
92f2897953
commit
f7fba80508
@ -1,3 +1,8 @@
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2015-04-24 Stefan Liebler <stli@linux.vnet.ibm.com>
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* NEWS: Mention sysconf() cache information support for s390.
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* sysdeps/unix/sysv/linux/s390/sysconf.c: New File.
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2015-04-22 Wilco Dijkstra <wdijkstr@arm.com>
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2015-04-22 Wilco Dijkstra <wdijkstr@arm.com>
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* math/k_casinh.c (__kernel_casinh): Use __copysign.
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* math/k_casinh.c (__kernel_casinh): Use __copysign.
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3
NEWS
3
NEWS
@ -18,6 +18,9 @@ Version 2.22
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18080, 18093, 18100, 18104, 18110, 18111, 18128, 18138, 18185, 18197,
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18080, 18093, 18100, 18104, 18110, 18111, 18128, 18138, 18185, 18197,
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18206, 18210, 18211, 18247, 18287.
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18206, 18210, 18211, 18247, 18287.
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* Cache information can be queried via sysconf() function on s390 e.g. with
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_SC_LEVEL1_ICACHE_SIZE as argument.
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* A buffer overflow in gethostbyname_r and related functions performing DNS
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* A buffer overflow in gethostbyname_r and related functions performing DNS
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requests has been fixed. If the NSS functions were called with a
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requests has been fixed. If the NSS functions were called with a
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misaligned buffer, the buffer length change due to pointer alignment was
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misaligned buffer, the buffer length change due to pointer alignment was
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230
sysdeps/unix/sysv/linux/s390/sysconf.c
Normal file
230
sysdeps/unix/sysv/linux/s390/sysconf.c
Normal file
@ -0,0 +1,230 @@
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/* Get system parameters, e.g. cache information. S390/S390x version.
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Copyright (C) 2015 Free Software Foundation, Inc.
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This file is part of the GNU C Library.
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The GNU C Library is free software; you can redistribute it and/or
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modify it under the terms of the GNU Lesser General Public
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License as published by the Free Software Foundation; either
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version 2.1 of the License, or (at your option) any later version.
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The GNU C Library is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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Lesser General Public License for more details.
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You should have received a copy of the GNU Lesser General Public
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License along with the GNU C Library. If not, see
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<http://www.gnu.org/licenses/>. */
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#include <unistd.h>
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#include <dl-procinfo.h>
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static long int linux_sysconf (int name);
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/* Possible arguments for get_cache_info.
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The values are reflecting the level/attribute/type indications
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of ecag-instruction (extract cpu attribue). */
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#define CACHE_LEVEL_MAX 8
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#define CACHE_ATTR_LINESIZE 1
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#define CACHE_ATTR_SIZE 2
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#define CACHE_ATTR_ASSOC 3
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#define CACHE_TYPE_DATA 0
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#define CACHE_TYPE_INSTRUCTION 1
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static long
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get_cache_info (int level, int attr, int type)
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{
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unsigned long int val;
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unsigned int cmd;
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unsigned long int arg;
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/* Check arguments. */
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if (level < 1 || level > CACHE_LEVEL_MAX
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|| attr < CACHE_ATTR_LINESIZE || attr > CACHE_ATTR_ASSOC
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|| type < CACHE_TYPE_DATA || type > CACHE_TYPE_INSTRUCTION)
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return 0L;
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/* Check if ecag-instruction is available.
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ecag - extract CPU attribute (only in zarch; arch >= z10; in as 2.24) */
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if (!(GLRO (dl_hwcap) & HWCAP_S390_STFLE)
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#if !defined __s390x__
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|| !(GLRO (dl_hwcap) & HWCAP_S390_ZARCH)
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|| !(GLRO (dl_hwcap) & HWCAP_S390_HIGH_GPRS)
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#endif /* !__s390x__ */
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)
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{
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/* stfle (or zarch, high-gprs on s390-32) is not available.
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We are on an old machine. Return 256byte for LINESIZE for L1 d/i-cache,
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otherwise 0. */
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if (level == 1 && attr == CACHE_ATTR_LINESIZE)
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return 256L;
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else
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return 0L;
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}
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/* Store facility list and check for z10.
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(see ifunc-resolver for details) */
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register unsigned long reg0 asm("0") = 0;
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#ifdef __s390x__
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unsigned long stfle_bits;
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# define STFLE_Z10_MASK (1UL << (63 - 34))
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#else
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unsigned long long stfle_bits;
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# define STFLE_Z10_MASK (1ULL << (63 - 34))
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#endif /* !__s390x__ */
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asm volatile(".machine push" "\n\t"
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".machinemode \"zarch_nohighgprs\"\n\t"
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".machine \"z9-109\"" "\n\t"
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"stfle %0" "\n\t"
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".machine pop" "\n"
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: "=QS" (stfle_bits), "+d" (reg0)
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: : "cc");
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if (!(stfle_bits & STFLE_Z10_MASK))
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{
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/* We are at least on a z9 machine.
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Return 256byte for LINESIZE for L1 d/i-cache,
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otherwise 0. */
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if (level == 1 && attr == CACHE_ATTR_LINESIZE)
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return 256L;
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else
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return 0L;
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}
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/* Check cache topology, if cache is available at this level. */
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arg = (CACHE_LEVEL_MAX - level) * 8;
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asm volatile (".machine push\n\t"
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".machine \"z10\"\n\t"
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".machinemode \"zarch_nohighgprs\"\n\t"
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"ecag %0,%%r0,0\n\t" /* returns 64bit unsigned integer. */
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"srlg %0,%0,0(%1)\n\t" /* right align 8bit cache info field. */
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".machine pop"
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: "=&d" (val)
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: "a" (arg)
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);
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val &= 0xCUL; /* Extract cache scope information from cache topology summary.
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(bits 4-5 of 8bit-field; 00 means cache does not exist). */
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if (val == 0)
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return 0L;
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/* Get cache information for level, attribute and type. */
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cmd = (attr << 4) | ((level - 1) << 1) | type;
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asm volatile (".machine push\n\t"
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".machine \"z10\"\n\t"
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".machinemode \"zarch_nohighgprs\"\n\t"
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"ecag %0,%%r0,0(%1)\n\t"
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".machine pop"
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: "=d" (val)
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: "a" (cmd)
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);
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return val;
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}
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long int
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__sysconf (int name)
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{
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if (name >= _SC_LEVEL1_ICACHE_SIZE && name <= _SC_LEVEL4_CACHE_LINESIZE)
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{
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int level;
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int attr;
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int type;
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switch (name)
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{
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case _SC_LEVEL1_ICACHE_SIZE:
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level = 1;
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attr = CACHE_ATTR_SIZE;
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type = CACHE_TYPE_INSTRUCTION;
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break;
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case _SC_LEVEL1_ICACHE_ASSOC:
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level = 1;
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attr = CACHE_ATTR_ASSOC;
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type = CACHE_TYPE_INSTRUCTION;
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break;
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case _SC_LEVEL1_ICACHE_LINESIZE:
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level = 1;
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attr = CACHE_ATTR_LINESIZE;
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type = CACHE_TYPE_INSTRUCTION;
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break;
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case _SC_LEVEL1_DCACHE_SIZE:
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level = 1;
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attr = CACHE_ATTR_SIZE;
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type = CACHE_TYPE_DATA;
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break;
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case _SC_LEVEL1_DCACHE_ASSOC:
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level = 1;
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attr = CACHE_ATTR_ASSOC;
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type = CACHE_TYPE_DATA;
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break;
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case _SC_LEVEL1_DCACHE_LINESIZE:
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level = 1;
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attr = CACHE_ATTR_LINESIZE;
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type = CACHE_TYPE_DATA;
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break;
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case _SC_LEVEL2_CACHE_SIZE:
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level = 2;
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attr = CACHE_ATTR_SIZE;
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type = CACHE_TYPE_DATA;
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break;
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case _SC_LEVEL2_CACHE_ASSOC:
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level = 2;
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attr = CACHE_ATTR_ASSOC;
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type = CACHE_TYPE_DATA;
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break;
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case _SC_LEVEL2_CACHE_LINESIZE:
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level = 2;
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attr = CACHE_ATTR_LINESIZE;
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type = CACHE_TYPE_DATA;
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break;
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case _SC_LEVEL3_CACHE_SIZE:
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level = 3;
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attr = CACHE_ATTR_SIZE;
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type = CACHE_TYPE_DATA;
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break;
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case _SC_LEVEL3_CACHE_ASSOC:
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level = 3;
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attr = CACHE_ATTR_ASSOC;
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type = CACHE_TYPE_DATA;
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break;
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case _SC_LEVEL3_CACHE_LINESIZE:
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level = 3;
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attr = CACHE_ATTR_LINESIZE;
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type = CACHE_TYPE_DATA;
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break;
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case _SC_LEVEL4_CACHE_SIZE:
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level = 4;
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attr = CACHE_ATTR_SIZE;
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type = CACHE_TYPE_DATA;
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break;
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case _SC_LEVEL4_CACHE_ASSOC:
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level = 4;
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attr = CACHE_ATTR_ASSOC;
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type = CACHE_TYPE_DATA;
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break;
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case _SC_LEVEL4_CACHE_LINESIZE:
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level = 4;
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attr = CACHE_ATTR_LINESIZE;
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type = CACHE_TYPE_DATA;
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break;
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default:
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level = 0;
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attr = 0;
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type = 0;
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break;
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}
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return get_cache_info (level, attr, type);
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}
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return linux_sysconf (name);
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}
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/* Now the generic Linux version. */
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#undef __sysconf
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#define __sysconf static linux_sysconf
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#include <sysdeps/unix/sysv/linux/sysconf.c>
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