AuroraMiddleware/glibc
1
0
Fork 0
mirror of https://sourceware.org/git/glibc.git synced 2024-11-21 20:40:05 +00:00
Code Issues Packages Projects Releases Wiki Activity

Update.

Browse Source 
2004-12-16  Ulrich Drepper  <drepper@redhat.com>

	* tst-context1.c (stacks): Use bigger stack size.
This commit is contained in:
Ulrich Drepper 2004-12-17 05:16:26 +00:00
parent 9aa191b86c
commit fb9d5c7388
4 changed files with 13 additions and 9 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

4
nptl/ChangeLog
View File

@ -1,3 +1,7 @@
2004-12-16 Ulrich Drepper <drepper@redhat.com>
* tst-context1.c (stacks): Use bigger stack size.
2004-12-16 Jakub Jelinek <jakub@redhat.com>
* sysdeps/unix/sysv/linux/sparc/sparc32/clone.S: New file.

4
nptl/tst-context1.c
View File

@ -37,7 +37,7 @@ typedef struct {
unsigned long guard[3];
} tst_context_t;
static char stacks[N][PTHREAD_STACK_MIN];
static char stacks[N][2 * PTHREAD_STACK_MIN];
static tst_context_t ctx[N][2];
static volatile int failures;
@ -110,7 +110,7 @@ tf (void *arg)
printf ("%d: %s: before makecontext\n", n, __FUNCTION__);
ctx[n][1].uctx.uc_stack.ss_sp = stacks[n];
ctx[n][1].uctx.uc_stack.ss_size = PTHREAD_STACK_MIN;
ctx[n][1].uctx.uc_stack.ss_size = sizeof (stacks[n]);
ctx[n][1].uctx.uc_link = &ctx[n][0].uctx;
makecontext (&ctx[n][1].uctx, (void (*) (void)) fct, 1, (long int) n);

8
sysdeps/unix/sysv/linux/powerpc/powerpc64/getcontext.S
View File

@ -275,17 +275,17 @@ ENTRY(__getcontext)
ld r5,RTLD_GLOBAL_RO_DL_HWCAP_OFFSET(r5)
# else
ld r5,0(r5) /* Load extern _dl_hwcap. */
# endif
# endif
la r10,(SIGCONTEXT_V_RESERVE+8)(r3)
la r9,(SIGCONTEXT_V_RESERVE+24)(r3)
andis. r5,r5,(PPC_FEATURE_HAS_ALTIVEC >> 16)
clrrdi r10,r10,4
beq L(has_no_vec)
clrrdi r9,r9,4
mr r5,r10 /* Capture *v_regs value in r5. */
stvx v0,0,r10
stvx v1,0,r9
addi r10,r10,32

6
sysdeps/unix/sysv/linux/powerpc/powerpc64/swapcontext.S
View File

@ -401,12 +401,12 @@ ENTRY(__swapcontext)
#endif
la r10,(SIGCONTEXT_V_RESERVE+8)(r3)
la r9,(SIGCONTEXT_V_RESERVE+24)(r3)
andis. r8,r8,(PPC_FEATURE_HAS_ALTIVEC >> 16)
clrrdi r10,r10,4
beq L(has_no_vec)
clrrdi r9,r9,4
mr r8,r10 /* Capture *v_regs value in r5. */
@ -493,7 +493,7 @@ ENTRY(__swapcontext)
mfvscr v0
mfspr r0,VRSAVE
stvx v0,0,r10
stw r0,0(9)
stw r0,0(r9)
L(has_no_vec):
/*