AuroraMiddleware/glibc
1
0
Fork 0
mirror of https://sourceware.org/git/glibc.git synced 2024-09-20 00:19:57 +00:00
Code Issues Packages Projects Releases Wiki Activity

S390: Also check vector support in memmove ifunc-selector [BZ #27511]

Browse Source 
The arch13 memmove variant is currently selected by the ifunc selector
if the Miscellaneous-Instruction-Extensions Facility 3 facility bit
is present, but the function is also using vector instructions.
If the vector support is not present, one is receiving an operation
exception.

Therefore this patch also checks for vector support in the ifunc
selector and in ifunc-impl-list.c.

Just to be sure, the configure check is now also testing an arch13
vector instruction and an arch13 Miscellaneous-Instruction-Extensions
Facility 3 instruction.

(cherry picked from commit 7759be2593)
This commit is contained in:
Stefan Liebler 2021-03-23 17:29:26 +01:00
parent db32fc27e7
commit fc4ecce85b
4 changed files with 15 additions and 6 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

8
sysdeps/s390/configure vendored
View File

@ -123,7 +123,9 @@ void testinsn (char *buf)
__asm__ (".machine \"arch13\" \n\t"
".machinemode \"zarch_nohighgprs\" \n\t"
"lghi %%r0,16 \n\t"
"mvcrl 0(%0),32(%0)" : : "a" (buf) : "memory", "r0");
"mvcrl 0(%0),32(%0) \n\t"
"vstrs %%v20,%%v20,%%v20,%%v20,0,2"
: : "a" (buf) : "memory", "r0");
}
EOF
if { ac_try='${CC-cc} $CFLAGS $CPPFLAGS $LDFLAGS --shared conftest.c
@ -271,7 +273,9 @@ else
void testinsn (char *buf)
{
__asm__ ("lghi %%r0,16 \n\t"
"mvcrl 0(%0),32(%0)" : : "a" (buf) : "memory", "r0");
"mvcrl 0(%0),32(%0) \n\t"
"vstrs %%v20,%%v20,%%v20,%%v20,0,2"
: : "a" (buf) : "memory", "r0");
}
EOF
if { ac_try='${CC-cc} $CFLAGS $CPPFLAGS $LDFLAGS --shared conftest.c

8
sysdeps/s390/configure.ac
View File

@ -88,7 +88,9 @@ void testinsn (char *buf)
__asm__ (".machine \"arch13\" \n\t"
".machinemode \"zarch_nohighgprs\" \n\t"
"lghi %%r0,16 \n\t"
"mvcrl 0(%0),32(%0)" : : "a" (buf) : "memory", "r0");
"mvcrl 0(%0),32(%0) \n\t"
"vstrs %%v20,%%v20,%%v20,%%v20,0,2"
: : "a" (buf) : "memory", "r0");
}
EOF
dnl test, if assembler supports S390 arch13 instructions
@ -195,7 +197,9 @@ cat > conftest.c <<\EOF
void testinsn (char *buf)
{
__asm__ ("lghi %%r0,16 \n\t"
"mvcrl 0(%0),32(%0)" : : "a" (buf) : "memory", "r0");
"mvcrl 0(%0),32(%0) \n\t"
"vstrs %%v20,%%v20,%%v20,%%v20,0,2"
: : "a" (buf) : "memory", "r0");
}
EOF
dnl test, if assembler supports S390 arch13 zarch instructions as default

2
sysdeps/s390/memmove.c
View File

@ -43,7 +43,7 @@ extern __typeof (__redirect_memmove) MEMMOVE_ARCH13 attribute_hidden;
s390_libc_ifunc_expr (__redirect_memmove, memmove,
({
s390_libc_ifunc_expr_stfle_init ();
(HAVE_MEMMOVE_ARCH13
(HAVE_MEMMOVE_ARCH13 && (hwcap & HWCAP_S390_VXRS_EXT2)
&& S390_IS_ARCH13_MIE3 (stfle_bits))
? MEMMOVE_ARCH13
: (HAVE_MEMMOVE_Z13 && (hwcap & HWCAP_S390_VX))

3
sysdeps/s390/multiarch/ifunc-impl-list.c
View File

@ -171,7 +171,8 @@ __libc_ifunc_impl_list (const char *name, struct libc_ifunc_impl *array,
IFUNC_IMPL (i, name, memmove,
# if HAVE_MEMMOVE_ARCH13
IFUNC_IMPL_ADD (array, i, memmove,
S390_IS_ARCH13_MIE3 (stfle_bits),
((dl_hwcap & HWCAP_S390_VXRS_EXT2)
&& S390_IS_ARCH13_MIE3 (stfle_bits)),
MEMMOVE_ARCH13)
# endif
# if HAVE_MEMMOVE_Z13