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Fix SPARC atomic_write_barrier.

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This commit is contained in:
Torvald Riegel 2014-10-29 19:14:14 +01:00
parent b4f6688462
commit ff9dbdc048
4 changed files with 13 additions and 4 deletions
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9
ChangeLog
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@ -1,3 +1,12 @@
2014-10-31 Torvald Riegel <triegel@redhat.com>
* sysdeps/sparc/sparc32/bits/atomic.h (atomic_write_barrier): Use
correct barrier instruction.
* sysdeps/sparc/sparc32/sparcv9/bits/atomic.h (atomic_write_barrier):
Likewise.
* sysdeps/sparc/sparc64/bits/atomic.h (atomic_write_barrier):
Likewise.
2014-10-30 Roland McGrath <roland@hack.frob.com>
* include/ctype.h: Include <ctype/ctype.h> first thing rather than

4
sysdeps/sparc/sparc32/bits/atomic.h
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@ -343,8 +343,8 @@ extern uint64_t _dl_hwcap __attribute__((weak));
#define atomic_write_barrier() \
do { \
if (__atomic_is_v9) \
/* membar #StoreLoad | #StoreStore */ \
__asm __volatile (".word 0x8143e00a" : : : "memory"); \
/* membar #LoadStore | #StoreStore */ \
__asm __volatile (".word 0x8143e00c" : : : "memory"); \
else \
__asm __volatile ("" : : : "memory"); \
} while (0)

2
sysdeps/sparc/sparc32/sparcv9/bits/atomic.h
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@ -96,4 +96,4 @@ typedef uintmax_t uatomic_max_t;
#define atomic_read_barrier() \
__asm __volatile ("membar #LoadLoad | #LoadStore" : : : "memory")
#define atomic_write_barrier() \
__asm __volatile ("membar #StoreLoad | #StoreStore" : : : "memory")
__asm __volatile ("membar #LoadStore | #StoreStore" : : : "memory")

2
sysdeps/sparc/sparc64/bits/atomic.h
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@ -117,4 +117,4 @@ typedef uintmax_t uatomic_max_t;
#define atomic_read_barrier() \
__asm __volatile ("membar #LoadLoad | #LoadStore" : : : "memory")
#define atomic_write_barrier() \
__asm __volatile ("membar #StoreLoad | #StoreStore" : : : "memory")
__asm __volatile ("membar #LoadStore | #StoreStore" : : : "memory")