Commit Graph

4 Commits

Author SHA1 Message Date
Yanzhang Wang
e0590f41fe RISC-V: Enable static-pie.
This patch referents the commit 374cef3 to add static-pie support. And
because the dummy link map is used when relocating ourselves, so need
not to set __global_pointer$ at this time.

It will also check whether toolchain supports to build static-pie.
Reviewed-by: Adhemerval Zanella  <adhemerval.zanella@linaro.org>
2024-01-12 15:11:45 -03:00
Fangrui Song
098a657fe4 elf: Replace PI_STATIC_AND_HIDDEN with opposite HIDDEN_VAR_NEEDS_DYNAMIC_RELOC
PI_STATIC_AND_HIDDEN indicates whether accesses to internal linkage
variables and hidden visibility variables in a shared object (ld.so)
need dynamic relocations (usually R_*_RELATIVE). PI (position
independent) in the macro name is a misnomer: a code sequence using GOT
is typically position-independent as well, but using dynamic relocations
does not meet the requirement.

Not defining PI_STATIC_AND_HIDDEN is legacy and we expect that all new
ports will define PI_STATIC_AND_HIDDEN. Current ports defining
PI_STATIC_AND_HIDDEN are more than the opposite. Change the configure
default.

No functional change.

Reviewed-by: Adhemerval Zanella  <adhemerval.zanella@linaro.org>
2022-04-26 09:26:22 -07:00
Adhemerval Zanella
09f214528c riscv: Build with -mno-relax if linker does not support R_RISCV_ALIGN
It allows build both glibc and tests with lld (Since lld does not
support R_RISCV_ALIGN linker relaxation).

Checked with a build for riscv32-linux-gnu-rv32imafdc-ilp32d and
riscv64-linux-gnu-rv64imafdc-lp64d.

Reviewed-by: H.J. Lu <hjl.tools@gmail.com>
Reviewed-by: Fangrui Song <maskray@google.com>
2021-11-03 09:25:06 -03:00
Palmer Dabbelt
c506155709
RISC-V: Build Infastructure
This patch lays out the top-level orginazition of the RISC-V port.  It
contains all the Implies files as well as various other fragments of
build infastructure for the RISC-V port.  This contains the only change
to a shared file: config.h.in.

RISC-V is a family of base ISAs with optional extensions.  The base ISAs
are RV32I and RV64I, which are 32-bit and 64-bit integer-only ISAs, but
this port currently only supports RV64I based systems.  Support for
RISC-V lives in in sysdeps/riscv.  In addition to these ISAs, our glibc
port supports most of the currently-defined extensions: the A extension
for atomics, the M extension for multiplication, the C extension for
compressed instructions, and the F/D extensions for single/double
precision IEEE floating-point.  Most of these extensions are handled by
GCC, but glibc defines various floating-point wrappers and emulation
routines as well as some atomic wrappers.

We support running glibc-based programs on Linux, the support for which
lives in sysdeps/unix/sysv/linux/riscv.

2018-01-29  Palmer Dabbelt  <palmer@sifive.com>

        * sysdeps/riscv/Implies: New file.
        * sysdeps/riscv/Makefile: Likewise.
        * sysdeps/riscv/configure: Likewise.
        * sysdeps/riscv/configure.ac: Likewise.
        * sysdeps/riscv/nptl/Makefile: Likewise.
        * sysdeps/riscv/preconfigure: Likewise.
        * sysdeps/riscv/rv64/Implies-after: Likewise.
        * sysdeps/riscv/rv64/rvd/Implies: Likewise.
        * sysdeps/riscv/rv64/rvf/Implies: Likewise.
        * sysdeps/unix/sysv/linux/riscv/Implies: Likewise.
        * sysdeps/unix/sysv/linux/riscv/Makefile: Likewise.
        * sysdeps/unix/sysv/linux/riscv/Versions: Likewise.
        * sysdeps/unix/sysv/linux/riscv/configure: Likewise.
        * sysdeps/unix/sysv/linux/riscv/configure.ac: Likewise.
        * sysdeps/unix/sysv/linux/riscv/ldd-rewrite.sed: Likewise.
        * sysdeps/unix/sysv/linux/riscv/rv64/Implies: Likewise.
        * sysdeps/unix/sysv/linux/riscv/rv64/Makefile: Likewise.
        * sysdeps/unix/sysv/linux/riscv/shlib-versions: Likewise.
2018-01-29 10:43:15 -08:00