3 Commits

Author	SHA1	Message	Date
Joe Ramsay	e302e10213	aarch64/fpu: Sync libmvec routines from 2.39 and before with AOR ... This includes a fix for big-endian in AdvSIMD log, some cosmetic changes, and numerous small optimisations mainly around inlining and using indexed variants of MLA intrinsics. Reviewed-by: Adhemerval Zanella <adhemerval.zanella@linaro.org>	2024-02-26 09:45:50 -03:00
Paul Eggert	dff8da6b3e	Update copyright dates with scripts/update-copyrights	2024-01-01 10:53:40 -08:00
Joe Ramsay	31aaf6fed9	aarch64: Add vector implementations of exp10 routines ... Double-precision routines either reuse the exp table (AdvSIMD) or use SVE FEXPA intruction.	2023-10-23 15:00:45 +01:00