AuroraMiddleware/glibc
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1 Commits

Author SHA1 Message Date
David S. Miller
6358490d55 Add sparc optimized {l,}rint{,f} for 32-bit v9 and 64-bit. 
* sysdeps/sparc/sparc32/sparcv9/fpu/s_llrint.S: New file.
	* sysdeps/sparc/sparc32/sparcv9/fpu/s_llrintf.S: New file.
	* sysdeps/sparc/sparc32/sparcv9/fpu/s_lrint.S: New file.
	* sysdeps/sparc/sparc32/sparcv9/fpu/s_lrintf.S: New file.
	* sysdeps/sparc/sparc64/fpu/s_llrint.S: New file.
	* sysdeps/sparc/sparc64/fpu/s_llrintf.S: New file.
	* sysdeps/sparc/sparc64/fpu/s_lrint.S: New file.
	* sysdeps/sparc/sparc64/fpu/s_lrintf.S: New file.
 2012-03-02 18:59:09 -08:00