Commit Graph

36938 Commits

Author SHA1 Message Date
Adhemerval Zanella
2edf8f3d75 Open master branch for glibc 2.34 development 2021-02-01 14:16:46 -03:00
Adhemerval Zanella
9826b03b74 Prepare for glibc 2.33 release
Update version.h, features.h, and ChangeLog.old/ChangeLog.22.
2021-02-01 14:15:33 -03:00
Adhemerval Zanella
5e25920fb2 Update NEWS with bugs 2021-02-01 14:15:23 -03:00
Adhemerval Zanella
730ad885ef Update translations
Add missing Serbian translation.
2021-02-01 14:15:16 -03:00
Florian Weimer
934c48a05b NEWS: Fix typo in CVE-2021-3326 entry 2021-01-29 19:13:25 +01:00
Adhemerval Zanella
a50a080f6b elf: Fix tests that rely on ld.so.cache for cross-compiling
For configurations with cross-compiling equal to 'maybe' or 'no',
ldconfig will not run and thus the ld.so.cache will not be created
on the container testroot.pristine.

This lead to failures on both tst-glibc-hwcaps-prepend-cache and
tst-ldconfig-ld_so_conf-update on environments where the same
compiler can be used to build different ABIs (powerpc and x86 for
instance).

This patch addas a new test-container hook, ldconfig.run, that
triggers a ldconfig execution prior the test execution.

Checked on x86_64-linux-gnu and i686-linux-gnu.
2021-01-29 14:08:18 -03:00
Florian Weimer
d7f4f3f5fb NEWS: Mention CVE-2021-3326 (iconv assertion with ISO-20220-JP-3) 2021-01-29 18:03:24 +01:00
Florian Weimer
570bb42376 NEWS: Add entry for glibc-hwcaps and deprecate legacy hwcaps 2021-01-29 17:43:31 +01:00
H.J. Lu
04dff6fc0d x86: Properly set usable CET feature bits [BZ #26625]
commit 94cd37ebb2
Author: H.J. Lu <hjl.tools@gmail.com>
Date:   Wed Sep 16 05:27:32 2020 -0700

    x86: Use HAS_CPU_FEATURE with IBT and SHSTK [BZ #26625]

broke

GLIBC_TUNABLES=glibc.cpu.hwcaps=-IBT,-SHSTK

since it can no longer disable IBT nor SHSTK.  Handle IBT and SHSTK with:

1. Revert commit 94cd37ebb2.
2. Clears the usable CET feature bits if kernel doesn't support CET.
3. Add GLIBC_TUNABLES tests without dlopen.
4. Add tests to verify that CPU_FEATURE_USABLE on IBT and SHSTK matches
_get_ssp.
5. Update GLIBC_TUNABLES tests with dlopen to verify that CET is disabled
with GLIBC_TUNABLES.

Reviewed-by: Carlos O'Donell <carlos@redhat.com>
2021-01-29 03:58:11 -08:00
Adhemerval Zanella
6032ae6514 Update translations 2021-01-28 14:05:15 -03:00
Adhemerval Zanella
4e04691107 Update libc.pot for 2.33 release 2021-01-28 14:05:15 -03:00
Adhemerval Zanella
4a3f20b33a Update ia64 libm-test-ulps 2021-01-28 14:05:15 -03:00
Adhemerval Zanella
a7b21a7830 sh: Update libm-tests-ulps 2021-01-28 14:05:14 -03:00
Adhemerval Zanella
c177f6610c ia64: Fix brk call on statup
brk used by statup before TCB is properly set, so we can't use
IA64_USE_NEW_STUB.

This patch fixes a regression introduced by 720480934a.

Checked on ia64-linux-gnu.
2021-01-28 14:05:14 -03:00
Adhemerval Zanella
341063c3b1 Update sparc libm-test-ulps 2021-01-28 14:05:14 -03:00
Adhemerval Zanella
d04d64804d Update alpha libm-test-ulps 2021-01-28 14:05:14 -03:00
Raoni Fassina Firmino
5ee506ed35 powerpc64: Workaround sigtramp vdso return call
A not so recent kernel change[1] changed how the trampoline
`__kernel_sigtramp_rt64` is used to call signal handlers.

This was exposed on the test misc/tst-sigcontext-get_pc

Before kernel 5.9, the kernel set LR to the trampoline address and
jumped directly to the signal handler, and at the end the signal
handler, as any other function, would `blr` to the address set.  In
other words, the trampoline was executed just at the end of the signal
handler and the only thing it did was call sigreturn.  But since
kernel 5.9 the kernel set CTRL to the signal handler and calls to the
trampoline code, the trampoline then `bctrl` to the address in CTRL,
setting the LR to the next instruction in the middle of the
trampoline, when the signal handler returns, the rest of the
trampoline code executes the same code as before.

Here is the full trampoline code as of kernel 5.11.0-rc5 for
reference:

    V_FUNCTION_BEGIN(__kernel_sigtramp_rt64)
    .Lsigrt_start:
            bctrl   /* call the handler */
            addi    r1, r1, __SIGNAL_FRAMESIZE
            li      r0,__NR_rt_sigreturn
            sc
    .Lsigrt_end:
    V_FUNCTION_END(__kernel_sigtramp_rt64)

This new behavior breaks how `backtrace()` uses to detect the
trampoline frame to correctly reconstruct the stack frame when it is
called from inside a signal handling.

This workaround rely on the fact that the trampoline code is at very
least two (maybe 3?) instructions in size (as it is in the 32 bits
version, only on `li` and `sc`), so it is safe to check the return
address be in the range __kernel_sigtramp_rt64 .. + 4.

[1] subject: powerpc/64/signal: Balance return predictor stack in signal trampoline
    commit: 0138ba5783ae0dcc799ad401a1e8ac8333790df9
    url: https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/commit/?id=0138ba5783ae0dcc799ad401a1e8ac8333790df9

Reviewed-by: Adhemerval Zanella  <adhemerval.zanella@linaro.org>
2021-01-28 13:57:50 -03:00
DJ Delorie
757a14b5ac Fix nss/tst-reload2 for systems without PATH_MAX 2021-01-27 20:05:26 -05:00
DJ Delorie
429029a73e nsswitch: do not reload if "/" changes
https://sourceware.org/bugzilla/show_bug.cgi?id=27077

Before reloading nsswitch.conf, verify that the root directory
hasn't changed - if it has, it's likely that we've entered a
container and should not trust the nsswitch inside the container
nor load any shared objects therein.

Reviewed-by: Carlos O'Donell <carlos@redhat.com>
2021-01-27 13:35:15 -05:00
Matheus Castanho
01cdcf783a elf: Limit tst-prelink-cmp target archs
elf/tst-prelink-cmp was initially added for x86 (commit fe534fe898) to validate
the fix for Bug 19178, and later applied to all architectures that use GLOB_DAT
relocations (commit 89569c8bb6).  However, that bug only affected targets that
handle GLOB_DAT relocations as ELF_TYPE_CLASS_EXTERN_PROTECTED_DATA, so the test
should only apply to targets defining DL_EXTERN_PROTECTED_DATA, which gates the
usage of the elf type class above.  For all other targets not meeting that
criteria, the test now returns with UNSUPPORTED status.

Fixes the test on POWER10 processors, which started using R_PPC64_GLOB_DAT.

Reviewed-by: Adhemerval Zanella <adhemerval.zanella@linaro.org>
2021-01-27 11:34:50 -03:00
Florian Weimer
7d88c6142c gconv: Fix assertion failure in ISO-2022-JP-3 module (bug 27256)
The conversion loop to the internal encoding does not follow
the interface contract that __GCONV_FULL_OUTPUT is only returned
after the internal wchar_t buffer has been filled completely.  This
is enforced by the first of the two asserts in iconv/skeleton.c:

	      /* We must run out of output buffer space in this
		 rerun.  */
	      assert (outbuf == outerr);
	      assert (nstatus == __GCONV_FULL_OUTPUT);

This commit solves this issue by queuing a second wide character
which cannot be written immediately in the state variable, like
other converters already do (e.g., BIG5-HKSCS or TSCII).

Reported-by: Tavis Ormandy <taviso@gmail.com>
2021-01-27 14:02:47 +01:00
Szabolcs Nagy
df359a25ba Revert "Make libc symbols hidden in static PIE" [BZ #27237]
This reverts commit 2682695e5c.
Fixes bug 27237.

That commit turned out to be too intrusive affecting crt files, test
system and benchmark files.  They should not be affected, but the
build system does not set the MODULE_NAME and LIBC_NONSHARED reliably.
2021-01-27 09:44:19 +00:00
Arjun Shankar
3725ee39db benchtests: Do not build bench-timing-type with MODULE_NAME=libc
Since commit 2682695e5c, `make bench-build' with `--enable-static-pie'
fails due to bench-timing-type being incorrectly built with MODULE_NAME
set to `libc'.  This commit sets MODULE_NAME to nonlib, thus fixing the
build failure.

Reviewed-by: Carlos O'Donell <carlos@redhat.com>
2021-01-26 18:14:19 +01:00
Szabolcs Nagy
04c6a8073d aarch64: Fix the list of tested IFUNC variants [BZ #26818]
Some IFUNC variants are not compatible with BTI and MTE so don't
set them as usable for testing and benchmarking on a BTI or MTE
enabled system.

As far as IFUNC selectors are concerned a system is BTI enabled if
the cpu supports it and glibc was built with BTI branch protection.

Most IFUNC variants are BTI compatible, but thunderx2 memcpy and
memmove use a jump table with indirect jump, without a BTI j.

Fixes bug 26818.
2021-01-25 16:15:54 +00:00
Tulio Magno Quites Machado Filho
ad47748992 Update INSTALL with package versions that are known to work
Most packages have been tested with their latest releases, except for
Python, whose latest version is 3.9.1.

Reviewed-by: Adhemerval Zanella  <adhemerval.zanella@linaro.org>
2021-01-25 13:13:17 -03:00
Szabolcs Nagy
c3c4a25e65 aarch64: Move and update the definition of MTE_ENABLED
The hwcap value is now in linux 5.10 and in glibc bits/hwcap.h, so use
that definition.

Move the definition to init-arch.h so all ifunc selectors can use it
and expose an "mte" shorthand for mte enabled runtime.

For now we allow user code to enable tag checks and use PROT_MTE
mappings without libc involvment, this is not guaranteed ABI, but
can be useful for testing and debugging with MTE.
2021-01-25 15:35:43 +00:00
Andreas Schwab
31f6488722 Fix misplaced const
Constify __x86_cacheinfo_p and __x86_cpu_features_p, not their pointer
target types.
2021-01-25 15:09:02 +01:00
Mao Han
fcfa4bb48d Update C-SKY libm-test-ulps 2021-01-23 19:00:00 +00:00
John McCabe
56ef6ab0cd manual: Correct argument order in mount examples [BZ #27207]
Reviewed-by: DJ Delorie <dj@redhat.com>
2021-01-22 14:22:41 -05:00
Adhemerval Zanella
42d6270439 linux: mips: Fix getdents64 fallback on mips64-n32
GCC mainline shows the following error:

../sysdeps/unix/sysv/linux/mips/mips64/getdents64.c: In function '__getdents64':
../sysdeps/unix/sysv/linux/mips/mips64/getdents64.c:121:7: error: 'memcpy' forming offset [4, 7] is out of the bounds [0, 4] [-Werror=array-bounds]
  121 |       memcpy (((char *) dp + offsetof (struct dirent64, d_ino)),
      |       ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
  122 |               KDP_MEMBER (kdp, d_ino), sizeof ((struct dirent64){0}.d_ino));
      |               ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
../sysdeps/unix/sysv/linux/mips/mips64/getdents64.c:123:7: error: 'memcpy' forming offset [4, 7] is out of the bounds [0, 4] [-Werror=array-bounds]
  123 |       memcpy (((char *) dp + offsetof (struct dirent64, d_off)),
      |       ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
  124 |               KDP_MEMBER (kdp, d_off), sizeof ((struct dirent64){0}.d_off));
      |               ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~

The issue is due both d_ino and d_off fields for mips64-n32
kernel_dirent are 32-bits, while this is using memcpy to copy 64 bits
from it into the glibc dirent64.

The fix is to use a temporary buffer to read the correct type
from kernel_dirent.

Checked with a build-many-glibcs.py for mips64el-linux-gnu and I
also checked the tst-getdents64 on mips64el 4.1.4 kernel with
and without fallback enabled (by manually setting the
getdents64_supported).
2021-01-22 15:44:41 -03:00
H.J. Lu
5f478eb0fb x86: Properly match CPU features in /proc/cpuinfo [BZ #27222]
Search " YYY " and " YYY\n", instead of "YYY", to avoid matching
"XXXYYYZZZ" with "YYY".

Update /proc/cpuinfo CPU feature names:

/proc/cpuinfo                     glibc
------------------------------------------------
avx512vbmi                        AVX512_VBMI
dts                               DS
pni                               SSE3
tsc_deadline_timer                TSC_DEADLINE
2021-01-22 10:15:46 -08:00
H.J. Lu
f543259500 x86-64: Update tst-glibc-hwcaps-2.c for x86-64 baseline
Return EXIT_FAILURE only if the level 2 libx86-64-isa-level.so is used
on x86-64 baseline machine.
2021-01-22 09:37:44 -08:00
Florian Weimer
527c89cd32 powerpc64: Select POWER9 machine for the scv instruction
It is not available with the baseline ISA.

Fixes commit 68ab82f566
("powerpc: Runtime selection between sc and scv for syscalls").

Reviewed-by: Tulio Magno Quites Machado Filho <tuliom@linux.ibm.com>
2021-01-22 10:45:27 +01:00
H.J. Lu
7a5ab88e21 x86: Check ifunc resolver with CPU_FEATURE_USABLE [BZ #27072]
Check ifunc resolver with CPU_FEATURE_USABLE and tunables in dynamic and
static executables to verify that CPUID features are initialized early in
static PIE.

Reviewed-by: Adhemerval Zanella <adhemerval.zanella@linaro.org>
2021-01-21 10:22:26 -08:00
Adhemerval Zanella
46c1c765d1 Revert "linux: Move {f}xstat{at} to compat symbols" for static build
This reverts commit 20b39d5946 for static
library.  This avoids the need to rebuild the world for the case where
libstdc++ (and potentially other libraries) are linked to a old glibc.

To avoid requering to provide xstat symbols for newer ABIs (such as
riscv32) a new LIB_COMPAT macro is added.  It is similar to SHLIB_COMPAT
but also works for static case (thus evaluating similar to SHLIB_COMPAT
for both shared and static case).

Checked with a check-abi on all affected ABIs. I also check if the
static library does contains the xstat symbols.
2021-01-21 14:11:53 -03:00
Shuo Wang
28f2ce2772 aarch64: revert memcpy optimze for kunpeng to avoid performance degradation
In commit 863d775c48, kunpeng920 is added to default memcpy version,
however, there is performance degradation when the copy size is some large bytes, eg: 100k.
This is the result, tested in glibc-2.28:
             before backport  after backport	 Performance improvement
memcpy_1k      0.005              0.005                 0.00%
memcpy_10k     0.032              0.029                 10.34%
memcpy_100k    0.356              0.429                 -17.02%
memcpy_1m      7.470              11.153                -33.02%

This is the demo
#include "stdio.h"
#include "string.h"
#include "stdlib.h"

char a[1024*1024] = {12};
char b[1024*1024] = {13};
int main(int argc, char *argv[])
{
    int i = atoi(argv[1]);
    int j;
    int size = atoi(argv[2]);

    for (j = 0; j < i; j++)
        memcpy(b, a, size*1024);
    return 0;
}

# gcc -g -O0 memcpy.c -o memcpy
# time taskset -c 10 ./memcpy 100000 1024

Co-authored-by: liqingqing <liqingqing3@huawei.com>
2021-01-21 16:44:15 +00:00
Szabolcs Nagy
2682695e5c Make libc symbols hidden in static PIE
Hidden visibility can avoid indirections and RELATIVE relocs in
static PIE libc.

The check should use IS_IN_LIB instead of IS_IN(libc) since all
symbols are defined locally in static PIE and the optimization is
useful in all libraries not just libc. However the test system
links objects from libcrypt.a into dynamic linked test binaries
where hidden visibility does not work.  I think mixing static and
shared libc components in the same binary should not be supported
usage, but to be safe only use hidden in libc.a.

On some targets (i386) this optimization cannot be applied because
hidden visibility PIE ifunc functions don't work, so it is gated by
NO_HIDDEN_EXTERN_FUNC_IN_PIE.

From -static-pie linked 'int main(){}' this shaves off 71 relative
relocs on aarch64 and reduces code size by about 2k.

Reviewed-by: Adhemerval Zanella  <adhemerval.zanella@linaro.org>
2021-01-21 15:55:17 +00:00
Szabolcs Nagy
86d439b06f csu: Move static pie self relocation later [BZ #27072]
IFUNC resolvers may depend on tunables and cpu feature setup so
move static pie self relocation after those.

It is hard to guarantee that the ealy startup code does not rely
on relocations so this is a bit fragile. It would be more robust
to handle RELATIVE relocs early and only IRELATIVE relocs later,
but the current relocation processing code cannot do that.

The early startup code up to relocation processing includes

  _dl_aux_init (auxvec);
  __libc_init_secure ();
  __tunables_init (__environ);
  ARCH_INIT_CPU_FEATURES ();
  _dl_relocate_static_pie ();

These are simple enough that RELATIVE relocs can be avoided.

The following steps include

  ARCH_SETUP_IREL ();
  ARCH_SETUP_TLS ();
  ARCH_APPLY_IREL ();

On some targets IRELATIVE processing relies on TLS setup on
others TLS setup relies on IRELATIVE relocs, so the right
position for _dl_relocate_static_pie is target dependent.
For now move self relocation as early as possible on targets
that support static PIE.

Fixes bug 27072.

Reviewed-by: Adhemerval Zanella  <adhemerval.zanella@linaro.org>
2021-01-21 15:55:10 +00:00
Szabolcs Nagy
47618209d0 Use hidden visibility for early static PIE code
Extern symbol access in position independent code usually involves GOT
indirection which needs RELATIVE reloc in a static linked PIE. (On
some targets this is avoided e.g. because the linker can relax a GOT
access to a pc-relative access, but this is not generally true.) Code
that runs before static PIE self relocation must avoid relying on
dynamic relocations which can be ensured by using hidden visibility.
However we cannot just make all symbols hidden:

On i386, all calls to IFUNC functions must go through PLT and calls to
hidden functions CANNOT go through PLT in PIE since EBX used in PIE PLT
may not be set up for local calls to hidden IFUNC functions.

This patch aims to make symbol references hidden in code that is used
before and by _dl_relocate_static_pie when building a static PIE libc.
Note: for an object that is used in the startup code, its references
and definition may not have consistent visibility: it is only forced
hidden in the startup code.

This is needed for fixing bug 27072.

Co-authored-by: H.J. Lu <hjl.tools@gmail.com>
Reviewed-by: Adhemerval Zanella  <adhemerval.zanella@linaro.org>
2021-01-21 15:55:01 +00:00
Szabolcs Nagy
04af1eb313 csu: Avoid weak ref for __ehdr_start in static PIE
All linkers support __ehdr_start that support static PIE linking,
so there is no need to check for its presence via a weak reference.

This avoids a RELATIVE relocation in static PIE startup code on some
targets.

With non-PIE static linking the weak ref check is kept in case the
linker does not support __ehdr_start.

Reviewed-by: Adhemerval Zanella  <adhemerval.zanella@linaro.org>
2021-01-21 15:54:55 +00:00
Szabolcs Nagy
374cef32ac configure: Check for static PIE support
Add SUPPORT_STATIC_PIE that targets can define if they support
static PIE. This requires PI_STATIC_AND_HIDDEN support and various
linker features as described in

  commit 9d7a3741c9
  Add --enable-static-pie configure option to build static PIE [BZ #19574]

Currently defined on x86_64, i386 and aarch64 where static PIE is
known to work.

Reviewed-by: Adhemerval Zanella  <adhemerval.zanella@linaro.org>
2021-01-21 15:54:50 +00:00
Szabolcs Nagy
bfe04789a8 elf: Avoid RELATIVE relocs in __tunables_init
With static pie linking pointers in the tunables list need
RELATIVE relocs since the absolute address is not known at link
time. We want to avoid relocations so the static pie self
relocation can be done after tunables are initialized.

This is a simple fix that embeds the tunable strings into the
tunable list instead of using pointers.  It is possible to have
a more compact representation of tunables with some additional
complexity in the generator and tunable parser logic.  Such
optimization will be useful if the list of tunables grows.

There is still an issue that tunables_strdup allocates and the
failure handling code path is sufficiently complex that it can
easily have RELATIVE relocations.  It is possible to avoid the
early allocation and only change environment variables in a
setuid exe after relocations are processed.  But that is a
bigger change and early failure is fatal anyway so it is not
as critical to fix right away. This is bug 27181.

Reviewed-by: Adhemerval Zanella  <adhemerval.zanella@linaro.org>
2021-01-21 14:05:15 +00:00
Szabolcs Nagy
058308066c elf: Make the tunable struct definition internal only
The representation of the tunables including type information and
the tunable list structure are only used in the implementation not
in the tunables api that is exposed to usage within glibc.

This patch moves the representation related definitions into the
existing dl-tunable-types.h and uses that only for implementation.

The tunable callback and related types are moved to dl-tunables.h
because they are part of the tunables api.

This reduces the details exposed in the tunables api so the internals
are easier to change.

Reviewed-by: Adhemerval Zanella  <adhemerval.zanella@linaro.org>
2021-01-21 14:05:15 +00:00
H.J. Lu
ff6d62e9ed <sys/platform/x86.h>: Remove the C preprocessor magic
In <sys/platform/x86.h>, define CPU features as enum instead of using
the C preprocessor magic to make it easier to wrap this functionality
in other languages.  Move the C preprocessor magic to internal header
for better GCC codegen when more than one features are checked in a
single expression as in x86-64 dl-hwcaps-subdirs.c.

1. Rename COMMON_CPUID_INDEX_XXX to CPUID_INDEX_XXX.
2. Move CPUID_INDEX_MAX to sysdeps/x86/include/cpu-features.h.
3. Remove struct cpu_features and __x86_get_cpu_features from
<sys/platform/x86.h>.
4. Add __x86_get_cpuid_feature_leaf to <sys/platform/x86.h> and put it
in libc.
5. Make __get_cpu_features() private to glibc.
6. Replace __x86_get_cpu_features(N) with __get_cpu_features().
7. Add _dl_x86_get_cpu_features to GLIBC_PRIVATE.
8. Use a single enum index for each CPU feature detection.
9. Pass the CPUID feature leaf to __x86_get_cpuid_feature_leaf.
10. Return zero struct cpuid_feature for the older glibc binary with a
smaller CPUID_INDEX_MAX [BZ #27104].
11. Inside glibc, use the C preprocessor magic so that cpu_features data
can be loaded just once leading to more compact code for glibc.

256 bits are used for each CPUID leaf.  Some leaves only contain a few
features.  We can add exceptions to such leaves.  But it will increase
code sizes and it is harder to provide backward/forward compatibilities
when new features are added to such leaves in the future.

When new leaves are added, _rtld_global_ro offsets will change which
leads to race condition during in-place updates. We may avoid in-place
updates by

1. Rename the old glibc.
2. Install the new glibc.
3. Remove the old glibc.

NB: A function, __x86_get_cpuid_feature_leaf , is used to avoid the copy
relocation issue with IFUNC resolver as shown in IFUNC resolver tests.
2021-01-21 05:58:17 -08:00
Adhemerval Zanella
d7ee6bd8c2 posix: Fix fnmatch.c on bootstrap
Only define FALLTHROUGH for _LIBC and do not check __clang_major__
value.

It partially syncs with gnulib 5c52f00c69f39fe.

Checked with build-many-glibcs.py for aarch64-linux-gnu.
2021-01-20 13:23:33 -03:00
Adhemerval Zanella
961d7cff51 stdlib: Add testcase for BZ #26241
Old implementation of realpath allocates a PATH_MAX using alloca for
each symlink in the path, leading to MAXSYMLINKS times PATH_MAX
maximum stack usage.

The test create a symlink with __eloop_threshold() loops and creates
a thread with minimum stack size (obtained through
support_small_stack_thread_attribute).  The thread issues a stack
allocations that fill the thread allocated stack minus some slack
plus and the realpath usage (which assumes a bounded stack usage).
If realpath uses more than about 2 * PATH_MAX plus some slack it
triggers a stackoverflow.

Checked on x86_64-linux-gnu and i686-linux-gnu.

Reviewed-by: DJ Delorie <dj@redhat.com>
2021-01-20 11:13:53 -03:00
Adhemerval Zanella
1006250ea2 posix: Fix regex_internal.h on bootstrap
Only define FALLTHROUGH for _LIBC and do not check __clang_major__
value.

It partially syncs with gnulib 5c52f00c69f39fe.

Checked with build-many-glibcs.py for aarch64-linux-gnu,
x86_64-linux-gnu, and s390x-linux-gnu.
2021-01-20 09:59:34 -03:00
H.J. Lu
22b79ed7f4 Use <startup.h> in __libc_init_secure
Since __libc_init_secure is called before ARCH_SETUP_TLS, it must use
"int $0x80" for system calls in i386 static PIE.  Add startup_getuid,
startup_geteuid, startup_getgid and startup_getegid to <startup.h>.
Update __libc_init_secure to use them.

Reviewed-by: Adhemerval Zanella  <adhemerval.zanella@linaro.org>
2021-01-19 09:55:47 -08:00
H.J. Lu
cabc8a2916 elf: Avoid RELATIVE relocation for _dl_sysinfo
Set the default _dl_sysinfo in _dl_aux_init to avoid RELATIVE relocation
in static PIE.

This is needed for fixing bug 27072 on x86.

Reviewed-by: Adhemerval Zanella  <adhemerval.zanella@linaro.org>
2021-01-19 06:38:28 -08:00
H.J. Lu
0ec583d926 libmvec: Add extra-test-objs to test-extras
Add extra-test-objs to test-extras so that they are compiled with
-DMODULE_NAME=testsuite instead of -DMODULE_NAME=libc.

Reviewed-by: Adhemerval Zanella  <adhemerval.zanella@linaro.org>
2021-01-19 06:20:46 -08:00