3 Commits

Author	SHA1	Message	Date
Joe Ramsay	a15b1394b5	AArch64: Improve codegen in SVE F32 logs ... Reduce MOVPRFXs by using unpredicated (non-destructive) instructions where possible. Similar to the recent change to AdvSIMD F32 logs, adjust special-case arguments and bounds to allow for more optimal register usage. For all 3 routines one MOVPRFX remains in the reduction, which cannot be avoided as immediate AND and ASR are both destructive. Reviewed-by: Wilco Dijkstra <Wilco.Dijkstra@arm.com>	2024-09-23 15:44:07 +01:00
Paul Eggert	dff8da6b3e	Update copyright dates with scripts/update-copyrights	2024-01-01 10:53:40 -08:00
Joe Ramsay	067a34156c	aarch64: Add vector implementations of log10 routines ... A table is also added, which is shared between AdvSIMD and SVE log10.	2023-10-23 15:00:45 +01:00