Siddhesh Poyarekar
a109996ef9
Remove IS_IN_libm
...
Replace with IS_IN (libm). Generated code unchanged on x86_64.
* include/math.h: Use IS_IN instead of IS_IN_libm.
* sysdeps/alpha/fpu/s_copysign.c: Likewise.
* sysdeps/ieee754/ldbl-128ibm/s_copysignl.c: Likewise.
* sysdeps/ieee754/ldbl-128ibm/s_finitel.c: Likewise.
* sysdeps/ieee754/ldbl-128ibm/s_fmal.c: Likewise.
* sysdeps/ieee754/ldbl-128ibm/s_frexpl.c: Likewise.
* sysdeps/ieee754/ldbl-128ibm/s_isinfl.c: Likewise.
* sysdeps/ieee754/ldbl-128ibm/s_isnanl.c: Likewise.
* sysdeps/ieee754/ldbl-128ibm/s_modfl.c: Likewise.
* sysdeps/ieee754/ldbl-128ibm/s_scalbnl.c: Likewise.
* sysdeps/ieee754/ldbl-128ibm/s_signbitl.c: Likewise.
* sysdeps/ieee754/ldbl-64-128/s_copysignl.c: Likewise.
* sysdeps/ieee754/ldbl-64-128/s_finitel.c: Likewise.
* sysdeps/ieee754/ldbl-64-128/s_frexpl.c: Likewise.
* sysdeps/ieee754/ldbl-64-128/s_isinfl.c: Likewise.
* sysdeps/ieee754/ldbl-64-128/s_isnanl.c: Likewise.
* sysdeps/ieee754/ldbl-64-128/s_modfl.c: Likewise.
* sysdeps/ieee754/ldbl-64-128/s_scalbnl.c: Likewise.
* sysdeps/ieee754/ldbl-64-128/s_signbitl.c: Likewise.
* sysdeps/ieee754/ldbl-64-128/w_scalblnl.c: Likewise.
* sysdeps/ieee754/ldbl-opt/s_copysign.c: Likewise.
* sysdeps/ieee754/ldbl-opt/s_finite.c: Likewise.
* sysdeps/ieee754/ldbl-opt/s_frexp.c: Likewise.
* sysdeps/ieee754/ldbl-opt/s_isinf.c: Likewise.
* sysdeps/ieee754/ldbl-opt/s_isnan.c: Likewise.
* sysdeps/ieee754/ldbl-opt/s_ldexp.c: Likewise.
* sysdeps/ieee754/ldbl-opt/s_ldexpl.c: Likewise.
* sysdeps/ieee754/ldbl-opt/s_modf.c: Likewise.
* sysdeps/ieee754/ldbl-opt/s_scalbln.c: Likewise.
* sysdeps/ieee754/ldbl-opt/s_scalbn.c: Likewise.
* sysdeps/powerpc/power5+/fpu/s_modf.c: Likewise.
* sysdeps/powerpc/powerpc32/fpu/s_copysign.S: Likewise.
* sysdeps/powerpc/powerpc32/fpu/s_copysignl.S: Likewise.
* sysdeps/powerpc/powerpc32/fpu/s_isnan.S: Likewise.
* sysdeps/powerpc/powerpc32/power4/fpu/multiarch/s_copysign.c: Likewise.
* sysdeps/powerpc/powerpc32/power4/fpu/multiarch/s_finite.c: Likewise.
* sysdeps/powerpc/powerpc32/power4/fpu/multiarch/s_isinf.c: Likewise.
* sysdeps/powerpc/powerpc32/power4/fpu/multiarch/s_isnan.c: Likewise.
* sysdeps/powerpc/powerpc32/power4/fpu/multiarch/s_modf.c: Likewise.
* sysdeps/powerpc/powerpc32/power5/fpu/s_isnan.S: Likewise.
* sysdeps/powerpc/powerpc32/power6/fpu/s_copysign.S: Likewise.
* sysdeps/powerpc/powerpc32/power6/fpu/s_isnan.S: Likewise.
* sysdeps/powerpc/powerpc32/power7/fpu/s_finite.S: Likewise.
* sysdeps/powerpc/powerpc32/power7/fpu/s_isinf.S: Likewise.
* sysdeps/powerpc/powerpc32/power7/fpu/s_isnan.S: Likewise.
* sysdeps/powerpc/powerpc64/fpu/multiarch/s_copysign.c: Likewise.
* sysdeps/powerpc/powerpc64/fpu/multiarch/s_finite.c: Likewise.
* sysdeps/powerpc/powerpc64/fpu/multiarch/s_isinf.c: Likewise.
* sysdeps/powerpc/powerpc64/fpu/multiarch/s_isnan.c: Likewise.
* sysdeps/powerpc/powerpc64/fpu/multiarch/s_modf.c: Likewise.
* sysdeps/powerpc/powerpc64/fpu/s_copysign.S: Likewise.
* sysdeps/powerpc/powerpc64/fpu/s_copysignl.S: Likewise.
* sysdeps/powerpc/powerpc64/fpu/s_isnan.S: Likewise.
* sysdeps/powerpc/powerpc64/power5/fpu/s_isnan.S: Likewise.
* sysdeps/powerpc/powerpc64/power6/fpu/s_copysign.S: Likewise.
* sysdeps/powerpc/powerpc64/power6/fpu/s_isnan.S: Likewise.
* sysdeps/powerpc/powerpc64/power6x/fpu/s_isnan.S: Likewise.
* sysdeps/powerpc/powerpc64/power7/fpu/s_finite.S: Likewise.
* sysdeps/powerpc/powerpc64/power7/fpu/s_isinf.S: Likewise.
* sysdeps/powerpc/powerpc64/power7/fpu/s_isnan.S: Likewise.
* sysdeps/powerpc/powerpc64/power8/fpu/s_finite.S: Likewise.
* sysdeps/powerpc/powerpc64/power8/fpu/s_isinf.S: Likewise.
* sysdeps/powerpc/powerpc64/power8/fpu/s_isnan.S: Likewise.
* sysdeps/sparc/sparc32/fpu/s_signbitl.S: Likewise.
* sysdeps/sparc/sparc32/sparcv9/fpu/s_isnan.S: Likewise.
* sysdeps/unix/sysv/linux/alpha/fraiseexcpt.S: Likewise.
2014-11-24 11:41:47 +05:30
Adhemerval Zanella
7110166d4f
powerpc: Simplify encoding of POWER8 instruction
2014-11-05 08:01:09 -05:00
Adhemerval Zanella
757d9dd5c3
PowerPC: Fix little endian enconding for mfvsrd
...
This patch fixes the MFVSRD_R3_V1 macro that encodes 'mfvsrd r3,vs1'
(to support old binutils) for little endian.
2014-03-31 08:00:38 -05:00
Adhemerval Zanella
cac626d60a
PowerPC: Optimized finite/finitef for POWER8
...
This patch add a optimized finite/finitef implementation for POWER8
using the new Move From VSR Doubleword instruction to gains some
cycles from FP to GRP register move.
2014-02-27 12:58:33 -06:00
