Linux commit ID ee988c11acf6f9464b7b44e9a091bf6afb3b3a49 reserved 2 new
bits in AT_HWCAP2:
- PPC_FEATURE2_ARCH_3_1 indicates the availability of the POWER ISA
3.1;
- PPC_FEATURE2_MMA indicates the availability of the Matrix-Multiply
Assist facility.
GCC 10.0 enabled -fno-common by default and this started to point that
__cache_line_size had been implemented in 2 different places: loader and
libc.
In order to avoid this duplication, the libc variable has been removed
and the loader variable is moved to rtld_global_ro.
File sysdeps/unix/sysv/linux/powerpc/dl-auxv.h has been added in order
to reuse code for both static and dynamic linking scenarios.
Reviewed-by: Carlos O'Donell <carlos@redhat.com>
On POWER8, unaligned memory accesses to cached memory has little impact
on performance as opposed to its ancestors.
It is disabled by default and will only be available when the tunable
glibc.tune.cached_memopt is set to 1.
__memcpy_power8_cached __memcpy_power7
============================================================
max-size=4096: 33325.70 ( 12.65%) 38153.00
max-size=8192: 32878.20 ( 11.17%) 37012.30
max-size=16384: 33782.20 ( 11.61%) 38219.20
max-size=32768: 33296.20 ( 11.30%) 37538.30
max-size=65536: 33765.60 ( 10.53%) 37738.40
* manual/tunables.texi (Hardware Capability Tunables): Document
glibc.tune.cached_memopt.
* sysdeps/powerpc/cpu-features.c: New file.
* sysdeps/powerpc/cpu-features.h: New file.
* sysdeps/powerpc/dl-procinfo.c [!IS_IN(ldconfig)]: Add
_dl_powerpc_cpu_features.
* sysdeps/powerpc/dl-tunables.list: New file.
* sysdeps/powerpc/ldsodefs.h: Include cpu-features.h.
* sysdeps/powerpc/powerpc32/power4/multiarch/init-arch.h
(INIT_ARCH): Initialize use_aligned_memopt.
* sysdeps/powerpc/powerpc64/dl-machine.h [defined(SHARED &&
IS_IN(rtld))]: Restrict dl_platform_init availability and
initialize CPU features used by tunables.
* sysdeps/powerpc/powerpc64/multiarch/Makefile (sysdep_routines):
Add memcpy-power8-cached.
* sysdeps/powerpc/powerpc64/multiarch/ifunc-impl-list.c: Add
__memcpy_power8_cached.
* sysdeps/powerpc/powerpc64/multiarch/memcpy.c: Likewise.
* sysdeps/powerpc/powerpc64/multiarch/memcpy-power8-cached.S:
New file.
Reviewed-by: Rajalakshmi Srinivasaraghavan <raji@linux.vnet.ibm.com>
Linux commit ID cba6ac4869e45cc93ac5497024d1d49576e82666 reserved a new
bit for a scenario where transactional memory is available, but the
suspended state is disabled.
* sysdeps/powerpc/bits/hwcap.h (PPC_FEATURE2_HTM_NO_SUSPEND): New
macro.
* sysdeps/powerpc/dl-procinfo.c (_dl_powerpc_cap_flags): Add
htm-no-suspend.
Signed-off-by: Tulio Magno Quites Machado Filho <tuliom@linux.vnet.ibm.com>
Linux commit ID a4700a26107241cc7b9ac8528b2c6714ff99983d reserved 2 more
bits for the instructions darn (Deliver a Random Number) and scv (System
Call Vectored).
Linux commit ID 6997e57d693b07289694239e52a10d2f02c3a46f reserved
another bit for internal usage.
* sysdeps/powerpc/bits/hwcap.h: Add PPC_FEATURE2_DARN and
PPC_FEATURE2_SCV.
* sysdeps/powerpc/dl-procinfo.c (_dl_powerpc_cap_flags): Add scv
and darn.
HWCAP-related code should had been updated when the 32 bits of HWCAP were
used. This patch updates the code in dl-procinfo.h to loop through all
the 32 bits in HWCAP and updates _dl_powerpc_cap_flags accordingly.
Linux commit b4b56f9ecab40f3b4ef53e130c9f6663be491894 introduced
a new HWCAP2 bit to indicate that the kernel now aborts a memory
transaction when a syscall is made. This patch adds that bit to
sysdeps/powerpc/bits/hwcap.h.
2015-08-26 Carlos Eduardo Seo <cseo@linux.vnet.ibm.com>
* sysdeps/powerpc/bits/hwcap.h: Add PPC_FEATURE2_HTM_NOSC.
* sysdeps/powerpc/dl-procinfo.c:
(_dl_powerpc_cap_flags): Added descriptor for this hwcap
feature so it shows when LD_SHOW_AUXV=1.
Some features in hwcap.h do not have matching string descriptors
to be displayed when LD_SHOW_AUXV=1. This patch fixes the problem.
2015-08-13 Carlos Eduardo Seo <cseo@linux.vnet.ibm.com>
* sysdeps/powerpc/dl-procinfo.c:
(_dl_powerpc_cap_flags): Added missing strings for some
hwcap features.
* sysdeps/powerpc/dl-procinfo.h: Updated hwcap bit count.
2008-08-01 Steven Munroe <sjmunroe@us.ibm.com>
Carlos Eduardo Seo <cseo@linux.vnet.ibm.com>
[BZ #6817]
* sysdeps/powerpc/dl-procinfo.c (_dl_powerpc_cap_flags):
Added the members 'vsx' and 'arch_2_06'.
(_dl_powerpc_platforms): Add the member 'power7'.
* sysdeps/powerpc/dl-procinfo.h: Modify _DL_HWCAP_FIRST
to reflect the changes required by VSX and ISA 2.06.
Modify _DL_PLATFORMS_COUNT to reflect the addition of
'power7'.
Defined PPC_PLATFORM_POWER7.
(_dl_string_platform): Add support for POWER7.
* sysdeps/powerpc/sysdep.h: Define bit masks for VSX
capability and ISA 2.06.
Steven Munroe <sjmunroe@us.ibm.com>
* sysdeps/powerpc/dl-procinfo.c (_dl_powerpc_cap_flags): Add 4 new cap
names to the beginning. Rename "cell" to "cellbe".
(_dl_powerpc_platforms): New.
* sysdeps/powerpc/dl-procinfo.h (_DL_HWCAP_FIRST): Decrease.
(HWCAP_IMPORTANT): Remove power{4,5,5+} and cell.
(_DL_PLATFORMS_COUNT, _DL_FIRST_PLATFORM): Define.
(_DL_HWCAP_PLATFORM): Define to new mask.
(_dl_platform_string, _dl_string_platform): New functions.
* sysdeps/powerpc/sysdep.h (PPC_FEATURE_BOOKE, PPC_FEATURE_SMT,
PPC_FEATURE_ICACHE_SNOOP, PPC_FEATURE_ARCH_2_05): Define.
