Commit Graph

36 Commits

Author SHA1 Message Date
Sunil K Pandey
c21c7bc24e x86-64: Add vector tan/tanf implementation to libmvec
Implement vectorized tan/tanf containing SSE, AVX, AVX2 and
AVX512 versions for libmvec as per vector ABI.  It also contains
accuracy and ABI tests for vector tan/tanf with regenerated ulps.

Reviewed-by: H.J. Lu <hjl.tools@gmail.com>
2021-12-30 10:19:13 -08:00
Sunil K Pandey
8881cca8fb x86-64: Add vector erfc/erfcf implementation to libmvec
Implement vectorized erfc/erfcf containing SSE, AVX, AVX2 and
AVX512 versions for libmvec as per vector ABI.  It also contains
accuracy and ABI tests for vector erfc/erfcf with regenerated ulps.

Reviewed-by: H.J. Lu <hjl.tools@gmail.com>
2021-12-30 10:19:03 -08:00
Sunil K Pandey
e682d01578 x86-64: Add vector asinh/asinhf implementation to libmvec
Implement vectorized asinh/asinhf containing SSE, AVX, AVX2 and
AVX512 versions for libmvec as per vector ABI.  It also contains
accuracy and ABI tests for vector asinh/asinhf with regenerated ulps.

Reviewed-by: H.J. Lu <hjl.tools@gmail.com>
2021-12-29 11:38:56 -08:00
Sunil K Pandey
c0f36fc303 x86-64: Add vector tanh/tanhf implementation to libmvec
Implement vectorized tanh/tanhf containing SSE, AVX, AVX2 and
AVX512 versions for libmvec as per vector ABI.  It also contains
accuracy and ABI tests for vector tanh/tanhf with regenerated ulps.

Reviewed-by: H.J. Lu <hjl.tools@gmail.com>
2021-12-29 11:38:50 -08:00
Sunil K Pandey
f9ce13fdac x86-64: Add vector erf/erff implementation to libmvec
Implement vectorized erf/erff containing SSE, AVX, AVX2 and
AVX512 versions for libmvec as per vector ABI.  It also contains
accuracy and ABI tests for vector erf/erff with regenerated ulps.

Reviewed-by: H.J. Lu <hjl.tools@gmail.com>
2021-12-29 11:38:44 -08:00
Sunil K Pandey
0625489ccc x86-64: Add vector acosh/acoshf implementation to libmvec
Implement vectorized acosh/acoshf containing SSE, AVX, AVX2 and
AVX512 versions for libmvec as per vector ABI.  It also contains
accuracy and ABI tests for vector acosh/acoshf with regenerated ulps.

Reviewed-by: H.J. Lu <hjl.tools@gmail.com>
2021-12-29 11:38:39 -08:00
Sunil K Pandey
6dea4dd3da x86-64: Add vector atanh/atanhf implementation to libmvec
Implement vectorized atanh/atanhf containing SSE, AVX, AVX2 and
AVX512 versions for libmvec as per vector ABI.  It also contains
accuracy and ABI tests for vector atanh/atanhf with regenerated ulps.

Reviewed-by: H.J. Lu <hjl.tools@gmail.com>
2021-12-29 11:38:34 -08:00
Sunil K Pandey
74265c16ab x86-64: Add vector log1p/log1pf implementation to libmvec
Implement vectorized log1p/log1pf containing SSE, AVX, AVX2 and
AVX512 versions for libmvec as per vector ABI.  It also contains
accuracy and ABI tests for vector log1p/log1pf with regenerated ulps.

Reviewed-by: H.J. Lu <hjl.tools@gmail.com>
2021-12-29 11:38:27 -08:00
Sunil K Pandey
7e1722fec8 x86-64: Add vector log2/log2f implementation to libmvec
Implement vectorized log2/log2f containing SSE, AVX, AVX2 and
AVX512 versions for libmvec as per vector ABI.  It also contains
accuracy and ABI tests for vector log2/log2f with regenerated ulps.

Reviewed-by: H.J. Lu <hjl.tools@gmail.com>
2021-12-29 11:38:21 -08:00
Sunil K Pandey
8f8566026d x86-64: Add vector log10/log10f implementation to libmvec
Implement vectorized log10/log10f containing SSE, AVX, AVX2 and
AVX512 versions for libmvec as per vector ABI.  It also contains
accuracy and ABI tests for vector log10/log10f with regenerated ulps.

Reviewed-by: H.J. Lu <hjl.tools@gmail.com>
2021-12-29 11:38:15 -08:00
Sunil K Pandey
2941a24f8c x86-64: Add vector atan2/atan2f implementation to libmvec
Implement vectorized atan2/atan2f containing SSE, AVX, AVX2 and
AVX512 versions for libmvec as per vector ABI.  It also contains
accuracy and ABI tests for vector atan2/atan2f with regenerated ulps.

Reviewed-by: H.J. Lu <hjl.tools@gmail.com>
2021-12-29 11:38:09 -08:00
Sunil K Pandey
2bf02c5843 x86-64: Add vector cbrt/cbrtf implementation to libmvec
Implement vectorized cbrt/cbrtf containing SSE, AVX, AVX2 and
AVX512 versions for libmvec as per vector ABI.  It also contains
accuracy and ABI tests for vector cbrt/cbrtf with regenerated ulps.

Reviewed-by: H.J. Lu <hjl.tools@gmail.com>
2021-12-29 11:38:02 -08:00
Sunil K Pandey
aa1809a1df x86-64: Add vector sinh/sinhf implementation to libmvec
Implement vectorized sinh/sinhf containing SSE, AVX, AVX2 and
AVX512 versions for libmvec as per vector ABI.  It also contains
accuracy and ABI tests for vector sinh/sinhf with regenerated ulps.

Reviewed-by: H.J. Lu <hjl.tools@gmail.com>
2021-12-29 11:37:55 -08:00
Sunil K Pandey
76ddc74e86 x86-64: Add vector expm1/expm1f implementation to libmvec
Implement vectorized expm1/expm1f containing SSE, AVX, AVX2 and
AVX512 versions for libmvec as per vector ABI.  It also contains
accuracy and ABI tests for vector expm1/expm1f with regenerated ulps.

Reviewed-by: H.J. Lu <hjl.tools@gmail.com>
2021-12-29 11:37:49 -08:00
Sunil K Pandey
ef7ea9c132 x86-64: Add vector cosh/coshf implementation to libmvec
Implement vectorized cosh/coshf containing SSE, AVX, AVX2 and
AVX512 versions for libmvec as per vector ABI.  It also contains
accuracy and ABI tests for vector cosh/coshf with regenerated ulps.

Reviewed-by: H.J. Lu <hjl.tools@gmail.com>
2021-12-29 11:37:42 -08:00
Sunil K Pandey
8b726453d5 x86-64: Add vector exp10/exp10f implementation to libmvec
Implement vectorized exp10/exp10f containing SSE, AVX, AVX2 and
AVX512 versions for libmvec as per vector ABI.  It also contains
accuracy and ABI tests for vector exp10/exp10f with regenerated ulps.

Reviewed-by: H.J. Lu <hjl.tools@gmail.com>
2021-12-29 11:37:35 -08:00
Sunil K Pandey
3fc9ccc20b x86-64: Add vector exp2/exp2f implementation to libmvec
Implement vectorized exp2/exp2f containing SSE, AVX, AVX2 and
AVX512 versions for libmvec as per vector ABI.  It also contains
accuracy and ABI tests for vector exp2/exp2f with regenerated ulps.

Reviewed-by: H.J. Lu <hjl.tools@gmail.com>
2021-12-29 11:37:29 -08:00
Sunil K Pandey
37475ba883 x86-64: Add vector hypot/hypotf implementation to libmvec
Implement vectorized hypot/hypotf containing SSE, AVX, AVX2 and
AVX512 versions for libmvec as per vector ABI.  It also contains
accuracy and ABI tests for vector hypot/hypotf with regenerated ulps.

Reviewed-by: H.J. Lu <hjl.tools@gmail.com>
2021-12-29 11:37:21 -08:00
Sunil K Pandey
11c01de14c x86-64: Add vector asin/asinf implementation to libmvec
Implement vectorized asin/asinf containing SSE, AVX, AVX2 and
AVX512 versions for libmvec as per vector ABI.  It also contains
accuracy and ABI tests for vector asin/asinf with regenerated ulps.

Reviewed-by: H.J. Lu <hjl.tools@gmail.com>
2021-12-29 11:37:03 -08:00
Sunil K Pandey
146310177a x86-64: Add vector atan/atanf implementation to libmvec
Implement vectorized atan/atanf containing SSE, AVX, AVX2 and
AVX512 versions for libmvec as per vector ABI.  It also contains
accuracy and ABI tests for vector atan/atanf with regenerated ulps.

Reviewed-by: H.J. Lu <hjl.tools@gmail.com>
2021-12-29 11:36:46 -08:00
Sunil K Pandey
f20f980c71 x86-64: Add vector acos/acosf implementation to libmvec
Implement vectorized acos/acosf containing SSE, AVX, AVX2 and
AVX512 versions for libmvec as per vector ABI.  It also contains
accuracy and ABI tests for vector acos/acosf with regenerated ulps.

Reviewed-by: H.J. Lu <hjl.tools@gmail.com>
2021-12-22 13:03:14 -08:00
Paul Eggert
2b778ceb40 Update copyright dates with scripts/update-copyrights
I used these shell commands:

../glibc/scripts/update-copyrights $PWD/../gnulib/build-aux/update-copyright
(cd ../glibc && git commit -am"[this commit message]")

and then ignored the output, which consisted lines saying "FOO: warning:
copyright statement not found" for each of 6694 files FOO.
I then removed trailing white space from benchtests/bench-pthread-locks.c
and iconvdata/tst-iconv-big5-hkscs-to-2ucs4.c, to work around this
diagnostic from Savannah:
remote: *** pre-commit check failed ...
remote: *** error: lines with trailing whitespace found
remote: error: hook declined to update refs/heads/master
2021-01-02 12:17:34 -08:00
Joseph Myers
d614a75396 Update copyright dates with scripts/update-copyrights. 2020-01-01 00:14:33 +00:00
Paul Eggert
5a82c74822 Prefer https to http for gnu.org and fsf.org URLs
Also, change sources.redhat.com to sourceware.org.
This patch was automatically generated by running the following shell
script, which uses GNU sed, and which avoids modifying files imported
from upstream:

sed -ri '
  s,(http|ftp)(://(.*\.)?(gnu|fsf|sourceware)\.org($|[^.]|\.[^a-z])),https\2,g
  s,(http|ftp)(://(.*\.)?)sources\.redhat\.com($|[^.]|\.[^a-z]),https\2sourceware.org\4,g
' \
  $(find $(git ls-files) -prune -type f \
      ! -name '*.po' \
      ! -name 'ChangeLog*' \
      ! -path COPYING ! -path COPYING.LIB \
      ! -path manual/fdl-1.3.texi ! -path manual/lgpl-2.1.texi \
      ! -path manual/texinfo.tex ! -path scripts/config.guess \
      ! -path scripts/config.sub ! -path scripts/install-sh \
      ! -path scripts/mkinstalldirs ! -path scripts/move-if-change \
      ! -path INSTALL ! -path  locale/programs/charmap-kw.h \
      ! -path po/libc.pot ! -path sysdeps/gnu/errlist.c \
      ! '(' -name configure \
            -execdir test -f configure.ac -o -f configure.in ';' ')' \
      ! '(' -name preconfigure \
            -execdir test -f preconfigure.ac ';' ')' \
      -print)

and then by running 'make dist-prepare' to regenerate files built
from the altered files, and then executing the following to cleanup:

  chmod a+x sysdeps/unix/sysv/linux/riscv/configure
  # Omit irrelevant whitespace and comment-only changes,
  # perhaps from a slightly-different Autoconf version.
  git checkout -f \
    sysdeps/csky/configure \
    sysdeps/hppa/configure \
    sysdeps/riscv/configure \
    sysdeps/unix/sysv/linux/csky/configure
  # Omit changes that caused a pre-commit check to fail like this:
  # remote: *** error: sysdeps/powerpc/powerpc64/ppc-mcount.S: trailing lines
  git checkout -f \
    sysdeps/powerpc/powerpc64/ppc-mcount.S \
    sysdeps/unix/sysv/linux/s390/s390-64/syscall.S
  # Omit change that caused a pre-commit check to fail like this:
  # remote: *** error: sysdeps/sparc/sparc64/multiarch/memcpy-ultra3.S: last line does not end in newline
  git checkout -f sysdeps/sparc/sparc64/multiarch/memcpy-ultra3.S
2019-09-07 02:43:31 -07:00
Joseph Myers
04277e02d7 Update copyright dates with scripts/update-copyrights.
* All files with FSF copyright notices: Update copyright dates
	using scripts/update-copyrights.
	* locale/programs/charmap-kw.h: Regenerated.
	* locale/programs/locfile-kw.h: Likewise.
2019-01-01 00:11:28 +00:00
Joseph Myers
688903eb3e Update copyright dates with scripts/update-copyrights.
* All files with FSF copyright notices: Update copyright dates
	using scripts/update-copyrights.
	* locale/programs/charmap-kw.h: Regenerated.
	* locale/programs/locfile-kw.h: Likewise.
2018-01-01 00:32:25 +00:00
Joseph Myers
bfff8b1bec Update copyright dates with scripts/update-copyrights. 2017-01-01 00:14:16 +00:00
Andrew Senkevich
ee2196bb67 Fixed wrong vector sincos/sincosf ABI to have it compatible with
current vector function declaration "#pragma omp declare simd notinbranch",
according to which vector sincos should have vector of pointers for second and
third parameters. It is fixed with implementation as wrapper to version
having second and third parameters as pointers.

    [BZ #20024]
    * sysdeps/x86/fpu/test-math-vector-sincos.h: New.
    * sysdeps/x86_64/fpu/multiarch/svml_d_sincos2_core_sse4.S: Fixed ABI
    of this implementation of vector function.
    * sysdeps/x86_64/fpu/multiarch/svml_d_sincos4_core_avx2.S: Likewise.
    * sysdeps/x86_64/fpu/multiarch/svml_d_sincos8_core_avx512.S: Likewise.
    * sysdeps/x86_64/fpu/multiarch/svml_s_sincosf16_core_avx512.S:
    Likewise.
    * sysdeps/x86_64/fpu/multiarch/svml_s_sincosf4_core_sse4.S: Likewise.
    * sysdeps/x86_64/fpu/multiarch/svml_s_sincosf8_core_avx2.S: Likewise.
    * sysdeps/x86_64/fpu/svml_d_sincos2_core.S: Likewise.
    * sysdeps/x86_64/fpu/svml_d_sincos4_core.S: Likewise.
    * sysdeps/x86_64/fpu/svml_d_sincos4_core_avx.S: Likewise.
    * sysdeps/x86_64/fpu/svml_d_sincos8_core.S: Likewise.
    * sysdeps/x86_64/fpu/svml_s_sincosf16_core.S: Likewise.
    * sysdeps/x86_64/fpu/svml_s_sincosf4_core.S: Likewise.
    * sysdeps/x86_64/fpu/svml_s_sincosf8_core.S: Likewise.
    * sysdeps/x86_64/fpu/svml_s_sincosf8_core_avx.S: Likewise.
    * sysdeps/x86_64/fpu/test-double-vlen2-wrappers.c: Use another wrapper
    for testing vector sincos with fixed ABI.
    * sysdeps/x86_64/fpu/test-double-vlen4-avx2-wrappers.c: Likewise.
    * sysdeps/x86_64/fpu/test-double-vlen4-wrappers.c: Likewise.
    * sysdeps/x86_64/fpu/test-double-vlen8-wrappers.c: Likewise.
    * sysdeps/x86_64/fpu/test-float-vlen16-wrappers.c: Likewise.
    * sysdeps/x86_64/fpu/test-float-vlen4-wrappers.c: Likewise.
    * sysdeps/x86_64/fpu/test-float-vlen8-avx2-wrappers.c: Likewise.
    * sysdeps/x86_64/fpu/test-float-vlen8-wrappers.c: Likewise.
    * sysdeps/x86_64/fpu/test-double-libmvec-sincos-avx.c: New test.
    * sysdeps/x86_64/fpu/test-double-libmvec-sincos-avx2.c: Likewise.
    * sysdeps/x86_64/fpu/test-double-libmvec-sincos-avx512.c: Likewise.
    * sysdeps/x86_64/fpu/test-double-libmvec-sincos.c: Likewise.
    * sysdeps/x86_64/fpu/test-float-libmvec-sincosf-avx.c: Likewise.
    * sysdeps/x86_64/fpu/test-float-libmvec-sincosf-avx2.c: Likewise.
    * sysdeps/x86_64/fpu/test-float-libmvec-sincosf-avx512.c: Likewise.
    * sysdeps/x86_64/fpu/test-float-libmvec-sincosf.c: Likewise.
    * sysdeps/x86_64/fpu/Makefile: Added new tests.
2016-07-01 14:15:38 +03:00
Joseph Myers
f7a9f785e5 Update copyright dates with scripts/update-copyrights. 2016-01-04 16:05:18 +00:00
Joseph Myers
f9536db790 Refactor libm tests.
This patch refactors the libm tests using libm-test.inc to reduce the
level of duplicate definitions.  New headers are created for the
definitions shared by tests for a particular type; by tests of inline
functions; by tests of non-inline functions; by scalar tests; and by
vector tests.  The unused MATHCONST macro is removed.  A new macro
VEC_LEN is added to the vector headers to allow the macros defining
wrappers for vector functions to be defined once, instead of six times
each (differing only in vector length) as before.  There is still
scope for further refactoring, but this seems a useful start.

Tested for x86_64.

	* math/test-double.h: New file.
	* math/test-float.h: Likewise.
	* math/test-ldouble.h: Likewise.
	* math/test-math-inline.h: Likewise.
	* math/test-math-no-inline.h: Likewise.
	* math/test-math-scalar.h: Likewise.
	* math/test-math-vector.h: Likewise.
	* math/test-vec-loop.h: Remove file.  Contents moved into
	test-math-vector.h.
	* math/libm-test.inc (MATHCONST): Do not document macro.
	* math/test-double.c: Include test-double.h, test-math-no-inline.h
	and test-math-scalar.h.
	(FUNC): Remove macro.
	(FUNC_TEST): Likewise.
	(FLOAT): Likewise.
	(MATHCONST): Likewise.
	(PRINTF_EXPR): Likewise.
	(PRINTF_XEXPR): Likewise.
	(PRINTF_NEXPR): Likewise.
	(TEST_DOUBLE): Likewise.
	(TEST_MATHVEC): Likewise.
	(__NO_MATH_INLINES): Likewise.
	* math/test-float.c: Include test-float.h, test-math-no-inline.h
	and test-math-scalar.h.
	(FUNC): Remove macro.
	(FUNC_TEST): Likewise.
	(FLOAT): Likewise.
	(MATHCONST): Likewise.
	(PRINTF_EXPR): Likewise.
	(PRINTF_XEXPR): Likewise.
	(PRINTF_NEXPR): Likewise.
	(TEST_FLOAT): Likewise.
	(TEST_MATHVEC): Likewise.
	(__NO_MATH_INLINES): Likewise.
	* math/test-idouble.c: Include test-double.h, test-math-inline.h
	and test-math-scalar.h.
	(FUNC): Remove macro.
	(FUNC_TEST): Likewise.
	(FLOAT): Likewise.
	(MATHCONST): Likewise.
	(PRINTF_EXPR): Likewise.
	(PRINTF_XEXPR): Likewise.
	(PRINTF_NEXPR): Likewise.
	(TEST_DOUBLE): Likewise.
	(TEST_MATHVEC): Likewise.
	(TEST_INLINE): Likewise.
	(__NO_MATH_INLINES): Likewise.
	* math/test-ifloat.c: Include test-float.h, test-math-inline.h and
	test-math-scalar.h.
	(FUNC): Remove macro.
	(FUNC_TEST): Likewise.
	(FLOAT): Likewise.
	(MATHCONST): Likewise.
	(PRINTF_EXPR): Likewise.
	(PRINTF_XEXPR): Likewise.
	(PRINTF_NEXPR): Likewise.
	(TEST_FLOAT): Likewise.
	(TEST_MATHVEC): Likewise.
	(TEST_INLINE): Likewise.
	(__NO_MATH_INLINES): Likewise.
	* math/test-ildoubl.c: Include test-ldouble.h, test-math-inline.h
	and test-math-scalar.h.
	(FUNC): Remove macro.
	(FUNC_TEST): Likewise.
	(FLOAT): Likewise.
	(MATHCONST): Likewise.
	(PRINTF_EXPR): Likewise.
	(PRINTF_XEXPR): Likewise.
	(PRINTF_NEXPR): Likewise.
	(TEST_LDOUBLE): Likewise.
	(TEST_MATHVEC): Likewise.
	(TEST_INLINE): Likewise.
	(__NO_MATH_INLINES): Likewise.
	* math/test-ldouble.c: Include test-ldouble.h,
	test-math-no-inline.h and test-math-scalar.h.
	(FUNC): Remove macro.
	(FUNC_TEST): Likewise.
	(FLOAT): Likewise.
	(MATHCONST): Likewise.
	(PRINTF_EXPR): Likewise.
	(PRINTF_XEXPR): Likewise.
	(PRINTF_NEXPR): Likewise.
	(TEST_LDOUBLE): Likewise.
	(TEST_MATHVEC): Likewise.
	(__NO_MATH_INLINES): Likewise.
	* math/test-double-vlen2.h: Include test-double.h,
	test-math-no-inline.h and test-math-vector.h.
	(FLOAT): Remove macro.
	(FUNC): Likewise.
	(MATHCONST): Likewise.
	(PRINTF_EXPR): Likewise.
	(PRINTF_XEXPR): Likewise.
	(PRINTF_NEXPR): Likewise.
	(TEST_DOUBLE): Likewise.
	(TEST_MATHVEC): Likewise.
	(__NO_MATH_INLINES): Likewise.
	(CNCT): Likewise.
	(CONCAT): Likewise.
	(WRAPPER_NAME): Likewise.
	(WRAPPER_DECL): Likewise.
	(WRAPPER_DECL_ff): Likewise.
	(WRAPPER_DECL_fFF): Likewise.
	(VECTOR_WRAPPER): Likewise.
	(VECTOR_WRAPPER_ff): Likewise.
	(VECTOR_WRAPPER_fFF): Likewise.
	(VEC_LEN): New macro.
	* math/test-double-vlen4.h: Include test-double.h,
	test-math-no-inline.h and test-math-vector.h.
	(FLOAT): Remove macro.
	(FUNC): Likewise.
	(MATHCONST): Likewise.
	(PRINTF_EXPR): Likewise.
	(PRINTF_XEXPR): Likewise.
	(PRINTF_NEXPR): Likewise.
	(TEST_DOUBLE): Likewise.
	(TEST_MATHVEC): Likewise.
	(__NO_MATH_INLINES): Likewise.
	(CNCT): Likewise.
	(CONCAT): Likewise.
	(WRAPPER_NAME): Likewise.
	(WRAPPER_DECL): Likewise.
	(WRAPPER_DECL_ff): Likewise.
	(WRAPPER_DECL_fFF): Likewise.
	(VECTOR_WRAPPER): Likewise.
	(VECTOR_WRAPPER_ff): Likewise.
	(VECTOR_WRAPPER_fFF): Likewise.
	(VEC_LEN): New macro.
	* math/test-double-vlen8.h: Include test-double.h,
	test-math-no-inline.h and test-math-vector.h.
	(FLOAT): Remove macro.
	(FUNC): Likewise.
	(MATHCONST): Likewise.
	(PRINTF_EXPR): Likewise.
	(PRINTF_XEXPR): Likewise.
	(PRINTF_NEXPR): Likewise.
	(TEST_DOUBLE): Likewise.
	(TEST_MATHVEC): Likewise.
	(__NO_MATH_INLINES): Likewise.
	(CNCT): Likewise.
	(CONCAT): Likewise.
	(WRAPPER_NAME): Likewise.
	(WRAPPER_DECL): Likewise.
	(WRAPPER_DECL_ff): Likewise.
	(WRAPPER_DECL_fFF): Likewise.
	(VECTOR_WRAPPER): Likewise.
	(VECTOR_WRAPPER_ff): Likewise.
	(VECTOR_WRAPPER_fFF): Likewise.
	(VEC_LEN): New macro.
	* math/test-float-vlen4.h: Include test-float.h,
	test-math-no-inline.h and test-math-vector.h.
	(FLOAT): Remove macro.
	(FUNC): Likewise.
	(MATHCONST): Likewise.
	(PRINTF_EXPR): Likewise.
	(PRINTF_XEXPR): Likewise.
	(PRINTF_NEXPR): Likewise.
	(TEST_FLOAT): Likewise.
	(TEST_MATHVEC): Likewise.
	(__NO_MATH_INLINES): Likewise.
	(CNCT): Likewise.
	(CONCAT): Likewise.
	(WRAPPER_NAME): Likewise.
	(WRAPPER_DECL): Likewise.
	(WRAPPER_DECL_ff): Likewise.
	(WRAPPER_DECL_fFF): Likewise.
	(VECTOR_WRAPPER): Likewise.
	(VECTOR_WRAPPER_ff): Likewise.
	(VECTOR_WRAPPER_fFF): Likewise.
	(VEC_LEN): New macro.
	* math/test-float-vlen8.h: Include test-float.h,
	test-math-no-inline.h and test-math-vector.h.
	(FLOAT): Remove macro.
	(FUNC): Likewise.
	(MATHCONST): Likewise.
	(PRINTF_EXPR): Likewise.
	(PRINTF_XEXPR): Likewise.
	(PRINTF_NEXPR): Likewise.
	(TEST_FLOAT): Likewise.
	(TEST_MATHVEC): Likewise.
	(__NO_MATH_INLINES): Likewise.
	(CNCT): Likewise.
	(CONCAT): Likewise.
	(WRAPPER_NAME): Likewise.
	(WRAPPER_DECL): Likewise.
	(WRAPPER_DECL_ff): Likewise.
	(WRAPPER_DECL_fFF): Likewise.
	(VECTOR_WRAPPER): Likewise.
	(VECTOR_WRAPPER_ff): Likewise.
	(VECTOR_WRAPPER_fFF): Likewise.
	(VEC_LEN): New macro.
	* math/test-float-vlen16.h: Include test-float.h,
	test-math-no-inline.h and test-math-vector.h.
	(FLOAT): Remove macro.
	(FUNC): Likewise.
	(MATHCONST): Likewise.
	(PRINTF_EXPR): Likewise.
	(PRINTF_XEXPR): Likewise.
	(PRINTF_NEXPR): Likewise.
	(TEST_FLOAT): Likewise.
	(TEST_MATHVEC): Likewise.
	(__NO_MATH_INLINES): Likewise.
	(CNCT): Likewise.
	(CONCAT): Likewise.
	(WRAPPER_NAME): Likewise.
	(WRAPPER_DECL): Likewise.
	(WRAPPER_DECL_ff): Likewise.
	(WRAPPER_DECL_fFF): Likewise.
	(VECTOR_WRAPPER): Likewise.
	(VECTOR_WRAPPER_ff): Likewise.
	(VECTOR_WRAPPER_fFF): Likewise.
	(VEC_LEN): New macro.
	* sysdeps/x86_64/fpu/test-double-vlen2-wrappers.c: Do not include
	test-vec-loop.h.
	* sysdeps/x86_64/fpu/test-double-vlen4-wrappers.c: Likewise.
	* sysdeps/x86_64/fpu/test-double-vlen4-avx2-wrappers.c: Likewise.
	* sysdeps/x86_64/fpu/test-double-vlen8-wrappers.c: Likewise.
	* sysdeps/x86_64/fpu/test-float-vlen4-wrappers.c: Likewise.
	* sysdeps/x86_64/fpu/test-float-vlen8-wrappers.c: Likewise.
	* sysdeps/x86_64/fpu/test-float-vlen8-avx2-wrappers.c: Likewise.
	* sysdeps/x86_64/fpu/test-float-vlen16-wrappers.c: Likewise.
2015-06-24 23:27:18 +00:00
Andrew Senkevich
c9a8c526ac Vector sincos for x86_64 and tests.
Here is implementation of vectorized sincos containing SSE, AVX,
AVX2 and AVX512 versions according to Vector ABI
<https://groups.google.com/forum/#!topic/x86-64-abi/LmppCfN1rZ4>.

    * NEWS: Mention addition of x86_64 vector sincos.
    * bits/libm-simd-decl-stubs.h: Added stubs for sincos.
    * math/math.h (__MATHDECL_VEC): New macro.
    * math/bits/mathcalls.h: Added sincos declaration with __MATHDECL_VEC.
    * math/gen-libm-have-vector-test.sh: Added generation of sincos wrapper
    declaration under condition.
    * math/test-vec-loop.h (TEST_VEC_LOOP): Refactored.
    * math/test-double-vlen2.h: Added wrapper for sincos tests, reflected
    TEST_VEC_LOOP change.
    * math/test-double-vlen4.h: Likewise.
    * math/test-double-vlen8.h: Likewise.
    * math/test-float-vlen16.h: Reflected TEST_VEC_LOOP change.
    * math/test-float-vlen4.h: Likewise.
    * math/test-float-vlen8.h: Likewise.
    * sysdeps/unix/sysv/linux/x86_64/libmvec.abilist: New symbols added.
    * sysdeps/x86/fpu/bits/math-vector.h: Added sincos SIMD declaration.
    * sysdeps/x86_64/fpu/Makefile (libmvec-support): Added new files.
    * sysdeps/x86_64/fpu/Versions: New versions added.
    * sysdeps/x86_64/fpu/libm-test-ulps: Regenerated.
    * sysdeps/x86_64/fpu/multiarch/Makefile (libmvec-sysdep_routines):
    Added build of SSE, AVX2 and AVX512 IFUNC versions.
    * sysdeps/x86_64/fpu/multiarch/svml_d_sincos2_core.S: New file.
    * sysdeps/x86_64/fpu/multiarch/svml_d_sincos2_core_sse4.S: New file.
    * sysdeps/x86_64/fpu/multiarch/svml_d_sincos4_core.S: New file.
    * sysdeps/x86_64/fpu/multiarch/svml_d_sincos4_core_avx2.S: New file.
    * sysdeps/x86_64/fpu/multiarch/svml_d_sincos8_core.S: New file.
    * sysdeps/x86_64/fpu/multiarch/svml_d_sincos8_core_avx512.S: New file.
    * sysdeps/x86_64/fpu/svml_d_sincos2_core.S: New file.
    * sysdeps/x86_64/fpu/svml_d_sincos4_core.S: New file.
    * sysdeps/x86_64/fpu/svml_d_sincos4_core_avx.S: New file.
    * sysdeps/x86_64/fpu/svml_d_sincos8_core.S: New file.
    * sysdeps/x86_64/fpu/svml_d_sincos_data.S: New file.
    * sysdeps/x86_64/fpu/svml_d_sincos_data.h: New file.
    * sysdeps/x86_64/fpu/svml_d_wrapper_impl.h: Added wrappers for sincos.
    * sysdeps/x86_64/fpu/test-double-vlen2-wrappers.c: Vector sincos tests.
    * sysdeps/x86_64/fpu/test-double-vlen2.c: Likewise.
    * sysdeps/x86_64/fpu/test-double-vlen4-avx2-wrappers.c: Likewise.
    * sysdeps/x86_64/fpu/test-double-vlen4-avx2.c: Likewise.
    * sysdeps/x86_64/fpu/test-double-vlen4-wrappers.c: Likewise.
    * sysdeps/x86_64/fpu/test-double-vlen4.c: Likewise.
    * sysdeps/x86_64/fpu/test-double-vlen8-wrappers.c: Likewise.
    * sysdeps/x86_64/fpu/test-double-vlen8.c: Likewise.
2015-06-18 17:55:55 +03:00
Andrew Senkevich
c10b9b13f7 Vector pow for x86_64 and tests.
Here is implementation of vectorized pow containing SSE, AVX,
AVX2 and AVX512 versions according to Vector ABI
<https://groups.google.com/forum/#!topic/x86-64-abi/LmppCfN1rZ4>.

  * bits/libm-simd-decl-stubs.h: Added stubs for pow.
    * math/bits/mathcalls.h: Added pow declaration with __MATHCALL_VEC.
    * sysdeps/unix/sysv/linux/x86_64/libmvec.abilist: New versions added.
    * sysdeps/x86/fpu/bits/math-vector.h: Added SIMD declaration and asm
    redirections for pow.
    * sysdeps/x86_64/fpu/Makefile (libmvec-support): Added new files.
    * sysdeps/x86_64/fpu/Versions: New versions added.
    * sysdeps/x86_64/fpu/libm-test-ulps: Regenerated.
    * sysdeps/x86_64/fpu/multiarch/Makefile (libmvec-sysdep_routines): Added
    build of SSE, AVX2 and AVX512 IFUNC versions.
    * sysdeps/x86_64/fpu/svml_d_wrapper_impl.h: Added 2 argument wrappers.
    * sysdeps/x86_64/fpu/multiarch/svml_d_pow2_core.S: New file.
    * sysdeps/x86_64/fpu/multiarch/svml_d_pow2_core_sse4.S: New file.
    * sysdeps/x86_64/fpu/multiarch/svml_d_pow4_core.S: New file.
    * sysdeps/x86_64/fpu/multiarch/svml_d_pow4_core_avx2.S: New file.
    * sysdeps/x86_64/fpu/multiarch/svml_d_pow8_core.S: New file.
    * sysdeps/x86_64/fpu/multiarch/svml_d_pow8_core_avx512.S: New file.
    * sysdeps/x86_64/fpu/svml_d_pow2_core.S: New file.
    * sysdeps/x86_64/fpu/svml_d_pow4_core.S: New file.
    * sysdeps/x86_64/fpu/svml_d_pow4_core_avx.S: New file.
    * sysdeps/x86_64/fpu/svml_d_pow8_core.S: New file.
    * sysdeps/x86_64/fpu/svml_d_pow_data.S: New file.
    * sysdeps/x86_64/fpu/svml_d_pow_data.h: New file.
    * sysdeps/x86_64/fpu/test-double-vlen2-wrappers.c: Added vector pow test.
    * sysdeps/x86_64/fpu/test-double-vlen2.c: Likewise.
    * sysdeps/x86_64/fpu/test-double-vlen4-avx2-wrappers.c: Likewise.
    * sysdeps/x86_64/fpu/test-double-vlen4-avx2.c: Likewise.
    * sysdeps/x86_64/fpu/test-double-vlen4-wrappers.c: Likewise.
    * sysdeps/x86_64/fpu/test-double-vlen4.c: Likewise.
    * sysdeps/x86_64/fpu/test-double-vlen8-wrappers.c: Likewise.
    * sysdeps/x86_64/fpu/test-double-vlen8.c: Likewise.
    * NEWS: Mention addition of x86_64 vector pow.
2015-06-17 16:22:26 +03:00
Andrew Senkevich
9c02f663f6 Vector exp for x86_64 and tests.
Here is implementation of vectorized exp containing SSE, AVX,
AVX2 and AVX512 versions according to Vector ABI
<https://groups.google.com/forum/#!topic/x86-64-abi/LmppCfN1rZ4>.

    * bits/libm-simd-decl-stubs.h: Added stubs for exp.
    * math/bits/mathcalls.h: Added exp declaration with __MATHCALL_VEC.
    * sysdeps/unix/sysv/linux/x86_64/libmvec.abilist: New versions added.
    * sysdeps/x86/fpu/bits/math-vector.h: Added SIMD declaration and asm
    redirections for exp.
    * sysdeps/x86_64/fpu/Makefile (libmvec-support): Added new files.
    * sysdeps/x86_64/fpu/Versions: New versions added.
    * sysdeps/x86_64/fpu/libm-test-ulps: Regenerated.
    * sysdeps/x86_64/fpu/multiarch/Makefile (libmvec-sysdep_routines): Added
    build of SSE, AVX2 and AVX512 IFUNC versions.
    * sysdeps/x86_64/fpu/multiarch/svml_d_exp2_core.S: New file.
    * sysdeps/x86_64/fpu/multiarch/svml_d_exp2_core_sse4.S: New file.
    * sysdeps/x86_64/fpu/multiarch/svml_d_exp4_core.S: New file.
    * sysdeps/x86_64/fpu/multiarch/svml_d_exp4_core_avx2.S: New file.
    * sysdeps/x86_64/fpu/multiarch/svml_d_exp8_core.S: New file.
    * sysdeps/x86_64/fpu/multiarch/svml_d_exp8_core_avx512.S: New file.
    * sysdeps/x86_64/fpu/svml_d_exp2_core.S: New file.
    * sysdeps/x86_64/fpu/svml_d_exp4_core.S: New file.
    * sysdeps/x86_64/fpu/svml_d_exp4_core_avx.S: New file.
    * sysdeps/x86_64/fpu/svml_d_exp8_core.S: New file.
    * sysdeps/x86_64/fpu/svml_d_exp_data.S: New file.
    * sysdeps/x86_64/fpu/svml_d_exp_data.h: New file.
    * sysdeps/x86_64/fpu/test-double-vlen2-wrappers.c: Added vector exp test.
    * sysdeps/x86_64/fpu/test-double-vlen2.c: Likewise.
    * sysdeps/x86_64/fpu/test-double-vlen4-avx2-wrappers.c: Likewise.
    * sysdeps/x86_64/fpu/test-double-vlen4-avx2.c: Likewise.
    * sysdeps/x86_64/fpu/test-double-vlen4-wrappers.c: Likewise.
    * sysdeps/x86_64/fpu/test-double-vlen4.c: Likewise.
    * sysdeps/x86_64/fpu/test-double-vlen8-wrappers.c: Likewise.
    * sysdeps/x86_64/fpu/test-double-vlen8.c: Likewise.
    * NEWS: Mention addition of x86_64 vector exp.
2015-06-17 15:58:05 +03:00
Andrew Senkevich
6af25acc7b Vector log for x86_64 and tests.
Here is implementation of vectorized log containing SSE, AVX,
AVX2 and AVX512 versions according to Vector ABI
<https://groups.google.com/forum/#!topic/x86-64-abi/LmppCfN1rZ4>.

    * bits/libm-simd-decl-stubs.h: Added stubs for log.
    * math/bits/mathcalls.h: Added log declaration with __MATHCALL_VEC.
    * sysdeps/unix/sysv/linux/x86_64/libmvec.abilist: New versions added.
    * sysdeps/x86/fpu/bits/math-vector.h: Added SIMD declaration and asm
    redirections for log.
    * sysdeps/x86_64/fpu/Makefile (libmvec-support): Added new files.
    * sysdeps/x86_64/fpu/Versions: New versions added.
    * sysdeps/x86_64/fpu/libm-test-ulps: Regenerated.
    * sysdeps/x86_64/fpu/multiarch/Makefile (libmvec-sysdep_routines): Added
    build of SSE, AVX2 and AVX512 IFUNC versions.
    * sysdeps/x86_64/fpu/multiarch/svml_d_log2_core.S: New file.
    * sysdeps/x86_64/fpu/multiarch/svml_d_log2_core_sse4.S: New file.
    * sysdeps/x86_64/fpu/multiarch/svml_d_log4_core.S: New file.
    * sysdeps/x86_64/fpu/multiarch/svml_d_log4_core_avx2.S: New file.
    * sysdeps/x86_64/fpu/multiarch/svml_d_log8_core.S: New file.
    * sysdeps/x86_64/fpu/multiarch/svml_d_log8_core_avx512.S: New file.
    * sysdeps/x86_64/fpu/svml_d_log2_core.S: New file.
    * sysdeps/x86_64/fpu/svml_d_log4_core.S: New file.
    * sysdeps/x86_64/fpu/svml_d_log4_core_avx.S: New file.
    * sysdeps/x86_64/fpu/svml_d_log8_core.S: New file.
    * sysdeps/x86_64/fpu/svml_d_log_data.S: New file.
    * sysdeps/x86_64/fpu/svml_d_log_data.h: New file.
    * sysdeps/x86_64/fpu/test-double-vlen2-wrappers.c: Added vector log test.
    * sysdeps/x86_64/fpu/test-double-vlen2.c: Likewise.
    * sysdeps/x86_64/fpu/test-double-vlen4-avx2-wrappers.c: Likewise.
    * sysdeps/x86_64/fpu/test-double-vlen4-avx2.c: Likewise.
    * sysdeps/x86_64/fpu/test-double-vlen4-wrappers.c: Likewise.
    * sysdeps/x86_64/fpu/test-double-vlen4.c: Likewise.
    * sysdeps/x86_64/fpu/test-double-vlen8-wrappers.c: Likewise.
    * sysdeps/x86_64/fpu/test-double-vlen8.c: Likewise.
    * NEWS: Mention addition of x86_64 vector log.
2015-06-17 15:38:29 +03:00
Andrew Senkevich
4b9c2b707b Vector sin for x86_64 and tests.
Here is implementation of vectorized sin containing SSE, AVX,
AVX2 and AVX512 versions according to Vector ABI
<https://groups.google.com/forum/#!topic/x86-64-abi/LmppCfN1rZ4>.

    * bits/libm-simd-decl-stubs.h: Added stubs for sin.
    * math/bits/mathcalls.h: Added sin declaration with __MATHCALL_VEC.
    * sysdeps/unix/sysv/linux/x86_64/libmvec.abilist: New versions added.
    * sysdeps/x86/fpu/bits/math-vector.h: SIMD declaration for sin.
    * sysdeps/x86_64/fpu/Makefile (libmvec-support): Added new files.
    * sysdeps/x86_64/fpu/Versions: New versions added.
    * sysdeps/x86_64/fpu/libm-test-ulps: Regenerated.
    * sysdeps/x86_64/fpu/multiarch/Makefile (libmvec-sysdep_routines): Added
    build of SSE, AVX2 and AVX512 IFUNC versions.
    * sysdeps/x86_64/fpu/multiarch/svml_d_sin2_core.S: New file.
    * sysdeps/x86_64/fpu/multiarch/svml_d_sin2_core_sse4.S: New file.
    * sysdeps/x86_64/fpu/multiarch/svml_d_sin4_core.S: New file.
    * sysdeps/x86_64/fpu/multiarch/svml_d_sin4_core_avx2.S: New file.
    * sysdeps/x86_64/fpu/multiarch/svml_d_sin8_core.S: New file.
    * sysdeps/x86_64/fpu/multiarch/svml_d_sin8_core_avx512.S: New file.
    * sysdeps/x86_64/fpu/svml_d_sin2_core.S: New file.
    * sysdeps/x86_64/fpu/svml_d_sin4_core.S: New file.
    * sysdeps/x86_64/fpu/svml_d_sin4_core_avx.S: New file.
    * sysdeps/x86_64/fpu/svml_d_sin8_core.S: New file.
    * sysdeps/x86_64/fpu/svml_d_sin_data.S: New file.
    * sysdeps/x86_64/fpu/svml_d_sin_data.h: New file.
    * sysdeps/x86_64/fpu/test-double-vlen2-wrappers.c: Added vector sin test.
    * sysdeps/x86_64/fpu/test-double-vlen2.c: Likewise.
    * sysdeps/x86_64/fpu/test-double-vlen4-avx2-wrappers.c: Likewise.
    * sysdeps/x86_64/fpu/test-double-vlen4-avx2.c: Likewise.
    * sysdeps/x86_64/fpu/test-double-vlen4-wrappers.c: Likewise.
    * sysdeps/x86_64/fpu/test-double-vlen4.c: Likewise.
    * sysdeps/x86_64/fpu/test-double-vlen8-wrappers.c: Likewise.
    * sysdeps/x86_64/fpu/test-double-vlen8.c: Likewise.
    * NEWS: Mention addition of x86_64 vector sin.
2015-06-11 17:12:38 +03:00
Andrew Senkevich
24a2718f59 Addition of testing infrastructure for vector math functions.
We test vector math functions using scalar tests infrastructure with
help of special wrappers from scalar versions to vector ones. Wrapper
implemented using platform specific vector types and placed in separate
file for compilation with architecture specific options, main part of
test has no such options. With help of system of definitions unfolding
of which is drived from test code we have wrapper called in individual
testing function instead of scalar function. Also system of definitions
includes generated during make check header math/libm-have-vector-test.h
with series of conditional definitions which help to avoid build fails
for functions having no vector versions; runtime architecture check
to prevent runtime fails of test run on inappropriate hardware.

    * math/Makefile: Added rules for vector tests.
    * math/gen-libm-have-vector-test.sh: Added generation of wrapper
    declaration under condition.
    * math/test-double-vlen2.h: New file.
    * math/test-double-vlen4.h: New file.
    * math/test-double-vlen8.h: New file.
    * math/test-vec-loop.h: Added initialization macro.
    * sysdeps/x86_64/fpu/Makefile: Added variables for vector tests.
    * sysdeps/x86_64/fpu/libm-test-ulps: Regenarated.
    * sysdeps/x86_64/fpu/math-tests-arch.h: New file.
    * sysdeps/x86_64/fpu/test-double-vlen2-wrappers.c: New file.
    * sysdeps/x86_64/fpu/test-double-vlen2.c: New file.
    * sysdeps/x86_64/fpu/test-double-vlen4-avx2-wrappers.c: New file.
    * sysdeps/x86_64/fpu/test-double-vlen4-avx2.c: New file.
    * sysdeps/x86_64/fpu/test-double-vlen4-wrappers.c: New file.
    * sysdeps/x86_64/fpu/test-double-vlen4.c: New file.
    * sysdeps/x86_64/fpu/test-double-vlen8-wrappers.c: New file.
    * sysdeps/x86_64/fpu/test-double-vlen8.c: New file.
2015-06-09 14:51:52 +03:00