Commit Graph

31 Commits

Author SHA1 Message Date
Joseph Myers
ec94343f59 Add femode_t functions.
TS 18661-1 defines a type femode_t to represent the set of dynamic
floating-point control modes (such as the rounding mode and trap
enablement modes), and functions fegetmode and fesetmode to manipulate
those modes (without affecting other state such as the raised
exception flags) and a corresponding macro FE_DFL_MODE.

This patch series implements those interfaces for glibc.  This first
patch adds the architecture-independent pieces, the x86 and x86_64
implementations, and the <bits/fenv.h> and ABI baseline updates for
all architectures so glibc keeps building and passing the ABI tests on
all architectures.  Subsequent patches add the fegetmode and fesetmode
implementations for other architectures.

femode_t is generally an integer type - the same type as fenv_t, or as
the single element of fenv_t where fenv_t is a structure containing a
single integer (or the single relevant element, where it has elements
for both status and control registers) - except where architecture
properties or consistency with the fenv_t implementation indicate
otherwise.  FE_DFL_MODE follows FE_DFL_ENV in whether it's a magic
pointer value (-1 cast to const femode_t *), a value that can be
distinguished from valid pointers by its high bits but otherwise
contains a representation of the desired register contents, or a
pointer to a constant variable (the powerpc case; __fe_dfl_mode is
added as an exported constant object, an alias to __fe_dfl_env).

Note that where architectures (that share a register between control
and status bits) gain definitions of new floating-point control or
status bits in future, the implementations of fesetmode for those
architectures may need updating (depending on whether the new bits are
control or status bits and what the implementation does with
previously unknown bits), just like existing implementations of
<fenv.h> functions that take care not to touch reserved bits may need
updating when the set of reserved bits changes.  (As any new bits are
outside the scope of ISO C, that's just a quality-of-implementation
issue for supporting them, not a conformance issue.)

As with fenv_t, femode_t should properly include any software DFP
rounding mode (and for both fenv_t and femode_t I'd consider that
fragment of DFP support appropriate for inclusion in glibc even in the
absence of the rest of libdfp; hardware DFP rounding modes should
already be included if the definitions of which bits are status /
control bits are correct).

Tested for x86_64, x86, mips64 (hard float, and soft float to test the
fallback version), arm (hard float) and powerpc (hard float, soft
float and e500).  Other architecture versions are untested.

	* math/fegetmode.c: New file.
	* math/fesetmode.c: Likewise.
	* sysdeps/i386/fpu/fegetmode.c: Likewise.
	* sysdeps/i386/fpu/fesetmode.c: Likewise.
	* sysdeps/x86_64/fpu/fegetmode.c: Likewise.
	* sysdeps/x86_64/fpu/fesetmode.c: Likewise.
	* math/fenv.h: Update comment on inclusion of <bits/fenv.h>.
	[__GLIBC_USE (IEC_60559_BFP_EXT)] (fegetmode): New function
	declaration.
	[__GLIBC_USE (IEC_60559_BFP_EXT)] (fesetmode): Likewise.
	* bits/fenv.h [__GLIBC_USE (IEC_60559_BFP_EXT)] (femode_t): New
	typedef.
	[__GLIBC_USE (IEC_60559_BFP_EXT)] (FE_DFL_MODE): New macro.
	* sysdeps/aarch64/bits/fenv.h [__GLIBC_USE (IEC_60559_BFP_EXT)]
	(femode_t): New typedef.
	[__GLIBC_USE (IEC_60559_BFP_EXT)] (FE_DFL_MODE): New macro.
	* sysdeps/alpha/fpu/bits/fenv.h [__GLIBC_USE (IEC_60559_BFP_EXT)]
	(femode_t): New typedef.
	[__GLIBC_USE (IEC_60559_BFP_EXT)] (FE_DFL_MODE): New macro.
	* sysdeps/arm/bits/fenv.h [__GLIBC_USE (IEC_60559_BFP_EXT)]
	(femode_t): New typedef.
	[__GLIBC_USE (IEC_60559_BFP_EXT)] (FE_DFL_MODE): New macro.
	* sysdeps/hppa/fpu/bits/fenv.h [__GLIBC_USE (IEC_60559_BFP_EXT)]
	(femode_t): New typedef.
	[__GLIBC_USE (IEC_60559_BFP_EXT)] (FE_DFL_MODE): New macro.
	* sysdeps/ia64/bits/fenv.h [__GLIBC_USE (IEC_60559_BFP_EXT)]
	(femode_t): New typedef.
	[__GLIBC_USE (IEC_60559_BFP_EXT)] (FE_DFL_MODE): New macro.
	* sysdeps/m68k/fpu/bits/fenv.h [__GLIBC_USE (IEC_60559_BFP_EXT)]
	(femode_t): New typedef.
	[__GLIBC_USE (IEC_60559_BFP_EXT)] (FE_DFL_MODE): New macro.
	* sysdeps/microblaze/bits/fenv.h [__GLIBC_USE (IEC_60559_BFP_EXT)]
	(femode_t): New typedef.
	[__GLIBC_USE (IEC_60559_BFP_EXT)] (FE_DFL_MODE): New macro.
	* sysdeps/mips/bits/fenv.h [__GLIBC_USE (IEC_60559_BFP_EXT)]
	(femode_t): New typedef.
	[__GLIBC_USE (IEC_60559_BFP_EXT)] (FE_DFL_MODE): New macro.
	* sysdeps/nios2/bits/fenv.h [__GLIBC_USE (IEC_60559_BFP_EXT)]
	(femode_t): New typedef.
	[__GLIBC_USE (IEC_60559_BFP_EXT)] (FE_DFL_MODE): New macro.
	* sysdeps/powerpc/bits/fenv.h [__GLIBC_USE (IEC_60559_BFP_EXT)]
	(femode_t): New typedef.
	[__GLIBC_USE (IEC_60559_BFP_EXT)] (__fe_dfl_mode): New variable
	declaration.
	[__GLIBC_USE (IEC_60559_BFP_EXT)] (FE_DFL_MODE): New macro.
	* sysdeps/s390/fpu/bits/fenv.h [__GLIBC_USE (IEC_60559_BFP_EXT)]
	(femode_t): New typedef.
	[__GLIBC_USE (IEC_60559_BFP_EXT)] (FE_DFL_MODE): New macro.
	* sysdeps/sh/bits/fenv.h [__GLIBC_USE (IEC_60559_BFP_EXT)]
	(femode_t): New typedef.
	[__GLIBC_USE (IEC_60559_BFP_EXT)] (FE_DFL_MODE): New macro.
	* sysdeps/sparc/fpu/bits/fenv.h [__GLIBC_USE (IEC_60559_BFP_EXT)]
	(femode_t): New typedef.
	[__GLIBC_USE (IEC_60559_BFP_EXT)] (FE_DFL_MODE): New macro.
	* sysdeps/tile/bits/fenv.h [__GLIBC_USE (IEC_60559_BFP_EXT)]
	(femode_t): New typedef.
	[__GLIBC_USE (IEC_60559_BFP_EXT)] (FE_DFL_MODE): New macro.
	* sysdeps/x86/fpu/bits/fenv.h [__GLIBC_USE (IEC_60559_BFP_EXT)]
	(femode_t): New typedef.
	[__GLIBC_USE (IEC_60559_BFP_EXT)] (FE_DFL_MODE): New macro.
	* manual/arith.texi (FE_DFL_MODE): Document macro.
	(fegetmode): Document function.
	(fesetmode): Likewise.
	* math/Versions (fegetmode): New libm symbol at version
	GLIBC_2.25.
	(fesetmode): Likewise.
	* math/Makefile (libm-support): Add fegetmode and fesetmode.
	(tests): Add test-femode and test-femode-traps.
	* math/test-femode-traps.c: New file.
	* math/test-femode.c: Likewise.
	* sysdeps/powerpc/fpu/fenv_const.c (__fe_dfl_mode): Declare as
	alias for __fe_dfl_env.
	* sysdeps/powerpc/nofpu/fenv_const.c (__fe_dfl_mode): Likewise.
	* sysdeps/powerpc/powerpc32/e500/nofpu/fenv_const.c
	(__fe_dfl_mode): Likewise.
	* sysdeps/powerpc/Versions (__fe_dfl_mode): New libm symbol at
	version GLIBC_2.25.
	* sysdeps/nacl/libm.abilist: Update.
	* sysdeps/unix/sysv/linux/aarch64/libm.abilist: Likewise.
	* sysdeps/unix/sysv/linux/alpha/libm.abilist: Likewise.
	* sysdeps/unix/sysv/linux/arm/libm.abilist: Likewise.
	* sysdeps/unix/sysv/linux/hppa/libm.abilist: Likewise.
	* sysdeps/unix/sysv/linux/i386/libm.abilist: Likewise.
	* sysdeps/unix/sysv/linux/ia64/libm.abilist: Likewise.
	* sysdeps/unix/sysv/linux/m68k/coldfire/libm.abilist: Likewise.
	* sysdeps/unix/sysv/linux/m68k/m680x0/libm.abilist: Likewise.
	* sysdeps/unix/sysv/linux/microblaze/libm.abilist: Likewise.
	* sysdeps/unix/sysv/linux/mips/mips32/libm.abilist: Likewise.
	* sysdeps/unix/sysv/linux/mips/mips64/libm.abilist: Likewise.
	* sysdeps/unix/sysv/linux/nios2/libm.abilist: Likewise.
	* sysdeps/unix/sysv/linux/powerpc/powerpc32/fpu/libm.abilist:
	Likewise.
	* sysdeps/unix/sysv/linux/powerpc/powerpc32/nofpu/libm.abilist:
	Likewise.
	* sysdeps/unix/sysv/linux/powerpc/powerpc64/libm-le.abilist:
	Likewise.
	* sysdeps/unix/sysv/linux/powerpc/powerpc64/libm.abilist:
	Likewise.
	* sysdeps/unix/sysv/linux/s390/s390-32/libm.abilist: Likewise.
	* sysdeps/unix/sysv/linux/s390/s390-64/libm.abilist: Likewise.
	* sysdeps/unix/sysv/linux/sh/libm.abilist: Likewise.
	* sysdeps/unix/sysv/linux/sparc/sparc32/libm.abilist: Likewise.
	* sysdeps/unix/sysv/linux/sparc/sparc64/libm.abilist: Likewise.
	* sysdeps/unix/sysv/linux/tile/tilegx/tilegx32/libm.abilist:
	Likewise.
	* sysdeps/unix/sysv/linux/tile/tilegx/tilegx64/libm.abilist:
	Likewise.
	* sysdeps/unix/sysv/linux/tile/tilepro/libm.abilist: Likewise.
	* sysdeps/unix/sysv/linux/x86_64/64/libm.abilist: Likewise.
	* sysdeps/unix/sysv/linux/x86_64/x32/libm.abilist: Likewise.
2016-09-07 16:40:09 +00:00
Joseph Myers
f7a9f785e5 Update copyright dates with scripts/update-copyrights. 2016-01-04 16:05:18 +00:00
Andrew Senkevich
377ed004f2 Utilize x86_64 vector math functions w/o -fopenmp.
This patch allows to use x86_64 vector math functions with GCC 6.*
without OpenMP SIMD constructs.  For additional details please visit
<https://sourceware.org/glibc/wiki/libmvec#Example_2>.

    * sysdeps/x86/fpu/bits/math-vector.h: W/o -fopenmp declare vector math
    functions with GCC 6.* __attribute__ ((__simd__)).
2015-12-07 21:58:26 +03:00
Andrew Senkevich
977a30801f Better workaround for aliases of *_finite symbols in vector math library.
Old workaround based on assembly aliases can lead to link fail (bug 19058).
This patch makes workaround in another way to avoid it.

    [BZ #19058]
    * math/Makefile ($(inst_libdir)/libm.so): Added libmvec_nonshared.a
    to AS_NEEDED.
    * sysdeps/x86/fpu/bits/math-vector.h: Removed code with old workaround.
    * sysdeps/x86_64/fpu/Makefile (libmvec-support,
    libmvec-static-only-routines): Added new file.
    * sysdeps/x86_64/fpu/svml_finite_alias.S: New file.
2015-11-27 16:22:26 +03:00
Andrew Senkevich
a6336cc446 Vector sincosf for x86_64 and tests.
Here is implementation of vectorized sincosf containing SSE, AVX,
AVX2 and AVX512 versions according to Vector ABI
<https://groups.google.com/forum/#!topic/x86-64-abi/LmppCfN1rZ4>.

    * NEWS: Mention addition of x86_64 vector sincosf.
    * math/test-float-vlen16.h: Added wrapper for sincosf tests.
    * math/test-float-vlen4.h: Likewise.
    * math/test-float-vlen8.h: Likewise.
    * sysdeps/unix/sysv/linux/x86_64/libmvec.abilist: New symbols added.
    * sysdeps/x86/fpu/bits/math-vector.h: Added sincosf SIMD declaration.
    * sysdeps/x86_64/fpu/Makefile (libmvec-support): Added new files.
    * sysdeps/x86_64/fpu/Versions: New versions added.
    * sysdeps/x86_64/fpu/libm-test-ulps: Regenerated.
    * sysdeps/x86_64/fpu/multiarch/Makefile (libmvec-sysdep_routines):
    Added build of SSE, AVX2 and AVX512 IFUNC versions.
    * sysdeps/x86_64/fpu/multiarch/svml_s_sincosf16_core.S
    * sysdeps/x86_64/fpu/multiarch/svml_s_sincosf16_core_avx512.S
    * sysdeps/x86_64/fpu/multiarch/svml_s_sincosf4_core.S
    * sysdeps/x86_64/fpu/multiarch/svml_s_sincosf4_core_sse4.S
    * sysdeps/x86_64/fpu/multiarch/svml_s_sincosf8_core.S
    * sysdeps/x86_64/fpu/multiarch/svml_s_sincosf8_core_avx2.S
    * sysdeps/x86_64/fpu/svml_s_sincosf16_core.S
    * sysdeps/x86_64/fpu/svml_s_sincosf4_core.S
    * sysdeps/x86_64/fpu/svml_s_sincosf8_core.S
    * sysdeps/x86_64/fpu/svml_s_sincosf8_core_avx.S
    * sysdeps/x86_64/fpu/svml_s_sincosf_data.S: New file.
    * sysdeps/x86_64/fpu/svml_s_sincosf_data.h: New file.
    * sysdeps/x86_64/fpu/svml_s_wrapper_impl.h: Added 3 argument wrappers.
    * sysdeps/x86_64/fpu/test-float-vlen16.c: : Vector sincosf tests.
    * sysdeps/x86_64/fpu/test-float-vlen16-wrappers.c: Likewise.
    * sysdeps/x86_64/fpu/test-float-vlen4-wrappers.c: Likewise.
    * sysdeps/x86_64/fpu/test-float-vlen4.c: Likewise.
    * sysdeps/x86_64/fpu/test-float-vlen8-avx2-wrappers.c: Likewise.
    * sysdeps/x86_64/fpu/test-float-vlen8-avx2.c: Likewise.
    * sysdeps/x86_64/fpu/test-float-vlen8-wrappers.c: Likewise.
    * sysdeps/x86_64/fpu/test-float-vlen8.c: Likewise.
2015-06-18 20:11:27 +03:00
Andrew Senkevich
c9a8c526ac Vector sincos for x86_64 and tests.
Here is implementation of vectorized sincos containing SSE, AVX,
AVX2 and AVX512 versions according to Vector ABI
<https://groups.google.com/forum/#!topic/x86-64-abi/LmppCfN1rZ4>.

    * NEWS: Mention addition of x86_64 vector sincos.
    * bits/libm-simd-decl-stubs.h: Added stubs for sincos.
    * math/math.h (__MATHDECL_VEC): New macro.
    * math/bits/mathcalls.h: Added sincos declaration with __MATHDECL_VEC.
    * math/gen-libm-have-vector-test.sh: Added generation of sincos wrapper
    declaration under condition.
    * math/test-vec-loop.h (TEST_VEC_LOOP): Refactored.
    * math/test-double-vlen2.h: Added wrapper for sincos tests, reflected
    TEST_VEC_LOOP change.
    * math/test-double-vlen4.h: Likewise.
    * math/test-double-vlen8.h: Likewise.
    * math/test-float-vlen16.h: Reflected TEST_VEC_LOOP change.
    * math/test-float-vlen4.h: Likewise.
    * math/test-float-vlen8.h: Likewise.
    * sysdeps/unix/sysv/linux/x86_64/libmvec.abilist: New symbols added.
    * sysdeps/x86/fpu/bits/math-vector.h: Added sincos SIMD declaration.
    * sysdeps/x86_64/fpu/Makefile (libmvec-support): Added new files.
    * sysdeps/x86_64/fpu/Versions: New versions added.
    * sysdeps/x86_64/fpu/libm-test-ulps: Regenerated.
    * sysdeps/x86_64/fpu/multiarch/Makefile (libmvec-sysdep_routines):
    Added build of SSE, AVX2 and AVX512 IFUNC versions.
    * sysdeps/x86_64/fpu/multiarch/svml_d_sincos2_core.S: New file.
    * sysdeps/x86_64/fpu/multiarch/svml_d_sincos2_core_sse4.S: New file.
    * sysdeps/x86_64/fpu/multiarch/svml_d_sincos4_core.S: New file.
    * sysdeps/x86_64/fpu/multiarch/svml_d_sincos4_core_avx2.S: New file.
    * sysdeps/x86_64/fpu/multiarch/svml_d_sincos8_core.S: New file.
    * sysdeps/x86_64/fpu/multiarch/svml_d_sincos8_core_avx512.S: New file.
    * sysdeps/x86_64/fpu/svml_d_sincos2_core.S: New file.
    * sysdeps/x86_64/fpu/svml_d_sincos4_core.S: New file.
    * sysdeps/x86_64/fpu/svml_d_sincos4_core_avx.S: New file.
    * sysdeps/x86_64/fpu/svml_d_sincos8_core.S: New file.
    * sysdeps/x86_64/fpu/svml_d_sincos_data.S: New file.
    * sysdeps/x86_64/fpu/svml_d_sincos_data.h: New file.
    * sysdeps/x86_64/fpu/svml_d_wrapper_impl.h: Added wrappers for sincos.
    * sysdeps/x86_64/fpu/test-double-vlen2-wrappers.c: Vector sincos tests.
    * sysdeps/x86_64/fpu/test-double-vlen2.c: Likewise.
    * sysdeps/x86_64/fpu/test-double-vlen4-avx2-wrappers.c: Likewise.
    * sysdeps/x86_64/fpu/test-double-vlen4-avx2.c: Likewise.
    * sysdeps/x86_64/fpu/test-double-vlen4-wrappers.c: Likewise.
    * sysdeps/x86_64/fpu/test-double-vlen4.c: Likewise.
    * sysdeps/x86_64/fpu/test-double-vlen8-wrappers.c: Likewise.
    * sysdeps/x86_64/fpu/test-double-vlen8.c: Likewise.
2015-06-18 17:55:55 +03:00
Andrew Senkevich
8aa92022e2 Vector powf for x86_64 and tests.
Here is implementation of vectorized powf containing SSE, AVX,
AVX2 and AVX512 versions according to Vector ABI
<https://groups.google.com/forum/#!topic/x86-64-abi/LmppCfN1rZ4>.

    * sysdeps/unix/sysv/linux/x86_64/libmvec.abilist: New symbols added.
    * sysdeps/x86/fpu/bits/math-vector.h: Added SIMD declaration and asm
    redirections for powf.
    * sysdeps/x86_64/fpu/Makefile (libmvec-support): Added new files.
    * sysdeps/x86_64/fpu/Versions: New versions added.
    * sysdeps/x86_64/fpu/libm-test-ulps: Regenerated.
    * sysdeps/x86_64/fpu/multiarch/Makefile (libmvec-sysdep_routines):
    Added build of SSE, AVX2 and AVX512 IFUNC versions.
    * sysdeps/x86_64/fpu/svml_s_wrapper_impl.h: Added 2 argument wrappers.
    * sysdeps/x86_64/fpu/multiarch/svml_s_powf16_core.S: New file.
    * sysdeps/x86_64/fpu/multiarch/svml_s_powf16_core_avx512.S: New file.
    * sysdeps/x86_64/fpu/multiarch/svml_s_powf4_core.S: New file.
    * sysdeps/x86_64/fpu/multiarch/svml_s_powf4_core_sse4.S: New file.
    * sysdeps/x86_64/fpu/multiarch/svml_s_powf8_core.S: New file.
    * sysdeps/x86_64/fpu/multiarch/svml_s_powf8_core_avx2.S: New file.
    * sysdeps/x86_64/fpu/svml_s_powf16_core.S: New file.
    * sysdeps/x86_64/fpu/svml_s_powf4_core.S: New file.
    * sysdeps/x86_64/fpu/svml_s_powf8_core.S: New file.
    * sysdeps/x86_64/fpu/svml_s_powf8_core_avx.S: New file.
    * sysdeps/x86_64/fpu/svml_s_powf_data.S: New file.
    * sysdeps/x86_64/fpu/svml_s_powf_data.h: New file.
    * sysdeps/x86_64/fpu/test-float-vlen16-wrappers.c: Vector powf tests.
    * sysdeps/x86_64/fpu/test-float-vlen16.c: Likewise.
    * sysdeps/x86_64/fpu/test-float-vlen4-wrappers.c: Likewise.
    * sysdeps/x86_64/fpu/test-float-vlen4.c: Likewise.
    * sysdeps/x86_64/fpu/test-float-vlen8-avx2-wrappers.c: Likewise.
    * sysdeps/x86_64/fpu/test-float-vlen8-avx2.c: Likewise.
    * sysdeps/x86_64/fpu/test-float-vlen8-wrappers.c: Likewise.
    * sysdeps/x86_64/fpu/test-float-vlen8.c: Likewise.
    * math/test-float-vlen16.h: Fixed 2 argument macro.
    * math/test-float-vlen4.h: Likewise.
    * math/test-float-vlen8.h: Likewise.
    * NEWS: Mention addition of x86_64 vector powf.
2015-06-18 17:04:07 +03:00
Andrew Senkevich
c10b9b13f7 Vector pow for x86_64 and tests.
Here is implementation of vectorized pow containing SSE, AVX,
AVX2 and AVX512 versions according to Vector ABI
<https://groups.google.com/forum/#!topic/x86-64-abi/LmppCfN1rZ4>.

  * bits/libm-simd-decl-stubs.h: Added stubs for pow.
    * math/bits/mathcalls.h: Added pow declaration with __MATHCALL_VEC.
    * sysdeps/unix/sysv/linux/x86_64/libmvec.abilist: New versions added.
    * sysdeps/x86/fpu/bits/math-vector.h: Added SIMD declaration and asm
    redirections for pow.
    * sysdeps/x86_64/fpu/Makefile (libmvec-support): Added new files.
    * sysdeps/x86_64/fpu/Versions: New versions added.
    * sysdeps/x86_64/fpu/libm-test-ulps: Regenerated.
    * sysdeps/x86_64/fpu/multiarch/Makefile (libmvec-sysdep_routines): Added
    build of SSE, AVX2 and AVX512 IFUNC versions.
    * sysdeps/x86_64/fpu/svml_d_wrapper_impl.h: Added 2 argument wrappers.
    * sysdeps/x86_64/fpu/multiarch/svml_d_pow2_core.S: New file.
    * sysdeps/x86_64/fpu/multiarch/svml_d_pow2_core_sse4.S: New file.
    * sysdeps/x86_64/fpu/multiarch/svml_d_pow4_core.S: New file.
    * sysdeps/x86_64/fpu/multiarch/svml_d_pow4_core_avx2.S: New file.
    * sysdeps/x86_64/fpu/multiarch/svml_d_pow8_core.S: New file.
    * sysdeps/x86_64/fpu/multiarch/svml_d_pow8_core_avx512.S: New file.
    * sysdeps/x86_64/fpu/svml_d_pow2_core.S: New file.
    * sysdeps/x86_64/fpu/svml_d_pow4_core.S: New file.
    * sysdeps/x86_64/fpu/svml_d_pow4_core_avx.S: New file.
    * sysdeps/x86_64/fpu/svml_d_pow8_core.S: New file.
    * sysdeps/x86_64/fpu/svml_d_pow_data.S: New file.
    * sysdeps/x86_64/fpu/svml_d_pow_data.h: New file.
    * sysdeps/x86_64/fpu/test-double-vlen2-wrappers.c: Added vector pow test.
    * sysdeps/x86_64/fpu/test-double-vlen2.c: Likewise.
    * sysdeps/x86_64/fpu/test-double-vlen4-avx2-wrappers.c: Likewise.
    * sysdeps/x86_64/fpu/test-double-vlen4-avx2.c: Likewise.
    * sysdeps/x86_64/fpu/test-double-vlen4-wrappers.c: Likewise.
    * sysdeps/x86_64/fpu/test-double-vlen4.c: Likewise.
    * sysdeps/x86_64/fpu/test-double-vlen8-wrappers.c: Likewise.
    * sysdeps/x86_64/fpu/test-double-vlen8.c: Likewise.
    * NEWS: Mention addition of x86_64 vector pow.
2015-06-17 16:22:26 +03:00
Andrew Senkevich
1663be053d Vector expf for x86_64 and tests.
Here is implementation of vectorized expf containing SSE, AVX,
AVX2 and AVX512 versions according to Vector ABI
<https://groups.google.com/forum/#!topic/x86-64-abi/LmppCfN1rZ4>.

    * sysdeps/unix/sysv/linux/x86_64/libmvec.abilist: New symbols added.
    * sysdeps/x86/fpu/bits/math-vector.h: Added SIMD declaration and asm
    redirections for expf.
    * sysdeps/x86_64/fpu/Makefile (libmvec-support): Added new files.
    * sysdeps/x86_64/fpu/Versions: New versions added.
    * sysdeps/x86_64/fpu/libm-test-ulps: Regenerated.
    * sysdeps/x86_64/fpu/multiarch/Makefile (libmvec-sysdep_routines): Added
    build of SSE, AVX2 and AVX512 IFUNC versions.
    * sysdeps/x86_64/fpu/multiarch/svml_s_expf16_core.S: New file.
    * sysdeps/x86_64/fpu/multiarch/svml_s_expf16_core_avx512.S: New file.
    * sysdeps/x86_64/fpu/multiarch/svml_s_expf4_core.S: New file.
    * sysdeps/x86_64/fpu/multiarch/svml_s_expf4_core_sse4.S: New file.
    * sysdeps/x86_64/fpu/multiarch/svml_s_expf8_core.S: New file.
    * sysdeps/x86_64/fpu/multiarch/svml_s_expf8_core_avx2.S: New file.
    * sysdeps/x86_64/fpu/svml_s_expf16_core.S: New file.
    * sysdeps/x86_64/fpu/svml_s_expf4_core.S: New file.
    * sysdeps/x86_64/fpu/svml_s_expf8_core.S: New file.
    * sysdeps/x86_64/fpu/svml_s_expf8_core_avx.S: New file.
    * sysdeps/x86_64/fpu/svml_s_expf_data.S: New file.
    * sysdeps/x86_64/fpu/svml_s_expf_data.h: New file.
    * sysdeps/x86_64/fpu/test-float-vlen16-wrappers.c: Vector expf tests.
    * sysdeps/x86_64/fpu/test-float-vlen16.c: Likewise.
    * sysdeps/x86_64/fpu/test-float-vlen4-wrappers.c: Likewise.
    * sysdeps/x86_64/fpu/test-float-vlen4.c: Likewise.
    * sysdeps/x86_64/fpu/test-float-vlen8-avx2-wrappers.c: Likewise.
    * sysdeps/x86_64/fpu/test-float-vlen8-avx2.c: Likewise.
    * sysdeps/x86_64/fpu/test-float-vlen8-wrappers.c: Likewise.
    * sysdeps/x86_64/fpu/test-float-vlen8.c: Likewise.
    * NEWS: Mention addition of x86_64 vector expf.
2015-06-17 16:10:51 +03:00
Andrew Senkevich
9c02f663f6 Vector exp for x86_64 and tests.
Here is implementation of vectorized exp containing SSE, AVX,
AVX2 and AVX512 versions according to Vector ABI
<https://groups.google.com/forum/#!topic/x86-64-abi/LmppCfN1rZ4>.

    * bits/libm-simd-decl-stubs.h: Added stubs for exp.
    * math/bits/mathcalls.h: Added exp declaration with __MATHCALL_VEC.
    * sysdeps/unix/sysv/linux/x86_64/libmvec.abilist: New versions added.
    * sysdeps/x86/fpu/bits/math-vector.h: Added SIMD declaration and asm
    redirections for exp.
    * sysdeps/x86_64/fpu/Makefile (libmvec-support): Added new files.
    * sysdeps/x86_64/fpu/Versions: New versions added.
    * sysdeps/x86_64/fpu/libm-test-ulps: Regenerated.
    * sysdeps/x86_64/fpu/multiarch/Makefile (libmvec-sysdep_routines): Added
    build of SSE, AVX2 and AVX512 IFUNC versions.
    * sysdeps/x86_64/fpu/multiarch/svml_d_exp2_core.S: New file.
    * sysdeps/x86_64/fpu/multiarch/svml_d_exp2_core_sse4.S: New file.
    * sysdeps/x86_64/fpu/multiarch/svml_d_exp4_core.S: New file.
    * sysdeps/x86_64/fpu/multiarch/svml_d_exp4_core_avx2.S: New file.
    * sysdeps/x86_64/fpu/multiarch/svml_d_exp8_core.S: New file.
    * sysdeps/x86_64/fpu/multiarch/svml_d_exp8_core_avx512.S: New file.
    * sysdeps/x86_64/fpu/svml_d_exp2_core.S: New file.
    * sysdeps/x86_64/fpu/svml_d_exp4_core.S: New file.
    * sysdeps/x86_64/fpu/svml_d_exp4_core_avx.S: New file.
    * sysdeps/x86_64/fpu/svml_d_exp8_core.S: New file.
    * sysdeps/x86_64/fpu/svml_d_exp_data.S: New file.
    * sysdeps/x86_64/fpu/svml_d_exp_data.h: New file.
    * sysdeps/x86_64/fpu/test-double-vlen2-wrappers.c: Added vector exp test.
    * sysdeps/x86_64/fpu/test-double-vlen2.c: Likewise.
    * sysdeps/x86_64/fpu/test-double-vlen4-avx2-wrappers.c: Likewise.
    * sysdeps/x86_64/fpu/test-double-vlen4-avx2.c: Likewise.
    * sysdeps/x86_64/fpu/test-double-vlen4-wrappers.c: Likewise.
    * sysdeps/x86_64/fpu/test-double-vlen4.c: Likewise.
    * sysdeps/x86_64/fpu/test-double-vlen8-wrappers.c: Likewise.
    * sysdeps/x86_64/fpu/test-double-vlen8.c: Likewise.
    * NEWS: Mention addition of x86_64 vector exp.
2015-06-17 15:58:05 +03:00
Andrew Senkevich
774488f88a Vector logf for x86_64 and tests.
Here is implementation of vectorized logf containing SSE, AVX,
AVX2 and AVX512 versions according to Vector ABI
<https://groups.google.com/forum/#!topic/x86-64-abi/LmppCfN1rZ4>.

    * sysdeps/unix/sysv/linux/x86_64/libmvec.abilist: New symbols added.
    * sysdeps/x86/fpu/bits/math-vector.h: Added SIMD declaration and asm
    redirections for logf.
    * sysdeps/x86_64/fpu/Makefile (libmvec-support): Added new files.
    * sysdeps/x86_64/fpu/Versions: New versions added.
    * sysdeps/x86_64/fpu/libm-test-ulps: Regenerated.
    * sysdeps/x86_64/fpu/multiarch/Makefile (libmvec-sysdep_routines): Added
    build of SSE, AVX2 and AVX512 IFUNC versions.
    * sysdeps/x86_64/fpu/multiarch/svml_s_logf16_core.S: New file.
    * sysdeps/x86_64/fpu/multiarch/svml_s_logf16_core_avx512.S: New file.
    * sysdeps/x86_64/fpu/multiarch/svml_s_logf4_core.S: New file.
    * sysdeps/x86_64/fpu/multiarch/svml_s_logf4_core_sse4.S: New file.
    * sysdeps/x86_64/fpu/multiarch/svml_s_logf8_core.S: New file.
    * sysdeps/x86_64/fpu/multiarch/svml_s_logf8_core_avx2.S: New file.
    * sysdeps/x86_64/fpu/svml_s_logf16_core.S: New file.
    * sysdeps/x86_64/fpu/svml_s_logf4_core.S: New file.
    * sysdeps/x86_64/fpu/svml_s_logf8_core.S: New file.
    * sysdeps/x86_64/fpu/svml_s_logf8_core_avx.S: New file.
    * sysdeps/x86_64/fpu/svml_s_logf_data.S: New file.
    * sysdeps/x86_64/fpu/svml_s_logf_data.h: New file.
    * sysdeps/x86_64/fpu/test-float-vlen16-wrappers.c: Vector logf tests.
    * sysdeps/x86_64/fpu/test-float-vlen16.c: Likewise.
    * sysdeps/x86_64/fpu/test-float-vlen4-wrappers.c: Likewise.
    * sysdeps/x86_64/fpu/test-float-vlen4.c: Likewise.
    * sysdeps/x86_64/fpu/test-float-vlen8-avx2-wrappers.c: Likewise.
    * sysdeps/x86_64/fpu/test-float-vlen8-avx2.c: Likewise.
    * sysdeps/x86_64/fpu/test-float-vlen8-wrappers.c: Likewise.
    * sysdeps/x86_64/fpu/test-float-vlen8.c: Likewise.
    * NEWS: Mention addition of x86_64 vector logf.
2015-06-17 15:53:00 +03:00
Andrew Senkevich
6af25acc7b Vector log for x86_64 and tests.
Here is implementation of vectorized log containing SSE, AVX,
AVX2 and AVX512 versions according to Vector ABI
<https://groups.google.com/forum/#!topic/x86-64-abi/LmppCfN1rZ4>.

    * bits/libm-simd-decl-stubs.h: Added stubs for log.
    * math/bits/mathcalls.h: Added log declaration with __MATHCALL_VEC.
    * sysdeps/unix/sysv/linux/x86_64/libmvec.abilist: New versions added.
    * sysdeps/x86/fpu/bits/math-vector.h: Added SIMD declaration and asm
    redirections for log.
    * sysdeps/x86_64/fpu/Makefile (libmvec-support): Added new files.
    * sysdeps/x86_64/fpu/Versions: New versions added.
    * sysdeps/x86_64/fpu/libm-test-ulps: Regenerated.
    * sysdeps/x86_64/fpu/multiarch/Makefile (libmvec-sysdep_routines): Added
    build of SSE, AVX2 and AVX512 IFUNC versions.
    * sysdeps/x86_64/fpu/multiarch/svml_d_log2_core.S: New file.
    * sysdeps/x86_64/fpu/multiarch/svml_d_log2_core_sse4.S: New file.
    * sysdeps/x86_64/fpu/multiarch/svml_d_log4_core.S: New file.
    * sysdeps/x86_64/fpu/multiarch/svml_d_log4_core_avx2.S: New file.
    * sysdeps/x86_64/fpu/multiarch/svml_d_log8_core.S: New file.
    * sysdeps/x86_64/fpu/multiarch/svml_d_log8_core_avx512.S: New file.
    * sysdeps/x86_64/fpu/svml_d_log2_core.S: New file.
    * sysdeps/x86_64/fpu/svml_d_log4_core.S: New file.
    * sysdeps/x86_64/fpu/svml_d_log4_core_avx.S: New file.
    * sysdeps/x86_64/fpu/svml_d_log8_core.S: New file.
    * sysdeps/x86_64/fpu/svml_d_log_data.S: New file.
    * sysdeps/x86_64/fpu/svml_d_log_data.h: New file.
    * sysdeps/x86_64/fpu/test-double-vlen2-wrappers.c: Added vector log test.
    * sysdeps/x86_64/fpu/test-double-vlen2.c: Likewise.
    * sysdeps/x86_64/fpu/test-double-vlen4-avx2-wrappers.c: Likewise.
    * sysdeps/x86_64/fpu/test-double-vlen4-avx2.c: Likewise.
    * sysdeps/x86_64/fpu/test-double-vlen4-wrappers.c: Likewise.
    * sysdeps/x86_64/fpu/test-double-vlen4.c: Likewise.
    * sysdeps/x86_64/fpu/test-double-vlen8-wrappers.c: Likewise.
    * sysdeps/x86_64/fpu/test-double-vlen8.c: Likewise.
    * NEWS: Mention addition of x86_64 vector log.
2015-06-17 15:38:29 +03:00
Andrew Senkevich
2a8c2c7b33 Vector sinf for x86_64 and tests.
Here is implementation of vectorized sinf containing SSE, AVX,
AVX2 and AVX512 versions according to Vector ABI
<https://groups.google.com/forum/#!topic/x86-64-abi/LmppCfN1rZ4>.

    * sysdeps/unix/sysv/linux/x86_64/libmvec.abilist: New symbols added.
    * sysdeps/x86/fpu/bits/math-vector.h: Added SIMD declaration for sinf.
    * sysdeps/x86_64/fpu/Makefile (libmvec-support): Added new files.
    * sysdeps/x86_64/fpu/Versions: New versions added.
    * sysdeps/x86_64/fpu/libm-test-ulps: Regenerated.
    * sysdeps/x86_64/fpu/multiarch/Makefile (libmvec-sysdep_routines): Added
    build of SSE, AVX2 and AVX512 IFUNC versions.
    * sysdeps/x86_64/fpu/multiarch/svml_s_sinf16_core.S: New file.
    * sysdeps/x86_64/fpu/multiarch/svml_s_sinf16_core_avx512.S: New file.
    * sysdeps/x86_64/fpu/multiarch/svml_s_sinf4_core.S: New file.
    * sysdeps/x86_64/fpu/multiarch/svml_s_sinf4_core_sse4.S: New file.
    * sysdeps/x86_64/fpu/multiarch/svml_s_sinf8_core.S: New file.
    * sysdeps/x86_64/fpu/multiarch/svml_s_sinf8_core_avx2.S: New file.
    * sysdeps/x86_64/fpu/svml_s_sinf16_core.S: New file.
    * sysdeps/x86_64/fpu/svml_s_sinf4_core.S: New file.
    * sysdeps/x86_64/fpu/svml_s_sinf8_core.S: New file.
    * sysdeps/x86_64/fpu/svml_s_sinf8_core_avx.S: New file.
    * sysdeps/x86_64/fpu/svml_s_sinf_data.S: New file.
    * sysdeps/x86_64/fpu/svml_s_sinf_data.h: New file.
    * sysdeps/x86_64/fpu/test-float-vlen16-wrappers.c: Vector sinf tests.
    * sysdeps/x86_64/fpu/test-float-vlen16.c: Likewise.
    * sysdeps/x86_64/fpu/test-float-vlen4-wrappers.c: Likewise.
    * sysdeps/x86_64/fpu/test-float-vlen4.c: Likewise.
    * sysdeps/x86_64/fpu/test-float-vlen8-avx2-wrappers.c: Likewise.
    * sysdeps/x86_64/fpu/test-float-vlen8-avx2.c: Likewise.
    * sysdeps/x86_64/fpu/test-float-vlen8-wrappers.c: Likewise.
    * sysdeps/x86_64/fpu/test-float-vlen8.c: Likewise.
    * NEWS: Mention addition of x86_64 vector sinf.
2015-06-15 15:06:53 +03:00
Andrew Senkevich
4b9c2b707b Vector sin for x86_64 and tests.
Here is implementation of vectorized sin containing SSE, AVX,
AVX2 and AVX512 versions according to Vector ABI
<https://groups.google.com/forum/#!topic/x86-64-abi/LmppCfN1rZ4>.

    * bits/libm-simd-decl-stubs.h: Added stubs for sin.
    * math/bits/mathcalls.h: Added sin declaration with __MATHCALL_VEC.
    * sysdeps/unix/sysv/linux/x86_64/libmvec.abilist: New versions added.
    * sysdeps/x86/fpu/bits/math-vector.h: SIMD declaration for sin.
    * sysdeps/x86_64/fpu/Makefile (libmvec-support): Added new files.
    * sysdeps/x86_64/fpu/Versions: New versions added.
    * sysdeps/x86_64/fpu/libm-test-ulps: Regenerated.
    * sysdeps/x86_64/fpu/multiarch/Makefile (libmvec-sysdep_routines): Added
    build of SSE, AVX2 and AVX512 IFUNC versions.
    * sysdeps/x86_64/fpu/multiarch/svml_d_sin2_core.S: New file.
    * sysdeps/x86_64/fpu/multiarch/svml_d_sin2_core_sse4.S: New file.
    * sysdeps/x86_64/fpu/multiarch/svml_d_sin4_core.S: New file.
    * sysdeps/x86_64/fpu/multiarch/svml_d_sin4_core_avx2.S: New file.
    * sysdeps/x86_64/fpu/multiarch/svml_d_sin8_core.S: New file.
    * sysdeps/x86_64/fpu/multiarch/svml_d_sin8_core_avx512.S: New file.
    * sysdeps/x86_64/fpu/svml_d_sin2_core.S: New file.
    * sysdeps/x86_64/fpu/svml_d_sin4_core.S: New file.
    * sysdeps/x86_64/fpu/svml_d_sin4_core_avx.S: New file.
    * sysdeps/x86_64/fpu/svml_d_sin8_core.S: New file.
    * sysdeps/x86_64/fpu/svml_d_sin_data.S: New file.
    * sysdeps/x86_64/fpu/svml_d_sin_data.h: New file.
    * sysdeps/x86_64/fpu/test-double-vlen2-wrappers.c: Added vector sin test.
    * sysdeps/x86_64/fpu/test-double-vlen2.c: Likewise.
    * sysdeps/x86_64/fpu/test-double-vlen4-avx2-wrappers.c: Likewise.
    * sysdeps/x86_64/fpu/test-double-vlen4-avx2.c: Likewise.
    * sysdeps/x86_64/fpu/test-double-vlen4-wrappers.c: Likewise.
    * sysdeps/x86_64/fpu/test-double-vlen4.c: Likewise.
    * sysdeps/x86_64/fpu/test-double-vlen8-wrappers.c: Likewise.
    * sysdeps/x86_64/fpu/test-double-vlen8.c: Likewise.
    * NEWS: Mention addition of x86_64 vector sin.
2015-06-11 17:12:38 +03:00
Andrew Senkevich
04f496d602 Vector cosf for x86_64.
Here is implementation of vectorized cosf containing SSE, AVX,
AVX2 and AVX512 versions according to Vector ABI
<https://groups.google.com/forum/#!topic/x86-64-abi/LmppCfN1rZ4>.

    * sysdeps/x86_64/fpu/Makefile (libmvec-support): Added new files.
    * sysdeps/x86_64/fpu/Versions: New versions added.
    * sysdeps/x86_64/fpu/svml_s_cosf4_core.S: New file.
    * sysdeps/x86_64/fpu/multiarch/svml_s_cosf4_core.S: New file.
    * sysdeps/x86_64/fpu/multiarch/svml_s_cosf4_core_sse4.S: New file.
    * sysdeps/x86_64/fpu/svml_s_cosf8_core_avx.S: New file.
    * sysdeps/x86_64/fpu/svml_s_cosf8_core.S: New file.
    * sysdeps/x86_64/fpu/multiarch/svml_s_cosf8_core.S: New file.
    * sysdeps/x86_64/fpu/multiarch/svml_s_cosf8_core_avx2.S: New file.
    * sysdeps/x86_64/fpu/svml_s_cosf16_core.S: New file.
    * sysdeps/x86_64/fpu/multiarch/svml_s_cosf16_core.S: New file.
    * sysdeps/x86_64/fpu/multiarch/svml_s_cosf16_core_avx512.S: New file.
    * sysdeps/x86_64/fpu/svml_s_wrapper_impl.h: New file.
    * sysdeps/x86_64/fpu/svml_s_cosf_data.S: New file.
    * sysdeps/x86_64/fpu/svml_s_cosf_data.h: New file.
    * sysdeps/x86_64/fpu/multiarch/Makefile (libmvec-sysdep_routines): Added
    build of SSE, AVX2 and AVX512 IFUNC versions.
    * sysdeps/unix/sysv/linux/x86_64/libmvec.abilist: New versions added.
    * sysdeps/x86/fpu/bits/math-vector.h: Added SIMD declaration for cosf.
    * NEWS: Mention addition of x86_64 vector cosf.
2015-06-09 18:29:47 +03:00
Andrew Senkevich
2193311288 Start of series of patches with x86_64 vector math functions.
Here is implementation of cos containing SSE, AVX, AVX2 and AVX512
versions according to Vector ABI which had been discussed in
<https://groups.google.com/forum/#!topic/x86-64-abi/LmppCfN1rZ4>.

Vector math library build and ABI testing enabled by default for x86_64.

    * sysdeps/x86_64/fpu/Makefile: New file.
    * sysdeps/x86_64/fpu/Versions: New file.
    * sysdeps/x86_64/fpu/svml_d_cos_data.S: New file.
    * sysdeps/x86_64/fpu/svml_d_cos_data.h: New file.
    * sysdeps/x86_64/fpu/svml_d_cos2_core.S: New file.
    * sysdeps/x86_64/fpu/svml_d_cos4_core.S: New file.
    * sysdeps/x86_64/fpu/svml_d_cos4_core_avx.S: New file.
    * sysdeps/x86_64/fpu/svml_d_cos8_core.S: New file.
    * sysdeps/x86_64/fpu/svml_d_wrapper_impl.h: New file.
    * sysdeps/x86_64/fpu/multiarch/svml_d_cos2_core.S: New file.
    * sysdeps/x86_64/fpu/multiarch/svml_d_cos2_core_sse4.S: New file.
    * sysdeps/x86_64/fpu/multiarch/svml_d_cos4_core.S: New file.
    * sysdeps/x86_64/fpu/multiarch/svml_d_cos4_core_avx2.S: New file.
    * sysdeps/x86_64/fpu/multiarch/svml_d_cos8_core.S: New file.
    * sysdeps/x86_64/fpu/multiarch/svml_d_cos8_core_avx512.S: New file.
    * sysdeps/x86_64/fpu/multiarch/Makefile (libmvec-sysdep_routines): Added
    build of SSE, AVX2 and AVX512 IFUNC versions.
    * sysdeps/x86/fpu/bits/math-vector.h: Added SIMD declaration for cos.
    * math/bits/mathcalls.h: Added cos declaration with __MATHCALL_VEC.
    * sysdeps/x86_64/configure.ac: Options for libmvec build.
    * sysdeps/x86_64/configure: Regenerated.
    * sysdeps/x86_64/sysdep.h (cfi_offset_rel_rsp): New macro.
    * sysdeps/unix/sysv/linux/x86_64/libmvec.abilist: New file.
    * manual/install.texi (Configuring and compiling): Document
    --disable-mathvec.
    * INSTALL: Regenerated.
    * NEWS: Mention addition of libmvec and x86_64 vector cos.
2015-06-09 14:25:49 +03:00
Joseph Myers
4629c866ad Fix atan / atan2 missing underflows (bug 15319).
This patch fixes bug 15319, missing underflows from atan / atan2 when
the result of atan is very close to its small argument (or that of
atan2 is very close to the ratio of its arguments, which may be an
exact division).

The usual approach of doing an underflowing computation if the
computed result is subnormal is followed.  For 32-bit x86, there are
extra complications: the inline __ieee754_atan2 in bits/mathinline.h
needs to be disabled for float and double because other libm functions
using it generally rely on getting proper underflow exceptions from
it, while the out-of-line functions have to remove excess range and
precision from the underflowing result so as to return an exact 0 in
the case where errno should be set for underflow to 0.  (The failures
I saw without that are similar to those Carlos reported for other
functions, where I haven't seen a response to
<https://sourceware.org/ml/libc-alpha/2015-01/msg00485.html>
confirming if my diagnosis is correct.  Arguably all libm functions
with float and double returns should remove excess range and
precision, but that's a separate matter.)

The x86_64 long double case reported in a comment in bug 15319 is not
a bug (it's an argument of LDBL_MIN, and x86_64 is an after-rounding
architecture so the correct IEEE result is not to raise underflow in
the given rounding mode, in addition to treating the result as an
exact LDBL_MIN being within the newly clarified documentation of
accuracy goals).  I'm presuming that the fpatan instruction can be
trusted to raise appropriate exceptions when the (long double) result
underflows (after rounding) and so no changes are needed for x86 /
x86_64 long double functions here; empirically this is the case for
the cases covered in the testsuite, on my system.

Tested for x86_64, x86, powerpc and mips64.  Only 32-bit x86 needs
ulps updates (for the changes to inlines meaning some functions no
longer get excess precision from their __ieee754_atan2* calls).

	[BZ #15319]
	* sysdeps/i386/fpu/e_atan2.S (dbl_min): New object.
	(MO): New macro.
	(__ieee754_atan2): For results with small absolute value, force
	underflow exception and remove excess range and precision from
	return value.
	* sysdeps/i386/fpu/e_atan2f.S (flt_min): New object.
	(MO): New macro.
	(__ieee754_atan2f): For results with small absolute value, force
	underflow exception and remove excess range and precision from
	return value.
	* sysdeps/i386/fpu/s_atan.S (dbl_min): New object.
	(MO): New macro.
	(__atan): For results with small absolute value, force underflow
	exception and remove excess range and precision from return value.
	* sysdeps/i386/fpu/s_atanf.S (flt_min): New object.
	(MO): New macro.
	(__atanf): For results with small absolute value, force underflow
	exception and remove excess range and precision from return value.
	* sysdeps/ieee754/dbl-64/e_atan2.c: Include <float.h> and
	<math.h>.
	(__ieee754_atan2): Force underflow exception for results with
	small absolute value.
	* sysdeps/ieee754/dbl-64/s_atan.c: Include <float.h> and
	<math_private.h>.
	(atan): Force underflow exception for results with small absolute
	value.
	* sysdeps/ieee754/flt-32/s_atanf.c: Include <float.h>.
	(__atanf): Force underflow exception for results with small
	absolute value.
	* sysdeps/ieee754/ldbl-128/s_atanl.c: Include <float.h> and
	<math.h>.
	(__atanl): Force underflow exception for results with small
	absolute value.
	* sysdeps/ieee754/ldbl-128ibm/s_atanl.c: Include <float.h>.
	(__atanl): Force underflow exception for results with small
	absolute value.
	* sysdeps/x86/fpu/bits/mathinline.h
	[!__SSE2_MATH__ && !__x86_64__ && __LIBC_INTERNAL_MATH_INLINES]
	(__ieee754_atan2): Only define inline for long double.
	* sysdeps/x86_64/fpu/multiarch/e_atan2.c
	[HAVE_FMA4_SUPPORT || HAVE_AVX_SUPPORT]: Include <math.h>.
	* math/auto-libm-test-in: Do not mark underflow exceptions as
	possibly missing for bug 15319.  Add more tests of atan2.
	* math/auto-libm-test-out: Regenerated.
	* math/libm-test.inc (casin_test_data): Do not mark underflow
	exceptions as possibly missing for bug 15319.
	(casinh_test_data): Likewise.
	* sysdeps/i386/fpu/libm-test-ulps: Update.
2015-02-18 21:10:49 +00:00
Joseph Myers
b168057aaa Update copyright dates with scripts/update-copyrights. 2015-01-02 16:29:47 +00:00
Joseph Myers
0747f81811 Fix libm feraiseexcept namespace (bug 17723).
Various C90 and UNIX98 libm functions call feraiseexcept, which is not
in those standards.  This causes linknamespace test failures - except
on x86 / x86_64, where feraiseexcept is inline (for the relevant
constant arguments) in bits/fenv.h.

This patch fixes this by making those functions call __feraiseexcept
instead.  All changes are applied to all architectures rather than
considering the possibility that some might not be needed in some
cases (e.g. x86) as it seems most maintainable to keep architectures
consistent.

Where __feraiseexcept does not exist, it is added, with feraiseexcept
made a weak alias; where it is a strong alias, it is made weak.
libm_hidden_def / libm_hidden_proto are used with __feraiseexcept
(this might in some cases improve code generation for existing calls
to __feraiseexcept in some code on some architectures).  Where there
are dummy feraiseexcept macros (on architectures without
floating-point exceptions support, to avoid compile errors from
references to undefined FE_* macros), corresponding dummy
__feraiseexcept macros are added.  And on x86, to ensure
__feraiseexcept calls still get inlined, the inline function in
bits/fenv.h is refactored so that most of it can be reused in an
inline __feraiseexcept in a separate include/bits/fenv.h.

Calls are changed in C90/UNIX98 functions, but generally not in
functions missing from those standards.  They are also changed in
libc_fe* functions (on the basis that those might be used in any libm
function), and in feupdateenv (on the same basis - may be used, via
default libc_*, in any libm function - of course feupdateenv will need
changing to __feupdateenv in a subsequent patch to make that fully
namespace-clean).

No __feraiseexcept is added corresponding to the feraiseexcept in
powerpc bits/fenvinline.h, because that macro definition is
conditional on !defined __NO_MATH_INLINES, and glibc libm is built
with -D__NO_MATH_INLINES, so changing internal calls to use
__feraiseexcept should make no difference.

Tested for x86_64 (testsuite; the only change in disassembly of
installed shared libraries is a slight code reordering in clog10, of
no apparent significance).  Also tested for MIPS, where (in the
configuration tested) it eliminates math.h linknamespace failures for
n32 and n64 (some for o32 remain because of other issues).

	[BZ #17723]
	* include/fenv.h (__feraiseexcept): Use libm_hidden_proto.
	* math/fraiseexcpt.c (__feraiseexcept): Use libm_hidden_def.
	* sysdeps/aarch64/fpu/fraiseexcpt.c (feraiseexcept): Rename to
	__feraiseexcept and define as weak alias of __feraiseexcept.  Use
	libm_hidden_weak.
	* sysdeps/arm/fraiseexcpt.c (feraiseexcept): Likewise.
	* sysdeps/hppa/fpu/fraiseexcpt.c (feraiseexcept): Likewise.
	* sysdeps/i386/fpu/fraiseexcpt.c (__feraiseexcept): Use
	libm_hidden_def.
	* sysdeps/ia64/fpu/fraiseexcpt.c (feraiseexcept): Rename to
	__feraiseexcept and define as weak alias of __feraiseexcept.  Use
	libm_hidden_weak.
	* sysdeps/m68k/coldfire/fpu/fraiseexcpt.c (feraiseexcept):
	Likewise.
	* sysdeps/microblaze/math_private.h (__feraiseexcept): New macro.
	* sysdeps/mips/fpu/fraiseexcpt.c (feraiseexcept): Rename to
	__feraiseexcept and define as weak alias of __feraiseexcept.  Use
	libm_hidden_weak.
	* sysdeps/powerpc/fpu/fraiseexcpt.c (__feraiseexcept): Use
	libm_hidden_def.
	* sysdeps/powerpc/nofpu/fraiseexcpt.c (__feraiseexcept): Likewise.
	* sysdeps/powerpc/powerpc32/e500/nofpu/fraiseexcpt.c
	(__feraiseexcept): Likewise.
	* sysdeps/s390/fpu/fraiseexcpt.c (feraiseexcept): Rename to
	__feraiseexcept and define as weak alias of __feraiseexcept.  Use
	libm_hidden_weak.
	* sysdeps/sh/sh4/fpu/fraiseexcpt.c (feraiseexcept): Likewise.
	* sysdeps/sparc/fpu/fraiseexcpt.c (__feraiseexcept): Use
	libm_hidden_def.
	* sysdeps/tile/math_private.h (__feraiseexcept): New macro.
	* sysdeps/unix/sysv/linux/alpha/fraiseexcpt.S (__feraiseexcept):
	Use libm_hidden_def.
	* sysdeps/x86_64/fpu/fraiseexcpt.c (__feraiseexcept): Use
	libm_hidden_def.
	(feraiseexcept): Define as weak not strong alias.  Use
	libm_hidden_weak.
	* sysdeps/x86/fpu/bits/fenv.h (__feraiseexcept_invalid_divbyzero):
	New inline function.  Factored out of ...
	(feraiseexcept): ... here.  Use __feraiseexcept_invalid_divbyzero.
	* sysdeps/x86/fpu/include/bits/fenv.h: New file.
	* math/e_scalb.c (invalid_fn): Call __feraiseexcept instead of
	feraiseexcept.
	* math/w_acos.c (__acos): Likewise.
	* math/w_asin.c (__asin): Likewise.
	* math/w_ilogb.c (__ilogb): Likewise.
	* math/w_j0.c (y0): Likewise.
	* math/w_j1.c (y1): Likewise.
	* math/w_jn.c (yn): Likewise.
	* math/w_log.c (__log): Likewise.
	* math/w_log10.c (__log10): Likewise.
	* sysdeps/aarch64/fpu/feupdateenv.c (feupdateenv): Likewise.
	* sysdeps/aarch64/fpu/math_private.h
	(libc_feupdateenv_test_aarch64): Likewise.
	* sysdeps/alpha/fpu/feupdateenv.c (__feupdateenv): Likewise.
	* sysdeps/arm/fenv_private.h (libc_feupdateenv_test_vfp): Likewise.
	* sysdeps/arm/feupdateenv.c (feupdateenv): Likewise.
	* sysdeps/ia64/fpu/feupdateenv.c (feupdateenv): Likewise.
	* sysdeps/m68k/fpu/feupdateenv.c (__feupdateenv): Likewise.
	* sysdeps/mips/fpu/feupdateenv.c (feupdateenv): Likewise.
	* sysdeps/powerpc/fpu/e_sqrt.c (__slow_ieee754_sqrt): Likewise.
	* sysdeps/s390/fpu/feupdateenv.c (feupdateenv): Likewise.
	* sysdeps/sh/sh4/fpu/feupdateenv.c (feupdateenv): Likewise.
	* sysdeps/sparc/fpu/feupdateenv.c (__feupdateenv): Likewise.
2014-12-30 17:08:09 +00:00
Siddhesh Poyarekar
e44c8b0eb7 Fix comment error that Jakub pointed out but I forgot to fix 2014-08-13 18:46:41 +05:30
Siddhesh Poyarekar
508ce3acd9 Disable x87 inline functions for x86_64 and SSE [BZ #17262]
Since:

commit 409e00bd69
Author: H.J. Lu <hjl.tools@gmail.com>
Date:   Wed Jan 29 07:51:41 2014 -0800

    Disable x87 inline functions for SSE2 math

    When i386 and x86-64 mathinline.h was merged into a single mathinline.h,
    "gcc -m32" enables x87 inline functions on x86-64 even when -mfpmath=sse
    and SSE2 is enabled.  It is a regression on x86-64.  We should check
    __SSE2_MATH__ instead of __x86_64__ when disabling x87 inline functions.

gcc-3.2 is unable to correctly compile x86_64 routines for llrint
since it gets redefined.  This is because gcc 3.2 does not set
__SSE2_MATH__ for x86_64, thus exposing the duplicate definition.

The correct fix ought to be to check for both __SSE2_MATH__ and
__x86_64__ and enable those bits only when neither are defined.

Tested fix with the reproducer for
409e00bd69 as well as with gcc-3.2.
2014-08-13 14:05:16 +05:30
Joseph Myers
acd7f096d7 Complete _BSD_SOURCE / _SVID_source followup cleanup.
This patch completes the headers cleanup consequent on removal of
_BSD_SOURCE and _SVID_SOURCE (apart from any subsequent deprecations):

* #endif conditionals that referred to BSD or SVID are updated.

* Redundant __USE_* tests in cases involving __USE_MISC are removed.
  This includes cases such as __USE_MISC || __USE_ISOC99, where
  __USE_MISC is redundant (because __USE_MISC is only ever defined in
  the default / _DEFAULT_SOURCE / _GNU_SOURCE case, when __USE_ISOC99
  is also defined; the same applies to the non-XSI-extended POSIX
  versions), and cases involving __USE_GNU, where __USE_GNU is
  redundant (because if __USE_GNU is defined, so are the other __USE_*
  macros).  There may well be other cases of __USE_FOO || __USE_BAR
  tests that could be simplified because one macro implies the other;
  this patch only addresses cases involving __USE_MISC.

Tested x86_64.

	* bits/fcntl.h [__USE_MISC]: Remove redundant conditionals.
	* bits/sigaction.h [__USE_MISC]: Likewise.
	* bits/waitstatus.h: Update #endif comments.
	* ctype/ctype.h: Likewise.
	* dirent/dirent.h: Likewise.
	[__USE_MISC]: Remove redundant conditionals.
	* grp/grp.h: Update #endif comments.
	[__USE_GNU]: Remove redundant conditionals.
	[__USE_MISC]: Likewise.
	* inet/netinet/in.h [__USE_GNU]: Likewise.
	* io/sys/stat.h [__USE_MISC]: Likewise.
	* libio/bits/stdio-ldbl.h [__USE_MISC]: Likewise.
	* libio/bits/stdio.h: Update #endif comments.
	[__USE_MISC]: Remove redundant conditionals.
	* libio/bits/stdio2.h [__USE_MISC]: Likewise.
	* libio/stdio.h: Update #endif comments.
	[__USE_MISC]: Remove redundant conditionals.
	* math/bits/math-finite.h [__USE_MISC]: Likewise.
	* math/bits/mathcalls.h [__USE_MISC]: Likewise.
	* math/math.h: Update #else and #endif comments.
	[__USE_MISC]: Remove redundant conditionals.
	* misc/sys/uio.h: Update #endif comments.
	* posix/bits/unistd.h [__USE_MISC]: Remove redundant conditionals.
	* posix/glob.h [__USE_MISC]: Likewise.
	* posix/sys/types.h: Update #endif comments.
	[__USE_MISC]: Remove redundant conditionals.
	* posix/sys/wait.h: Update #endif comments.
	[__USE_MISC]: Remove redundant conditionals.
	* posix/unistd.h: Update #endif comments.
	[__USE_MISC]: Remove redundant conditionals.
	* pwd/pwd.h [__USE_GNU]: Likewise.
	[__USE_MISC]: Likewise.
	* resolv/netdb.h [__USE_GNU]: Likewise.
	* signal/signal.h: Update #endif comments.
	[__USE_MISC]: Remove redundant conditionals.
	* stdlib/stdlib.h: Update #else and #endif comments.
	[__USE_MISC]: Remove redundant conditionals.
	[__USE_GNU]: Likewise.
	* string/bits/string2.h [__USE_MISC]: Likewise.
	* string/string.h: Update #endif comments.
	[__USE_MISC]: Remove redundant conditionals.
	* sysdeps/m68k/m680x0/fpu/bits/mathinline.h [__USE_MISC]:
	Likewise.
	* sysdeps/mach/hurd/bits/fcntl.h [__USE_MISC]: Likewise.
	* sysdeps/mach/hurd/bits/stat.h [__USE_MISC]: Likewise.
	* sysdeps/unix/sysv/linux/alpha/bits/sigaction.h [__USE_MISC]:
	Likewise.
	* sysdeps/unix/sysv/linux/alpha/bits/stat.h [__USE_MISC]:
	Likewise.
	* sysdeps/unix/sysv/linux/bits/fcntl-linux.h: Update #endif
	comments.
	[__USE_MISC]: Remove redundant conditionals.
	* sysdeps/unix/sysv/linux/bits/in.h [__USE_GNU]: Likewise.
	* sysdeps/unix/sysv/linux/bits/sigaction.h [__USE_MISC]: Likewise.
	* sysdeps/unix/sysv/linux/bits/socket.h [__USE_GNU]: Likewise.
	* sysdeps/unix/sysv/linux/bits/stat.h [__USE_MISC]: Likewise.
	* sysdeps/unix/sysv/linux/ia64/bits/sigaction.h [__USE_MISC]:
	Likewise.
	* sysdeps/unix/sysv/linux/m68k/bits/stat.h [__USE_MISC]: Likewise.
	* sysdeps/unix/sysv/linux/mips/bits/sigaction.h [__USE_MISC]:
	Likewise.
	* sysdeps/unix/sysv/linux/mips/bits/stat.h [__USE_MISC]: Likewise.
	* sysdeps/unix/sysv/linux/powerpc/bits/stat.h [__USE_MISC]:
	Likewise.
	* sysdeps/unix/sysv/linux/s390/bits/sigaction.h [__USE_MISC]:
	Likewise.
	* sysdeps/unix/sysv/linux/s390/bits/stat.h [__USE_MISC]: Likewise.
	* sysdeps/unix/sysv/linux/sparc/bits/sigaction.h [__USE_MISC]:
	Likewise.
	* sysdeps/unix/sysv/linux/sparc/bits/stat.h [__USE_MISC]:
	Likewise.
	* sysdeps/unix/sysv/linux/x86/bits/stat.h [__USE_MISC]: Likewise.
	* sysdeps/x86/bits/string.h: Update #endif comments.
	* sysdeps/x86/fpu/bits/mathinline.h [__USE_MISC]: Remove redundant
	conditionals.
	* time/sys/time.h: Update #endif comments.
	* time/time.h: Likewise.
	[__USE_MISC]: Remove redundant conditionals.
2014-02-21 21:45:26 +00:00
H.J. Lu
409e00bd69 Disable x87 inline functions for SSE2 math
When i386 and x86-64 mathinline.h was merged into a single mathinline.h,
"gcc -m32" enables x87 inline functions on x86-64 even when -mfpmath=sse
and SSE2 is enabled.  It is a regression on x86-64.  We should check
__SSE2_MATH__ instead of __x86_64__ when disabling x87 inline functions.
2014-01-29 11:19:05 -08:00
Allan McRae
d4697bc93d Update copyright notices with scripts/update-copyrights 2014-01-01 22:00:23 +10:00
Ondřej Bílka
d1d9eaf478 Use __glibc_reserved instead __unused. 2013-11-26 12:32:28 +01:00
Ondřej Bílka
c0c3f78afb Fix typos. 2013-08-21 19:48:48 +02:00
Joseph Myers
828beb132d Use __extension__ with long long in installed headers. 2013-01-10 20:19:45 +00:00
Joseph Myers
568035b787 Update copyright notices with scripts/update-copyrights. 2013-01-02 19:05:09 +00:00
Joseph Myers
fbeafedeea Make fenv.h FE_* macros usable in #if (bug 3439). 2012-11-03 17:07:56 +00:00
H.J. Lu
25f1282ae5 Use i386 bits/mathinline.h for i386 and x86_64 2012-06-15 13:56:26 -07:00
H.J. Lu
c08010c7cd Use x86_64 fpu/bits/fenv.h for i386 and x86_64 2012-06-06 10:13:19 -07:00