AuroraMiddleware/glibc
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3 Commits

Author SHA1 Message Date
Stafford Horne
9a47b9660b or1k: math soft float support 
OpenRISC support hard float but I will like to submit that after glibc
soft float goes upstream.  The hard float support depends on adding user
access to the FPCSR, which is not supported by the kernel yet.

Reviewed-by: Adhemerval Zanella  <adhemerval.zanella@linaro.org>
 2022-01-05 06:40:06 +09:00
Stafford Horne
de5c0edc80 or1k: startup and dynamic linking code 
Code for C runtime startup and dynamic loading including PLT layout.

Reviewed-by: Adhemerval Zanella  <adhemerval.zanella@linaro.org>
 2022-01-05 06:40:06 +09:00
Stafford Horne
6e5964311d or1k: ABI Implementation 
This code deals with the OpenRISC ABI.

Reviewed-by: Adhemerval Zanella  <adhemerval.zanella@linaro.org>
 2022-01-05 06:40:05 +09:00