Since fe{en,dis}ableexcept() and fesetmode() read-modify-write just the
"mode" (exception enable and rounding mode) bits of the Floating Point Status
Control Register (FPSCR), the lighter weight 'mffsl' instruction can be used
to read the FPSCR (enables and rounding mode), and 'mtfsf 0b00000011' can be
used to write just those bits back to the FPSCR. The net is better performance.
In addition, fe{en,dis}ableexcept() read the FPSCR again after writing it, or
they determine that it doesn't need to be written because it is not changing.
In either case, the local variable holds the current values of the enable
bits in the FPSCR. This local variable can be used instead of again reading
the FPSCR.
Also, that value of the FPSCR which is read the second time is validated
against the requested enables. Since the write can't fail, this validation
step is unnecessary, and can be removed. Instead, the exceptions to be
enabled (or disabled) are transformed into available bits in the FPSCR,
then validated after being transformed back, to ensure that all requested
bits are actually being set. For example, FE_INVALID_SQRT can be
requested, but cannot actually be set. This bit is not mapped during the
transformations, so a test for that bit being set before and after
transformations will show the bit would not be set, and the function will
return -1 for failure.
Finally, convert the local macros in fesetmode.c to more generally useful
macros in fenv_libc.h.
The exceptions passed to fe{en,dis}ableexcept() are defined in the ABI
as a bitmask, a combination of FE_INVALID, FE_OVERFLOW, etc.
Within the functions, these bits must be translated to/from the corresponding
enable bits in the Floating Point Status Control Register (FPSCR).
This translation is currently done bit-by-bit. The compiler generates
a series of conditional bit operations. Nicely, the "FE" exception
bits are all a uniform offset from the FPSCR enable bits, so the bit-by-bit
operation can instead be performed by a shift with appropriate masking.
This patch optimizes the FPSCR update on exception and rounding change
functions by just updating its value if new value if different from
current one. It also optimizes fedisableexcept and feenableexcept by
removing an unecessary FPSCR read.
__fe_nomask_env.
* sysdeps/powerpc/fpu/fe_nomask.c: Add libm_hidden_def.
* sysdeps/unix/sysv/linux/powerpc/powerpc32/fpu/fe_nomask.c: Likewise.
* sysdeps/unix/sysv/linux/powerpc/powerpc64/fpu/fe_nomask.c: Likewise.
* sysdeps/powerpc/bits/fenv.h: Make safe for C++.
* sysdeps/unix/sysv/linux/powerpc/bits/mathinline.h: New file.
* sysdeps/powerpc/fpu/fegetexcept.c (__fegetexcept): Rename
function from fegetexcept and make old name weak alias.
* include/fenv.h: Declare __fegetexcept.
* sysdeps/powerpc/fpu/fedisblxcpt.c: Use __fegetexcept instead of
fegetexcept.
* sysdeps/powerpc/fpu/feenablxcpt.c: Likewise.
* sysdeps/powerpc/fpu/fraiseexcpt.c (__feraiseexcept): Avoid call
to fetestexcept.
* sysdeps/ieee754/ldbl-128ibm/s_log1pl.c (__log1pl): Use __frexpl
instead of frexpl to avoid local PLT.
* math/s_significandl.c (__significandl): Use __ilogbl instead of
ilogbl to avoid local PLT.
* sysdeps/ieee754/ldbl-128ibm/s_expm1l.c (__expm1l): Use __ldexpl
instead of ldexpl to avoid local PLT.
* sysdeps/ieee754/ldbl-128ibm/e_expl.c (__ieee754_expl): Use
__roundl not roundl to avoid local PLT.
* sysdeps/ieee754/ldbl-128/e_j0l.c: Use function names which avoid
local PLTs. Use __sincosl instead of separate sinl and cosl
calls.
* sysdeps/ieee754/ldbl-128/e_j1l.c: Likewise.
Peter Bergner <bergner@us.ibm.com>
* sysdeps/powerpc/bits/fenv.h: Declare __fe_mask_env extern.
Define FE_NOMASK_ENV as FE_EANBLED_ENV. Define FE_MASK_ENV.
* sysdeps/powerpc/fpu/Makefile: Add fe_mask to libm-support.
* sysdeps/powerpc/fpu/fe_mask.c: New file.
* sysdeps/powerpc/fpu/fe_nomask.c: Correct comment.
* sysdeps/powerpc/fpu/fedisblxcpt.c (fedisableexcept):
Call __fe_mask_env() if all FP exceptions disabled.
* sysdeps/powerpc/fpu/feholdexcpt.c (feholdexcept): Copy high 32-bits
from old FPSCR to new fenv to propagate DFP rounding modes.
Call __fe_mask_env() if FP exceptions previously enabled.
* sysdeps/powerpc/fpu/fesetenv.c (fesetenv): Change mask to merge
exceptions from env. Use __fe_nomask_env() or __fe_mask_env() when
transitioning from all exceptions disabled to any exception enabled
or visa versa.
* sysdeps/powerpc/fpu/feupdateenv.c (__feupdateenv): Change mask to
merge exceptions from env. Call __fe_nomask_env or __fe_mask_env
when transitioning from all exceptions disabled to any exception
enabled or visa versa.
* sysdeps/unix/sysv/linux/powerpc/powerpc32/fe_nomask.c: Moved to...
* sysdeps/unix/sysv/linux/powerpc/powerpc32/fpu/fe_nomask.c: ...here.
* sysdeps/unix/sysv/linux/powerpc/powerpc64/fe_nomask.c: Moved to...
* sysdeps/unix/sysv/linux/powerpc/powerpc64/fpu/fe_nomask.c: ...here.
* sysdeps/unix/sysv/linux/powerpc/powerpc32/fpu/fe_mask.c: New file.
* sysdeps/unix/sysv/linux/powerpc/powerpc64/fpu/fe_mask.c: New file.
2001-07-06 Paul Eggert <eggert@twinsun.com>
* manual/argp.texi: Remove ignored LGPL copyright notice; it's
not appropriate for documentation anyway.
* manual/libc-texinfo.sh: "Library General Public License" ->
"Lesser General Public License".
2001-07-06 Andreas Jaeger <aj@suse.de>
* All files under GPL/LGPL version 2: Place under LGPL version
2.1.
* sysdeps/powerpc/fpu/feenablxcpt.c: New file.
* sysdeps/powerpc/fpu/fegetexcept.c: New file.
* sysdeps/unix/sysv/linux/powerpc/fe_nomask.c: New file.
2000-08-27 Geoff Keating <geoffk@cygnus.com>
* sysdeps/powerpc/fpu/fedisblxcpt.c: New file.
* sysdeps/powerpc/fpu/feenablxcpt.c: New file.
* sysdeps/powerpc/fpu/fegetexcept.c: New file.
* sysdeps/unix/sysv/linux/powerpc/fe_nomask.c: New file.
