glibc/sysdeps/loongarch/sys
Xi Ruoyao 97aa7b7346 LoongArch: Ensure sp 16-byte aligned for tlsdesc
"ADDI sp, sp, 24" and "ADDI sp, sp, SZFCSREG" (SZFCSREG = 4) are
misaligning the stack: the ABI mandates a 16-byte alignment.  Fix it
by changing the first one to "ADDI sp, sp, 32", and reuse the spare 4th
slot for saving fcsr.

Reported-by: Jinyang He <hejinyang@loongson.cn>
Signed-off-by: Xi Ruoyao <xry111@xry111.site>
2024-06-14 10:14:54 +08:00
..
asm.h LoongArch: Ensure sp 16-byte aligned for tlsdesc 2024-06-14 10:14:54 +08:00
ifunc.h Update copyright dates with scripts/update-copyrights 2024-01-01 10:53:40 -08:00
regdef.h LoongArch: Add support for TLS Descriptors 2024-05-15 10:31:53 +08:00