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460 lines
16 KiB
C
460 lines
16 KiB
C
/* Definitions for thread-local data handling. Hurd/i386 version.
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Copyright (C) 2003-2024 Free Software Foundation, Inc.
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This file is part of the GNU C Library.
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The GNU C Library is free software; you can redistribute it and/or
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modify it under the terms of the GNU Lesser General Public
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License as published by the Free Software Foundation; either
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version 2.1 of the License, or (at your option) any later version.
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The GNU C Library is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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Lesser General Public License for more details.
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You should have received a copy of the GNU Lesser General Public
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License along with the GNU C Library; if not, see
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<https://www.gnu.org/licenses/>. */
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#ifndef _I386_TLS_H
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#define _I386_TLS_H
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/* Some things really need not be machine-dependent. */
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#include <sysdeps/mach/hurd/tls.h>
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#ifndef __ASSEMBLER__
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# include <dl-dtv.h>
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/* Type of the TCB. */
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typedef struct
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{
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void *tcb; /* Points to this structure. */
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dtv_t *dtv; /* Vector of pointers to TLS data. */
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thread_t self_do_not_use; /* This thread's control port. */
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int multiple_threads;
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uintptr_t sysinfo;
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uintptr_t stack_guard;
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uintptr_t pointer_guard;
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int gscope_flag;
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unsigned int feature_1;
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/* Reservation of some values for the TM ABI. */
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void *__private_tm[3];
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/* GCC split stack support. */
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void *__private_ss;
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void *__glibc_padding1;
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/* Keep these fields last, so offsets of fields above can continue being
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compatible with the i386 Linux version. */
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mach_port_t reply_port; /* This thread's reply port. */
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struct hurd_sigstate *_hurd_sigstate;
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/* Used by the exception handling implementation in the dynamic loader. */
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struct rtld_catch *rtld_catch;
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} tcbhead_t;
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/* GCC generates %gs:0x14 to access the stack guard. */
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_Static_assert (offsetof (tcbhead_t, stack_guard) == 0x14,
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"stack guard offset");
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/* libgcc uses %gs:0x30 to access the split stack pointer. */
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_Static_assert (offsetof (tcbhead_t, __private_ss) == 0x30,
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"split stack pointer offset");
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/* Return tcbhead_t from a TLS segment descriptor. */
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# define HURD_DESC_TLS(desc) \
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({ \
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(tcbhead_t *) ( (desc->low_word >> 16) \
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| ((desc->high_word & 0xff) << 16) \
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| (desc->high_word & 0xff000000)); \
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})
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#endif
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/* The TCB can have any size and the memory following the address the
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thread pointer points to is unspecified. Allocate the TCB there. */
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#define TLS_TCB_AT_TP 1
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#define TLS_DTV_AT_TP 0
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/* Alignment requirement for TCB.
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Some processors such as Intel Atom pay a big penalty on every
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access using a segment override if that segment's base is not
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aligned to the size of a cache line. (See Intel 64 and IA-32
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Architectures Optimization Reference Manual, section 13.3.3.3,
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"Segment Base".) On such machines, a cache line is 64 bytes. */
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#define TCB_ALIGNMENT 64
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#ifndef __ASSEMBLER__
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/* Use i386-specific RPCs to arrange that %gs segment register prefix
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addresses the TCB in each thread. */
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# include <mach/i386/mach_i386.h>
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# ifndef HAVE_I386_SET_GDT
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# define __i386_set_gdt(thr, sel, desc) ((void) (thr), (void) (sel), (void) (desc), MIG_BAD_ID)
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# endif
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# include <errno.h>
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# include <assert.h>
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# define HURD_TLS_DESC_DECL(desc, tcb) \
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struct descriptor desc = \
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{ /* low word: */ \
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0xffff /* limit 0..15 */ \
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| (((unsigned int) (tcb)) << 16) /* base 0..15 */ \
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, /* high word: */ \
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((((unsigned int) (tcb)) >> 16) & 0xff) /* base 16..23 */ \
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| ((0x12 | 0x60 | 0x80) << 8) /* access = ACC_DATA_W|ACC_PL_U|ACC_P */ \
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| (0xf << 16) /* limit 16..19 */ \
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| ((4 | 8) << 20) /* granularity = SZ_32|SZ_G */ \
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| (((unsigned int) (tcb)) & 0xff000000) /* base 24..31 */ \
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}
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# define HURD_SEL_LDT(sel) (__builtin_expect ((sel) & 4, 0))
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#ifndef SHARED
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extern unsigned short __init1_desc;
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# define __HURD_DESC_INITIAL(gs, ds) ((gs) == (ds) || (gs) == __init1_desc)
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#else
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# define __HURD_DESC_INITIAL(gs, ds) ((gs) == (ds))
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#endif
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#if !defined (SHARED) || IS_IN (rtld)
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/* Return 1 if TLS is not initialized yet. */
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extern inline bool __attribute__ ((unused))
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__LIBC_NO_TLS (void)
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{
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unsigned short ds, gs;
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asm ("movw %%ds, %w0\n"
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"movw %%gs, %w1"
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: "=q" (ds), "=q" (gs));
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return __glibc_unlikely (__HURD_DESC_INITIAL (gs, ds));
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}
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/* Code to initially initialize the thread pointer. This might need
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special attention since 'errno' is not yet available and if the
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operation can cause a failure 'errno' must not be touched. */
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static inline bool __attribute__ ((unused))
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_hurd_tls_init (tcbhead_t *tcb, bool full)
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{
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HURD_TLS_DESC_DECL (desc, tcb);
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thread_t self = __mach_thread_self ();
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bool success = true;
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extern mach_port_t __hurd_reply_port0;
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/* This field is used by TLS accesses to get our "thread pointer"
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from the TLS point of view. */
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tcb->tcb = tcb;
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/* We always at least start the sigthread anyway. */
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tcb->multiple_threads = 1;
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if (full)
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/* Take over the reply port we've been using. */
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tcb->reply_port = __hurd_reply_port0;
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/* Get the first available selector. */
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int sel = -1;
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error_t err = __i386_set_gdt (self, &sel, desc);
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if (err == MIG_BAD_ID)
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{
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/* Old kernel, use a per-thread LDT. */
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sel = 0x27;
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err = __i386_set_ldt (self, sel, &desc, 1);
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assert_perror (err);
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if (err)
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{
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success = false;
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goto out;
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}
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}
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else if (err)
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{
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assert_perror (err); /* Separate from above with different line #. */
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success = false;
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goto out;
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}
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/* Now install the new selector. */
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asm volatile ("mov %w0, %%gs" :: "q" (sel));
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if (full)
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/* This port is now owned by the TCB. */
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__hurd_reply_port0 = MACH_PORT_NULL;
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#ifndef SHARED
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else
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__init1_desc = sel;
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#endif
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out:
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__mach_port_deallocate (__mach_task_self (), self);
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return success;
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}
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# define TLS_INIT_TP(descr) _hurd_tls_init ((tcbhead_t *) (descr), 1)
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#else /* defined (SHARED) && !IS_IN (rtld) */
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# define __LIBC_NO_TLS() 0
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#endif
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# if __GNUC_PREREQ (6, 0)
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# define THREAD_SELF \
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(*(tcbhead_t * __seg_gs *) offsetof (tcbhead_t, tcb))
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# define THREAD_GETMEM(descr, member) \
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(*(__typeof (descr->member) __seg_gs *) offsetof (tcbhead_t, member))
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# define THREAD_GETMEM_NC(descr, member, idx) \
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(*(__typeof (descr->member[0]) __seg_gs *) \
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(offsetof (tcbhead_t, member) + (idx) * sizeof (descr->member[0])))
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# define THREAD_SETMEM(descr, member, value) \
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(*(__typeof (descr->member) __seg_gs *) offsetof (tcbhead_t, member) = value)
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# define THREAD_SETMEM_NC(descr, member, index, value) \
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(*(__typeof (descr->member[0]) __seg_gs *) \
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(offsetof (tcbhead_t, member) + (idx) * sizeof (descr->member[0])))
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# else
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/* Return the TCB address of the current thread. */
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# define THREAD_SELF \
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({ tcbhead_t *__tcb; \
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__asm__ ("movl %%gs:%c1,%0" : "=r" (__tcb) \
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: "i" (offsetof (tcbhead_t, tcb))); \
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__tcb;})
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/* Read member of the thread descriptor directly. */
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# define THREAD_GETMEM(descr, member) \
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({ __typeof (descr->member) __value; \
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_Static_assert (sizeof (__value) == 1 \
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|| sizeof (__value) == 4 \
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|| sizeof (__value) == 8, \
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"size of per-thread data"); \
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if (sizeof (__value) == 1) \
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asm volatile ("movb %%gs:%P2,%b0" \
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: "=q" (__value) \
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: "0" (0), "i" (offsetof (tcbhead_t, member))); \
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else if (sizeof (__value) == 4) \
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asm volatile ("movl %%gs:%P1,%0" \
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: "=r" (__value) \
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: "i" (offsetof (tcbhead_t, member))); \
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else /* 8 */ \
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{ \
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asm volatile ("movl %%gs:%P1,%%eax\n\t" \
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"movl %%gs:%P2,%%edx" \
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: "=A" (__value) \
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: "i" (offsetof (tcbhead_t, member)), \
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"i" (offsetof (tcbhead_t, member) + 4)); \
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} \
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__value; })
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/* Same as THREAD_GETMEM, but the member offset can be non-constant. */
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# define THREAD_GETMEM_NC(descr, member, idx) \
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({ __typeof (descr->member[0]) __value; \
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_Static_assert (sizeof (__value) == 1 \
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|| sizeof (__value) == 4 \
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|| sizeof (__value) == 8, \
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"size of per-thread data"); \
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if (sizeof (__value) == 1) \
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asm volatile ("movb %%gs:%P2(%3),%b0" \
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: "=q" (__value) \
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: "0" (0), "i" (offsetof (tcbhead_t, member[0])), \
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"r" (idx)); \
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else if (sizeof (__value) == 4) \
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asm volatile ("movl %%gs:%P1(,%2,4),%0" \
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: "=r" (__value) \
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: "i" (offsetof (tcbhead_t, member[0])), \
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"r" (idx)); \
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else /* 8 */ \
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{ \
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asm volatile ("movl %%gs:%P1(,%2,8),%%eax\n\t" \
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"movl %%gs:4+%P1(,%2,8),%%edx" \
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: "=&A" (__value) \
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: "i" (offsetof (tcbhead_t, member[0])), \
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"r" (idx)); \
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} \
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__value; })
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/* Set member of the thread descriptor directly. */
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# define THREAD_SETMEM(descr, member, value) \
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({ \
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_Static_assert (sizeof (descr->member) == 1 \
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|| sizeof (descr->member) == 4 \
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|| sizeof (descr->member) == 8, \
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"size of per-thread data"); \
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if (sizeof (descr->member) == 1) \
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asm volatile ("movb %b0,%%gs:%P1" : \
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: "iq" (value), \
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"i" (offsetof (tcbhead_t, member))); \
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else if (sizeof (descr->member) == 4) \
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asm volatile ("movl %0,%%gs:%P1" : \
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: "ir" (value), \
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"i" (offsetof (tcbhead_t, member))); \
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else /* 8 */ \
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{ \
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asm volatile ("movl %%eax,%%gs:%P1\n\t" \
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"movl %%edx,%%gs:%P2" : \
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: "A" ((uint64_t) cast_to_integer (value)), \
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"i" (offsetof (tcbhead_t, member)), \
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"i" (offsetof (tcbhead_t, member) + 4)); \
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}})
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/* Same as THREAD_SETMEM, but the member offset can be non-constant. */
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# define THREAD_SETMEM_NC(descr, member, idx, value) \
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({ \
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_Static_assert (sizeof (descr->member[0]) == 1 \
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|| sizeof (descr->member[0]) == 4 \
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|| sizeof (descr->member[0]) == 8, \
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"size of per-thread data"); \
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if (sizeof (descr->member[0]) == 1) \
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asm volatile ("movb %b0,%%gs:%P1(%2)" : \
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: "iq" (value), \
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"i" (offsetof (tcbhead_t, member)), \
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"r" (idx)); \
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else if (sizeof (descr->member[0]) == 4) \
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asm volatile ("movl %0,%%gs:%P1(,%2,4)" : \
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: "ir" (value), \
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"i" (offsetof (tcbhead_t, member)), \
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"r" (idx)); \
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else /* 8 */ \
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{ \
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asm volatile ("movl %%eax,%%gs:%P1(,%2,8)\n\t" \
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"movl %%edx,%%gs:4+%P1(,%2,8)" : \
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: "A" ((uint64_t) cast_to_integer (value)), \
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"i" (offsetof (tcbhead_t, member)), \
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"r" (idx)); \
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}})
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# endif /* __GNUC_PREREQ (6, 0) */
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/* Return the TCB address of a thread given its state.
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Note: this is expensive. */
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# define THREAD_TCB(thread, thread_state) \
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({ int __sel = (thread_state)->basic.gs; \
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struct descriptor __desc, *___desc = &__desc; \
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unsigned int __count = 1; \
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kern_return_t __err; \
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if (HURD_SEL_LDT (__sel)) \
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__err = __i386_get_ldt ((thread), __sel, 1, &___desc, &__count); \
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else \
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__err = __i386_get_gdt ((thread), __sel, &__desc); \
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assert_perror (__err); \
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assert (__count == 1); \
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HURD_DESC_TLS (___desc);})
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/* Install new dtv for current thread. */
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# define INSTALL_NEW_DTV(dtvp) THREAD_SETMEM (THREAD_SELF, dtv, dtvp)
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/* Return the address of the dtv for the current thread. */
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# define THREAD_DTV() THREAD_GETMEM (THREAD_SELF, dtv)
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/* Set the stack guard field in TCB head. */
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#define THREAD_SET_STACK_GUARD(value) \
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THREAD_SETMEM (THREAD_SELF, stack_guard, value)
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#define THREAD_COPY_STACK_GUARD(descr) \
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((descr)->stack_guard \
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= THREAD_GETMEM (THREAD_SELF, stack_guard))
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/* Set the pointer guard field in the TCB head. */
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#define THREAD_SET_POINTER_GUARD(value) \
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THREAD_SETMEM (THREAD_SELF, pointer_guard, value)
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#define THREAD_COPY_POINTER_GUARD(descr) \
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((descr)->pointer_guard \
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= THREAD_GETMEM (THREAD_SELF, pointer_guard))
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# include <mach/machine/thread_status.h>
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/* Set up TLS in the new thread of a fork child, copying from the original. */
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static inline kern_return_t __attribute__ ((unused))
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_hurd_tls_fork (thread_t child, thread_t orig, struct i386_thread_state *state)
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{
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/* Fetch the selector set by _hurd_tls_init. */
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int sel;
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asm ("mov %%gs, %w0" : "=q" (sel) : "0" (0));
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if (sel == state->ds) /* _hurd_tls_init was never called. */
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return 0;
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struct descriptor desc, *_desc = &desc;
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error_t err;
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unsigned int count = 1;
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if (HURD_SEL_LDT (sel))
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err = __i386_get_ldt (orig, sel, 1, &_desc, &count);
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else
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err = __i386_get_gdt (orig, sel, &desc);
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assert_perror (err);
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if (err)
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return err;
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if (HURD_SEL_LDT (sel))
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err = __i386_set_ldt (child, sel, &desc, 1);
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else
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err = __i386_set_gdt (child, &sel, desc);
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state->gs = sel;
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return err;
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}
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static inline kern_return_t __attribute__ ((unused))
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_hurd_tls_new (thread_t child, tcbhead_t *tcb)
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{
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error_t err;
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/* Fetch the target thread's state. */
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struct i386_thread_state state;
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mach_msg_type_number_t state_count = i386_THREAD_STATE_COUNT;
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err = __thread_get_state (child, i386_REGS_SEGS_STATE,
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(thread_state_t) &state,
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&state_count);
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if (err)
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return err;
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assert (state_count == i386_THREAD_STATE_COUNT);
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/* Fetch the selector set by _hurd_tls_init. */
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int sel;
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asm ("mov %%gs, %w0" : "=q" (sel) : "0" (0));
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if (sel == state.ds) /* _hurd_tls_init was never called. */
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return 0;
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HURD_TLS_DESC_DECL (desc, tcb);
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tcb->tcb = tcb;
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if (HURD_SEL_LDT (sel))
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err = __i386_set_ldt (child, sel, &desc, 1);
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else
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err = __i386_set_gdt (child, &sel, desc);
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if (err)
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return err;
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/* Update gs to use the selector. */
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state.gs = sel;
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return __thread_set_state (child, i386_REGS_SEGS_STATE,
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(thread_state_t) &state,
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state_count);
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}
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/* Global scope switch support. */
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# define THREAD_GSCOPE_FLAG_UNUSED 0
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# define THREAD_GSCOPE_FLAG_USED 1
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# define THREAD_GSCOPE_FLAG_WAIT 2
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# define THREAD_GSCOPE_SET_FLAG() \
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THREAD_SETMEM (THREAD_SELF, gscope_flag, THREAD_GSCOPE_FLAG_USED)
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# define THREAD_GSCOPE_RESET_FLAG() \
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({ \
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int __flag; \
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asm volatile ("xchgl %0, %%gs:%P1" \
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: "=r" (__flag) \
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: "i" (offsetof (tcbhead_t, gscope_flag)), \
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"0" (THREAD_GSCOPE_FLAG_UNUSED)); \
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if (__flag == THREAD_GSCOPE_FLAG_WAIT) \
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lll_wake (THREAD_SELF->gscope_flag, LLL_PRIVATE); \
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})
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#endif /* !__ASSEMBLER__ */
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#endif /* i386/tls.h */
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