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41bdb6e20c
2001-07-06 Paul Eggert <eggert@twinsun.com> * manual/argp.texi: Remove ignored LGPL copyright notice; it's not appropriate for documentation anyway. * manual/libc-texinfo.sh: "Library General Public License" -> "Lesser General Public License". 2001-07-06 Andreas Jaeger <aj@suse.de> * All files under GPL/LGPL version 2: Place under LGPL version 2.1.
337 lines
9.6 KiB
C
337 lines
9.6 KiB
C
/* Dump registers.
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Copyright (C) 1999, 2000 Free Software Foundation, Inc.
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This file is part of the GNU C Library.
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Contributed by Jakub Jelinek <jakub@redhat.com>, 1999.
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The GNU C Library is free software; you can redistribute it and/or
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modify it under the terms of the GNU Lesser General Public
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License as published by the Free Software Foundation; either
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version 2.1 of the License, or (at your option) any later version.
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The GNU C Library is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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Lesser General Public License for more details.
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You should have received a copy of the GNU Lesser General Public
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License along with the GNU C Library; if not, write to the Free
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Software Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA
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02111-1307 USA. */
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#include <sys/uio.h>
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#include <stdio-common/_itoa.h>
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/* We will print the register dump in this format:
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PSR: XXXXXXXX PC: XXXXXXXX NPC: XXXXXXXX Y: XXXXXXXX
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g0: 00000000 g1: XXXXXXXX g2: XXXXXXXX g3: XXXXXXXX
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g4: XXXXXXXX g5: XXXXXXXX g6: XXXXXXXX g7: XXXXXXXX
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o0: XXXXXXXX o1: XXXXXXXX o2: XXXXXXXX o3: XXXXXXXX
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o4: XXXXXXXX o5: XXXXXXXX sp: XXXXXXXX o7: XXXXXXXX
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l0: XXXXXXXX l1: XXXXXXXX l2: XXXXXXXX l3: XXXXXXXX
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l4: XXXXXXXX l5: XXXXXXXX l6: XXXXXXXX l7: XXXXXXXX
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i0: XXXXXXXX i1: XXXXXXXX i2: XXXXXXXX i3: XXXXXXXX
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i4: XXXXXXXX i5: XXXXXXXX fp: XXXXXXXX i7: XXXXXXXX
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followed on sun4, sun4c, sun4d, sun4m by:
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Old mask: XXXXXXXX FSR: XXXXXXXX FPQ: XXXXXXXX
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f0: XXXXXXXXXXXXXXXX f2: XXXXXXXXXXXXXXXX f4: XXXXXXXXXXXXXXXX
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f6: XXXXXXXXXXXXXXXX f8: XXXXXXXXXXXXXXXX f10: XXXXXXXXXXXXXXXX
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f12: XXXXXXXXXXXXXXXX f14: XXXXXXXXXXXXXXXX f16: XXXXXXXXXXXXXXXX
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f18: XXXXXXXXXXXXXXXX f20: XXXXXXXXXXXXXXXX f22: XXXXXXXXXXXXXXXX
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f24: XXXXXXXXXXXXXXXX f26: XXXXXXXXXXXXXXXX f28: XXXXXXXXXXXXXXXX
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f30: XXXXXXXXXXXXXXXX
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and on sun4u by:
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Old mask: XXXXXXXX XFSR: XXXXXXXXXXXXXXXX GSR: XX FPRS: X
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f0: XXXXXXXXXXXXXXXX f2: XXXXXXXXXXXXXXXX f4: XXXXXXXXXXXXXXXX
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f6: XXXXXXXXXXXXXXXX f8: XXXXXXXXXXXXXXXX f10: XXXXXXXXXXXXXXXX
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f12: XXXXXXXXXXXXXXXX f14: XXXXXXXXXXXXXXXX f16: XXXXXXXXXXXXXXXX
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f18: XXXXXXXXXXXXXXXX f20: XXXXXXXXXXXXXXXX f22: XXXXXXXXXXXXXXXX
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f24: XXXXXXXXXXXXXXXX f26: XXXXXXXXXXXXXXXX f28: XXXXXXXXXXXXXXXX
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f30: XXXXXXXXXXXXXXXX f32: XXXXXXXXXXXXXXXX f34: XXXXXXXXXXXXXXXX
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f36: XXXXXXXXXXXXXXXX f38: XXXXXXXXXXXXXXXX f40: XXXXXXXXXXXXXXXX
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f42: XXXXXXXXXXXXXXXX f44: XXXXXXXXXXXXXXXX f46: XXXXXXXXXXXXXXXX
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f48: XXXXXXXXXXXXXXXX f50: XXXXXXXXXXXXXXXX f52: XXXXXXXXXXXXXXXX
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f54: XXXXXXXXXXXXXXXX f56: XXXXXXXXXXXXXXXX f58: XXXXXXXXXXXXXXXX
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f60: XXXXXXXXXXXXXXXX f62: XXXXXXXXXXXXXXXX
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*/
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static void
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hexvalue (unsigned long int value, char *buf, size_t len)
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{
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char *cp = _itoa_word (value, buf + len, 16, 0);
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while (cp > buf)
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*--cp = '0';
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}
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struct __siginfo_sparc32_fpu
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{
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unsigned int si_float_regs[32];
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unsigned int si_fsr;
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unsigned int si_fpq;
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};
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struct __siginfo_sparc64_fpu
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{
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unsigned int si_float_regs[64];
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unsigned int si_xfsr;
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unsigned int si_fsr;
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unsigned int _pad1;
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unsigned int si_gsr;
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unsigned int _pad2;
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unsigned int si_fprs;
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};
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static void
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register_dump (int fd, SIGCONTEXT ctx)
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{
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char regs[36][8];
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char fregs[68][8];
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struct iovec iov[150];
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size_t nr = 0;
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int i;
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unsigned int *r = (unsigned int *)
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ctx->si_regs.u_regs[14];
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#define ADD_STRING(str) \
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iov[nr].iov_base = (char *) str; \
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iov[nr].iov_len = strlen (str); \
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++nr
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#define ADD_MEM(str, len) \
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iov[nr].iov_base = str; \
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iov[nr].iov_len = len; \
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++nr
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/* Generate strings of register contents. */
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hexvalue (ctx->si_regs.psr, regs[0], 8);
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hexvalue (ctx->si_regs.pc, regs[1], 8);
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hexvalue (ctx->si_regs.npc, regs[2], 8);
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hexvalue (ctx->si_regs.y, regs[3], 8);
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for (i = 1; i <= 15; i++)
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hexvalue (ctx->si_regs.u_regs[i], regs[3+i], 8);
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for (i = 0; i <= 15; i++)
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hexvalue (r[i], regs[19+i], 8);
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hexvalue (ctx->si_mask, regs[35], 8);
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/* Generate the output. */
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ADD_STRING ("Register dump:\n\n PSR: ");
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ADD_MEM (regs[0], 8);
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ADD_STRING (" PC: ");
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ADD_MEM (regs[1], 8);
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ADD_STRING (" NPC: ");
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ADD_MEM (regs[2], 8);
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ADD_STRING (" Y: ");
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ADD_MEM (regs[3], 8);
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ADD_STRING ("\n g0: 00000000 g1: ");
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ADD_MEM (regs[4], 8);
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ADD_STRING (" g2: ");
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ADD_MEM (regs[5], 8);
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ADD_STRING (" g3: ");
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ADD_MEM (regs[6], 8);
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ADD_STRING ("\n g4: ");
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ADD_MEM (regs[7], 8);
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ADD_STRING (" g5: ");
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ADD_MEM (regs[8], 8);
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ADD_STRING (" g6: ");
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ADD_MEM (regs[9], 8);
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ADD_STRING (" g7: ");
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ADD_MEM (regs[10], 8);
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ADD_STRING ("\n o0: ");
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ADD_MEM (regs[11], 8);
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ADD_STRING (" o1: ");
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ADD_MEM (regs[12], 8);
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ADD_STRING (" o2: ");
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ADD_MEM (regs[13], 8);
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ADD_STRING (" o3: ");
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ADD_MEM (regs[14], 8);
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ADD_STRING ("\n o4: ");
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ADD_MEM (regs[15], 8);
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ADD_STRING (" o5: ");
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ADD_MEM (regs[16], 8);
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ADD_STRING (" sp: ");
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ADD_MEM (regs[17], 8);
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ADD_STRING (" o7: ");
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ADD_MEM (regs[18], 8);
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ADD_STRING ("\n l0: ");
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ADD_MEM (regs[19], 8);
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ADD_STRING (" l1: ");
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ADD_MEM (regs[20], 8);
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ADD_STRING (" l2: ");
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ADD_MEM (regs[21], 8);
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ADD_STRING (" l3: ");
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ADD_MEM (regs[22], 8);
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ADD_STRING ("\n l4: ");
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ADD_MEM (regs[23], 8);
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ADD_STRING (" l5: ");
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ADD_MEM (regs[24], 8);
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ADD_STRING (" l6: ");
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ADD_MEM (regs[25], 8);
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ADD_STRING (" l7: ");
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ADD_MEM (regs[26], 8);
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ADD_STRING ("\n i0: ");
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ADD_MEM (regs[27], 8);
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ADD_STRING (" i1: ");
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ADD_MEM (regs[28], 8);
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ADD_STRING (" i2: ");
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ADD_MEM (regs[29], 8);
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ADD_STRING (" i3: ");
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ADD_MEM (regs[30], 8);
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ADD_STRING ("\n i4: ");
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ADD_MEM (regs[31], 8);
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ADD_STRING (" i5: ");
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ADD_MEM (regs[32], 8);
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ADD_STRING (" fp: ");
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ADD_MEM (regs[33], 8);
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ADD_STRING (" i7: ");
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ADD_MEM (regs[34], 8);
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ADD_STRING ("\n\n Old mask: ");
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ADD_MEM (regs[35], 8);
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if ((ctx->si_regs.psr & 0xff000000) == 0xff000000)
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{
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struct __siginfo_sparc64_fpu *f;
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f = *(struct __siginfo_sparc64_fpu **) (ctx + 1);
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if (f != NULL)
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{
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for (i = 0; i < 64; i++)
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hexvalue (f->si_float_regs[i], fregs[i], 8);
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hexvalue (f->si_xfsr, fregs[64], 8);
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hexvalue (f->si_fsr, fregs[65], 8);
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hexvalue (f->si_gsr, fregs[66], 2);
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hexvalue (f->si_fprs, fregs[67], 1);
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ADD_STRING (" XFSR: ");
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ADD_MEM (fregs[64], 8);
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ADD_MEM (fregs[65], 8);
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ADD_STRING (" GSR: ");
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ADD_MEM (fregs[66], 2);
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ADD_STRING (" FPRS: ");
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ADD_MEM (fregs[67], 1);
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ADD_STRING ("\n f0: ");
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ADD_MEM (fregs[0], 16);
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ADD_STRING (" f2: ");
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ADD_MEM (fregs[2], 16);
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ADD_STRING (" f4: ");
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ADD_MEM (fregs[4], 16);
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ADD_STRING ("\n f6: ");
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ADD_MEM (fregs[6], 16);
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ADD_STRING (" f8: ");
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ADD_MEM (fregs[8], 16);
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ADD_STRING (" f10: ");
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ADD_MEM (fregs[10], 16);
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ADD_STRING ("\n f12: ");
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ADD_MEM (fregs[12], 16);
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ADD_STRING (" f14: ");
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ADD_MEM (fregs[14], 16);
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ADD_STRING (" f16: ");
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ADD_MEM (fregs[16], 16);
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ADD_STRING ("\n f18: ");
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ADD_MEM (fregs[18], 16);
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ADD_STRING (" f20: ");
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ADD_MEM (fregs[20], 16);
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ADD_STRING (" f22: ");
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ADD_MEM (fregs[22], 16);
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ADD_STRING ("\n f24: ");
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ADD_MEM (fregs[24], 16);
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ADD_STRING (" f26: ");
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ADD_MEM (fregs[26], 16);
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ADD_STRING (" f28: ");
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ADD_MEM (fregs[28], 16);
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ADD_STRING ("\n f30: ");
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ADD_MEM (fregs[30], 16);
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ADD_STRING (" f32: ");
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ADD_MEM (fregs[32], 16);
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ADD_STRING (" f34: ");
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ADD_MEM (fregs[34], 16);
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ADD_STRING ("\n f36: ");
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ADD_MEM (fregs[36], 16);
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ADD_STRING (" f38: ");
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ADD_MEM (fregs[38], 16);
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ADD_STRING (" f40: ");
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ADD_MEM (fregs[40], 16);
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ADD_STRING ("\n f42: ");
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ADD_MEM (fregs[42], 16);
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ADD_STRING (" f44: ");
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ADD_MEM (fregs[44], 16);
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ADD_STRING (" f46: ");
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ADD_MEM (fregs[46], 16);
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ADD_STRING ("\n f48: ");
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ADD_MEM (fregs[48], 16);
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ADD_STRING (" f50: ");
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ADD_MEM (fregs[50], 16);
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ADD_STRING (" f52: ");
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ADD_MEM (fregs[52], 16);
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ADD_STRING ("\n f54: ");
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ADD_MEM (fregs[54], 16);
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ADD_STRING (" f56: ");
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ADD_MEM (fregs[56], 16);
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ADD_STRING (" f58: ");
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ADD_MEM (fregs[58], 16);
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ADD_STRING ("\n f60: ");
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ADD_MEM (fregs[60], 16);
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ADD_STRING (" f62: ");
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ADD_MEM (fregs[62], 16);
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}
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}
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else
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{
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struct __siginfo_sparc32_fpu *f;
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f = *(struct __siginfo_sparc32_fpu **) (ctx + 1);
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if (f != NULL)
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{
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for (i = 0; i < 32; i++)
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hexvalue (f->si_float_regs[i], fregs[i], 8);
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hexvalue (f->si_fsr, fregs[64], 8);
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hexvalue (f->si_fpq, fregs[65], 8);
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ADD_STRING (" FSR: ");
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ADD_MEM (fregs[64], 8);
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ADD_STRING (" FPQ: ");
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ADD_MEM (fregs[65], 8);
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ADD_STRING ("\n f0: ");
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ADD_MEM (fregs[0], 16);
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ADD_STRING (" f2: ");
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ADD_MEM (fregs[2], 16);
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ADD_STRING (" f4: ");
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ADD_MEM (fregs[4], 16);
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ADD_STRING ("\n f6: ");
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ADD_MEM (fregs[6], 16);
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ADD_STRING (" f8: ");
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ADD_MEM (fregs[8], 16);
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ADD_STRING (" f10: ");
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ADD_MEM (fregs[10], 16);
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ADD_STRING ("\n f12: ");
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ADD_MEM (fregs[12], 16);
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ADD_STRING (" f14: ");
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ADD_MEM (fregs[14], 16);
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ADD_STRING (" f16: ");
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ADD_MEM (fregs[16], 16);
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ADD_STRING ("\n f18: ");
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ADD_MEM (fregs[18], 16);
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ADD_STRING (" f20: ");
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ADD_MEM (fregs[20], 16);
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ADD_STRING (" f22: ");
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ADD_MEM (fregs[22], 16);
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ADD_STRING ("\n f24: ");
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ADD_MEM (fregs[24], 16);
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ADD_STRING (" f26: ");
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ADD_MEM (fregs[26], 16);
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ADD_STRING (" f28: ");
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ADD_MEM (fregs[28], 16);
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ADD_STRING ("\n f30: ");
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ADD_MEM (fregs[30], 16);
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}
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}
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ADD_STRING ("\n");
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/* Write the stuff out. */
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writev (fd, iov, nr);
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}
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#define REGISTER_DUMP register_dump (fd, ctx)
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