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d5b411854f
A number of functions in the sysdeps/powerpc/powerpc64/ tree don't use or change r2, yet declare a global entry that sets up r2. This patch fixes that problem, and consolidates the ENTRY and EALIGN macros. * sysdeps/powerpc/powerpc64/sysdep.h: Formatting. (NOPS, ENTRY_3): New macros. (ENTRY): Rewrite. (ENTRY_TOCLESS): Define. (EALIGN, EALIGN_W_0, EALIGN_W_1, EALIGN_W_2, EALIGN_W_4, EALIGN_W_5, EALIGN_W_6, EALIGN_W_7, EALIGN_W_8): Delete. * sysdeps/powerpc/powerpc64/a2/memcpy.S: Replace EALIGN with ENTRY. * sysdeps/powerpc/powerpc64/dl-trampoline.S: Likewise. * sysdeps/powerpc/powerpc64/fpu/s_ceil.S: Likewise. * sysdeps/powerpc/powerpc64/fpu/s_ceilf.S: Likewise. * sysdeps/powerpc/powerpc64/fpu/s_floor.S: Likewise. * sysdeps/powerpc/powerpc64/fpu/s_floorf.S: Likewise. * sysdeps/powerpc/powerpc64/fpu/s_nearbyint.S: Likewise. * sysdeps/powerpc/powerpc64/fpu/s_nearbyintf.S: Likewise. * sysdeps/powerpc/powerpc64/fpu/s_rint.S: Likewise. * sysdeps/powerpc/powerpc64/fpu/s_rintf.S: Likewise. * sysdeps/powerpc/powerpc64/fpu/s_round.S: Likewise. * sysdeps/powerpc/powerpc64/fpu/s_roundf.S: Likewise. * sysdeps/powerpc/powerpc64/fpu/s_trunc.S: Likewise. * sysdeps/powerpc/powerpc64/fpu/s_truncf.S: Likewise. * sysdeps/powerpc/powerpc64/memset.S: Likewise. * sysdeps/powerpc/powerpc64/power7/fpu/s_finite.S: Likewise. * sysdeps/powerpc/powerpc64/power7/fpu/s_isinf.S: Likewise. * sysdeps/powerpc/powerpc64/power7/fpu/s_isnan.S: Likewise. * sysdeps/powerpc/powerpc64/power7/strstr.S: Likewise. * sysdeps/powerpc/powerpc64/power8/fpu/e_expf.S: Likewise. * sysdeps/powerpc/powerpc64/power8/fpu/s_cosf.S: Likewise. * sysdeps/powerpc/powerpc64/power8/fpu/s_sinf.S: Likewise. * sysdeps/powerpc/powerpc64/power8/strcasestr.S: Likewise. * sysdeps/powerpc/powerpc64/addmul_1.S: Use ENTRY_TOCLESS. * sysdeps/powerpc/powerpc64/cell/memcpy.S: Likewise. * sysdeps/powerpc/powerpc64/fpu/s_copysign.S: Likewise. * sysdeps/powerpc/powerpc64/fpu/s_copysignl.S: Likewise. * sysdeps/powerpc/powerpc64/fpu/s_fabsl.S: Likewise. * sysdeps/powerpc/powerpc64/fpu/s_isnan.S: Likewise. * sysdeps/powerpc/powerpc64/fpu/s_llrint.S: Likewise. * sysdeps/powerpc/powerpc64/fpu/s_llrintf.S: Likewise. * sysdeps/powerpc/powerpc64/lshift.S: Likewise. * sysdeps/powerpc/powerpc64/memcpy.S: Likewise. * sysdeps/powerpc/powerpc64/mul_1.S: Likewise. * sysdeps/powerpc/powerpc64/power4/memcmp.S: Likewise. * sysdeps/powerpc/powerpc64/power4/memcpy.S: Likewise. * sysdeps/powerpc/powerpc64/power4/memset.S: Likewise. * sysdeps/powerpc/powerpc64/power4/strncmp.S: Likewise. * sysdeps/powerpc/powerpc64/power5+/fpu/s_ceil.S: Likewise. * sysdeps/powerpc/powerpc64/power5+/fpu/s_ceilf.S: Likewise. * sysdeps/powerpc/powerpc64/power5+/fpu/s_floor.S: Likewise. * sysdeps/powerpc/powerpc64/power5+/fpu/s_floorf.S: Likewise. * sysdeps/powerpc/powerpc64/power5+/fpu/s_llround.S: Likewise. * sysdeps/powerpc/powerpc64/power5+/fpu/s_round.S: Likewise. * sysdeps/powerpc/powerpc64/power5+/fpu/s_roundf.S: Likewise. * sysdeps/powerpc/powerpc64/power5+/fpu/s_trunc.S: Likewise. * sysdeps/powerpc/powerpc64/power5+/fpu/s_truncf.S: Likewise. * sysdeps/powerpc/powerpc64/power5/fpu/s_isnan.S: Likewise. * sysdeps/powerpc/powerpc64/power6/fpu/s_copysign.S: Likewise. * sysdeps/powerpc/powerpc64/power6/fpu/s_isnan.S: Likewise. * sysdeps/powerpc/powerpc64/power6/memcpy.S: Likewise. * sysdeps/powerpc/powerpc64/power6/memset.S: Likewise. * sysdeps/powerpc/powerpc64/power6x/fpu/s_isnan.S: Likewise. * sysdeps/powerpc/powerpc64/power6x/fpu/s_llrint.S: Likewise. * sysdeps/powerpc/powerpc64/power6x/fpu/s_llround.S: Likewise. * sysdeps/powerpc/powerpc64/power7/add_n.S: Likewise. * sysdeps/powerpc/powerpc64/power7/memchr.S: Likewise. * sysdeps/powerpc/powerpc64/power7/memcmp.S: Likewise. * sysdeps/powerpc/powerpc64/power7/memcpy.S: Likewise. * sysdeps/powerpc/powerpc64/power7/memmove.S: Likewise. * sysdeps/powerpc/powerpc64/power7/mempcpy.S: Likewise. * sysdeps/powerpc/powerpc64/power7/memrchr.S: Likewise. * sysdeps/powerpc/powerpc64/power7/memset.S: Likewise. * sysdeps/powerpc/powerpc64/power7/rawmemchr.S: Likewise. * sysdeps/powerpc/powerpc64/power7/strcasecmp.S (strcasecmp_l): Likewise. * sysdeps/powerpc/powerpc64/power7/strchr.S: Likewise. * sysdeps/powerpc/powerpc64/power7/strchrnul.S: Likewise. * sysdeps/powerpc/powerpc64/power7/strcmp.S: Likewise. * sysdeps/powerpc/powerpc64/power7/strlen.S: Likewise. * sysdeps/powerpc/powerpc64/power7/strncmp.S: Likewise. * sysdeps/powerpc/powerpc64/power7/strncpy.S: Likewise. * sysdeps/powerpc/powerpc64/power7/strnlen.S: Likewise. * sysdeps/powerpc/powerpc64/power7/strrchr.S: Likewise. * sysdeps/powerpc/powerpc64/power8/fpu/s_finite.S: Likewise. * sysdeps/powerpc/powerpc64/power8/fpu/s_isinf.S: Likewise. * sysdeps/powerpc/powerpc64/power8/fpu/s_isnan.S: Likewise. * sysdeps/powerpc/powerpc64/power8/fpu/s_llrint.S: Likewise. * sysdeps/powerpc/powerpc64/power8/fpu/s_llround.S: Likewise. * sysdeps/powerpc/powerpc64/power8/memcmp.S: Likewise. * sysdeps/powerpc/powerpc64/power8/memset.S: Likewise. * sysdeps/powerpc/powerpc64/power8/strchr.S: Likewise. * sysdeps/powerpc/powerpc64/power8/strcmp.S: Likewise. * sysdeps/powerpc/powerpc64/power8/strcpy.S: Likewise. * sysdeps/powerpc/powerpc64/power8/strlen.S: Likewise. * sysdeps/powerpc/powerpc64/power8/strncmp.S: Likewise. * sysdeps/powerpc/powerpc64/power8/strncpy.S: Likewise. * sysdeps/powerpc/powerpc64/power8/strnlen.S: Likewise. * sysdeps/powerpc/powerpc64/power8/strrchr.S: Likewise. * sysdeps/powerpc/powerpc64/power8/strspn.S: Likewise. * sysdeps/powerpc/powerpc64/power9/strcmp.S: Likewise. * sysdeps/powerpc/powerpc64/power9/strncmp.S: Likewise. * sysdeps/powerpc/powerpc64/strchr.S: Likewise. * sysdeps/powerpc/powerpc64/strcmp.S: Likewise. * sysdeps/powerpc/powerpc64/strlen.S: Likewise. * sysdeps/powerpc/powerpc64/strncmp.S: Likewise. * sysdeps/powerpc/powerpc64/ppc-mcount.S: Store LR earlier. Don't add nop when SHARED. * sysdeps/powerpc/powerpc64/start.S: Fix comment. * sysdeps/powerpc/powerpc64/multiarch/strrchr-power8.S (ENTRY): Don't define. (ENTRY_TOCLESS): Define. * sysdeps/powerpc/powerpc32/sysdep.h (ENTRY_TOCLESS): Define. * sysdeps/powerpc/fpu/s_fma.S: Use ENTRY_TOCLESS. * sysdeps/powerpc/fpu/s_fmaf.S: Likewise.
398 lines
9.6 KiB
ArmAsm
398 lines
9.6 KiB
ArmAsm
/* Optimized memcpy implementation for PowerPC64.
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Copyright (C) 2003-2017 Free Software Foundation, Inc.
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This file is part of the GNU C Library.
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The GNU C Library is free software; you can redistribute it and/or
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modify it under the terms of the GNU Lesser General Public
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License as published by the Free Software Foundation; either
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version 2.1 of the License, or (at your option) any later version.
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The GNU C Library is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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Lesser General Public License for more details.
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You should have received a copy of the GNU Lesser General Public
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License along with the GNU C Library; if not, see
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<http://www.gnu.org/licenses/>. */
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#include <sysdep.h>
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/* __ptr_t [r3] memcpy (__ptr_t dst [r3], __ptr_t src [r4], size_t len [r5]);
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Returns 'dst'.
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Memcpy handles short copies (< 32-bytes) using a binary move blocks
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(no loops) of lwz/stw. The tail (remaining 1-3) bytes is handled
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with the appropriate combination of byte and halfword load/stores.
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There is minimal effort to optimize the alignment of short moves.
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The 64-bit implementations of POWER3 and POWER4 do a reasonable job
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of handling unaligned load/stores that do not cross 32-byte boundaries.
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Longer moves (>= 32-bytes) justify the effort to get at least the
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destination doubleword (8-byte) aligned. Further optimization is
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possible when both source and destination are doubleword aligned.
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Each case has a optimized unrolled loop. */
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#ifndef MEMCPY
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# define MEMCPY memcpy
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#endif
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ENTRY_TOCLESS (MEMCPY, 5)
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CALL_MCOUNT 3
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cmpldi cr1,5,31
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neg 0,3
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std 3,-16(1)
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std 31,-8(1)
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cfi_offset(31,-8)
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andi. 11,3,7 /* check alignment of dst. */
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clrldi 0,0,61 /* Number of bytes until the 1st doubleword of dst. */
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clrldi 10,4,61 /* check alignment of src. */
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cmpldi cr6,5,8
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ble- cr1,.L2 /* If move < 32 bytes use short move code. */
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cmpld cr6,10,11
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mr 12,4
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srdi 9,5,3 /* Number of full double words remaining. */
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mtcrf 0x01,0
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mr 31,5
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beq .L0
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subf 31,0,5
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/* Move 0-7 bytes as needed to get the destination doubleword aligned. */
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1: bf 31,2f
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lbz 6,0(12)
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addi 12,12,1
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stb 6,0(3)
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addi 3,3,1
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2: bf 30,4f
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lhz 6,0(12)
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addi 12,12,2
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sth 6,0(3)
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addi 3,3,2
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4: bf 29,0f
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lwz 6,0(12)
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addi 12,12,4
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stw 6,0(3)
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addi 3,3,4
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0:
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clrldi 10,12,61 /* check alignment of src again. */
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srdi 9,31,3 /* Number of full double words remaining. */
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/* Copy doublewords from source to destination, assuming the
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destination is aligned on a doubleword boundary.
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At this point we know there are at least 25 bytes left (32-7) to copy.
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The next step is to determine if the source is also doubleword aligned.
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If not branch to the unaligned move code at .L6. which uses
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a load, shift, store strategy.
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Otherwise source and destination are doubleword aligned, and we can
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the optimized doubleword copy loop. */
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.L0:
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clrldi 11,31,61
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mtcrf 0x01,9
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bne- cr6,.L6 /* If source is not DW aligned. */
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/* Move doublewords where destination and source are DW aligned.
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Use a unrolled loop to copy 4 doubleword (32-bytes) per iteration.
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If the copy is not an exact multiple of 32 bytes, 1-3
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doublewords are copied as needed to set up the main loop. After
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the main loop exits there may be a tail of 1-7 bytes. These byte are
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copied a word/halfword/byte at a time as needed to preserve alignment. */
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srdi 8,31,5
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cmpldi cr1,9,4
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cmpldi cr6,11,0
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mr 11,12
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bf 30,1f
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ld 6,0(12)
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ld 7,8(12)
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addi 11,12,16
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mtctr 8
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std 6,0(3)
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std 7,8(3)
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addi 10,3,16
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bf 31,4f
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ld 0,16(12)
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std 0,16(3)
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blt cr1,3f
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addi 11,12,24
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addi 10,3,24
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b 4f
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.align 4
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1:
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mr 10,3
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mtctr 8
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bf 31,4f
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ld 6,0(12)
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addi 11,12,8
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std 6,0(3)
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addi 10,3,8
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.align 4
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4:
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ld 6,0(11)
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ld 7,8(11)
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ld 8,16(11)
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ld 0,24(11)
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addi 11,11,32
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2:
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std 6,0(10)
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std 7,8(10)
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std 8,16(10)
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std 0,24(10)
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addi 10,10,32
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bdnz 4b
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3:
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rldicr 0,31,0,60
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mtcrf 0x01,31
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beq cr6,0f
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.L9:
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add 3,3,0
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add 12,12,0
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/* At this point we have a tail of 0-7 bytes and we know that the
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destination is double word aligned. */
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4: bf 29,2f
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lwz 6,0(12)
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addi 12,12,4
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stw 6,0(3)
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addi 3,3,4
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2: bf 30,1f
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lhz 6,0(12)
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addi 12,12,2
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sth 6,0(3)
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addi 3,3,2
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1: bf 31,0f
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lbz 6,0(12)
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stb 6,0(3)
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0:
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/* Return original dst pointer. */
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ld 31,-8(1)
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ld 3,-16(1)
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blr
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/* Copy up to 31 bytes. This divided into two cases 0-8 bytes and 9-31
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bytes. Each case is handled without loops, using binary (1,2,4,8)
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tests.
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In the short (0-8 byte) case no attempt is made to force alignment
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of either source or destination. The hardware will handle the
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unaligned load/stores with small delays for crossing 32- 64-byte, and
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4096-byte boundaries. Since these short moves are unlikely to be
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unaligned or cross these boundaries, the overhead to force
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alignment is not justified.
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The longer (9-31 byte) move is more likely to cross 32- or 64-byte
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boundaries. Since only loads are sensitive to the 32-/64-byte
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boundaries it is more important to align the source then the
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destination. If the source is not already word aligned, we first
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move 1-3 bytes as needed. Since we are only word aligned we don't
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use double word load/stores to insure that all loads are aligned.
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While the destination and stores may still be unaligned, this
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is only an issue for page (4096 byte boundary) crossing, which
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should be rare for these short moves. The hardware handles this
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case automatically with a small delay. */
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.align 4
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.L2:
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mtcrf 0x01,5
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neg 8,4
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clrrdi 11,4,2
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andi. 0,8,3
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ble cr6,.LE8 /* Handle moves of 0-8 bytes. */
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/* At least 9 bytes left. Get the source word aligned. */
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cmpldi cr1,5,16
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mr 10,5
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mr 12,4
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cmpldi cr6,0,2
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beq .L3 /* If the source is already word aligned skip this. */
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/* Copy 1-3 bytes to get source address word aligned. */
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lwz 6,0(11)
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subf 10,0,5
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add 12,4,0
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blt cr6,5f
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srdi 7,6,16
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bgt cr6,3f
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#ifdef __LITTLE_ENDIAN__
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sth 7,0(3)
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#else
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sth 6,0(3)
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#endif
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b 7f
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.align 4
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3:
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#ifdef __LITTLE_ENDIAN__
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rotlwi 6,6,24
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stb 6,0(3)
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sth 7,1(3)
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#else
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stb 7,0(3)
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sth 6,1(3)
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#endif
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b 7f
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.align 4
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5:
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#ifdef __LITTLE_ENDIAN__
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rotlwi 6,6,8
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#endif
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stb 6,0(3)
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7:
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cmpldi cr1,10,16
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add 3,3,0
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mtcrf 0x01,10
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.align 4
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.L3:
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/* At least 6 bytes left and the source is word aligned. */
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blt cr1,8f
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16: /* Move 16 bytes. */
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lwz 6,0(12)
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lwz 7,4(12)
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stw 6,0(3)
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lwz 6,8(12)
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stw 7,4(3)
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lwz 7,12(12)
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addi 12,12,16
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stw 6,8(3)
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stw 7,12(3)
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addi 3,3,16
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8: /* Move 8 bytes. */
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bf 28,4f
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lwz 6,0(12)
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lwz 7,4(12)
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addi 12,12,8
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stw 6,0(3)
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stw 7,4(3)
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addi 3,3,8
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4: /* Move 4 bytes. */
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bf 29,2f
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lwz 6,0(12)
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addi 12,12,4
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stw 6,0(3)
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addi 3,3,4
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2: /* Move 2-3 bytes. */
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bf 30,1f
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lhz 6,0(12)
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sth 6,0(3)
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bf 31,0f
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lbz 7,2(12)
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stb 7,2(3)
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ld 3,-16(1)
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blr
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1: /* Move 1 byte. */
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bf 31,0f
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lbz 6,0(12)
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stb 6,0(3)
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0:
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/* Return original dst pointer. */
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ld 3,-16(1)
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blr
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/* Special case to copy 0-8 bytes. */
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.align 4
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.LE8:
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mr 12,4
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bne cr6,4f
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/* Would have liked to use use ld/std here but the 630 processors are
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slow for load/store doubles that are not at least word aligned.
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Unaligned Load/Store word execute with only a 1 cycle penalty. */
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lwz 6,0(4)
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lwz 7,4(4)
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stw 6,0(3)
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stw 7,4(3)
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/* Return original dst pointer. */
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ld 3,-16(1)
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blr
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.align 4
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4: bf 29,2b
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lwz 6,0(4)
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stw 6,0(3)
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6:
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bf 30,5f
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lhz 7,4(4)
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sth 7,4(3)
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bf 31,0f
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lbz 8,6(4)
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stb 8,6(3)
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ld 3,-16(1)
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blr
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.align 4
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5:
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bf 31,0f
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lbz 6,4(4)
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stb 6,4(3)
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.align 4
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0:
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/* Return original dst pointer. */
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ld 3,-16(1)
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blr
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.align 4
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.L6:
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/* Copy doublewords where the destination is aligned but the source is
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not. Use aligned doubleword loads from the source, shifted to realign
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the data, to allow aligned destination stores. */
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subf 5,10,12
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andi. 0,9,1
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cmpldi cr6,11,0
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sldi 10,10,3
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mr 11,9
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mr 4,3
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ld 6,0(5)
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ld 7,8(5)
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subfic 9,10,64
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beq 2f
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#ifdef __LITTLE_ENDIAN__
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srd 0,6,10
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#else
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sld 0,6,10
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#endif
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cmpldi 11,1
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mr 6,7
|
|
addi 4,4,-8
|
|
addi 11,11,-1
|
|
b 1f
|
|
2: addi 5,5,8
|
|
.align 4
|
|
#ifdef __LITTLE_ENDIAN__
|
|
0: srd 0,6,10
|
|
sld 8,7,9
|
|
#else
|
|
0: sld 0,6,10
|
|
srd 8,7,9
|
|
#endif
|
|
cmpldi 11,2
|
|
ld 6,8(5)
|
|
or 0,0,8
|
|
addi 11,11,-2
|
|
std 0,0(4)
|
|
#ifdef __LITTLE_ENDIAN__
|
|
srd 0,7,10
|
|
1: sld 8,6,9
|
|
#else
|
|
sld 0,7,10
|
|
1: srd 8,6,9
|
|
#endif
|
|
or 0,0,8
|
|
beq 8f
|
|
ld 7,16(5)
|
|
std 0,8(4)
|
|
addi 5,5,16
|
|
addi 4,4,16
|
|
b 0b
|
|
.align 4
|
|
8:
|
|
std 0,8(4)
|
|
rldicr 0,31,0,60
|
|
mtcrf 0x01,31
|
|
bne cr6,.L9 /* If the tail is 0 bytes we are done! */
|
|
/* Return original dst pointer. */
|
|
ld 31,-8(1)
|
|
ld 3,-16(1)
|
|
blr
|
|
END_GEN_TB (MEMCPY,TB_TOCLESS)
|
|
libc_hidden_builtin_def (memcpy)
|