mirror of
https://sourceware.org/git/glibc.git
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bb803bff5c
2004-12-29 Jakub Jelinek <jakub@redhat.com> * sysdeps/ia64/fpu/libm_support.h (__libm_error_support): Use libc_hidden_proto instead of HIDDEN_PROTO. * sysdeps/ia64/fpu/libm-symbols.h (HIDDEN_PROTO): Remove. (__libm_error_support): If ASSEMBLER and in libc, define to HIDDEN_JUMPTARGET(__libm_error_support). 2004-12-28 David Mosberger <davidm@hpl.hp.com> * sysdeps/ia64/fpu/Makefile (duplicated-routines): New macro. (sysdep_routines): Replace libm_ldexp{,f,l} and libm_scalbn{,f,l} with $(duplicated-routines). (libm-sysdep_routines): Likewise, but substitute "s_" prefix for "m_" prefix. 2004-12-27 David Mosberger <davidm@hpl.hp.com> * sysdeps/ia64/fpu/libm-symbols.h: Add include of <sysdep.h> and undefine "ret" macro. Add __libm_error_support hidden definitions. * sysdeps/ia64/fpu/e_lgamma_r.c: Remove CVS-id comment. Add missing portion of copyright statement. * sysdeps/ia64/fpu/e_lgammaf_r.c: Likewise. * sysdeps/ia64/fpu/e_lgammal_r.c: Likewise. * sysdeps/ia64/fpu/w_lgamma.c: Remove CVS-id comment. Add missing portion of copyright statement. (__ieee754_lgamma): Rename from lgamma(). Make lgamma() a weak alias. (__ieee754_gamma): Likewise. * sysdeps/ia64/fpu/w_lgammaf.c: Likewise. * sysdeps/ia64/fpu/w_lgammal.c: Likewise. 2004-12-09 H. J. Lu <hjl@lucon.org> * sysdeps/ia64/fpu/s_nextafterl.c: Remove. * sysdeps/ia64/fpu/s_nexttoward.c: Likewise. * sysdeps/ia64/fpu/s_nexttowardf.c: Likewise. * sysdeps/ia64/fpu/e_atan2l.S: Remove (duplicate of e_atan2l.c). * sysdeps/ia64/fpu/e_expl.S: Likewise. * sysdeps/ia64/fpu/e_logl.c: Remove (conflicts with e_logl.S). 2004-11-18 David Mosberger <davidm@hpl.hp.com> * sysdeps/ia64/fpu/README: New file. * sysdeps/ia64/fpu/gen_import_file_list: New file. * sysdeps/ia64/fpu/import_check: Likewise. * sysdeps/ia64/fpu/import_diffs: Likewise. * sysdeps/ia64/fpu/import_file.awk: Likewise. * sysdeps/ia64/fpu/import_intel_libm: Likewise. * sysdeps/ia64/fpu/libm-symbols.h: Likewise. * sysdeps/ia64/fpu/e_acos.S: Update from Intel libm v2.1+. * sysdeps/ia64/fpu/e_acosf.S: Likewise. * sysdeps/ia64/fpu/e_acosl.S: Likewise. * sysdeps/ia64/fpu/e_asin.S: Likewise. * sysdeps/ia64/fpu/e_asinf.S: Likewise. * sysdeps/ia64/fpu/e_asinl.S: Likewise. * sysdeps/ia64/fpu/e_atan2.S: Likewise. * sysdeps/ia64/fpu/e_atan2f.S: Likewise. * sysdeps/ia64/fpu/e_cosh.S: Likewise. * sysdeps/ia64/fpu/e_coshf.S: Likewise. * sysdeps/ia64/fpu/e_coshl.S: Likewise. * sysdeps/ia64/fpu/e_exp.S: Likewise. * sysdeps/ia64/fpu/e_expf.S: Likewise. * sysdeps/ia64/fpu/e_fmod.S: Likewise. * sysdeps/ia64/fpu/e_fmodf.S: Likewise. * sysdeps/ia64/fpu/e_fmodl.S: Likewise. * sysdeps/ia64/fpu/e_hypot.S: Likewise. * sysdeps/ia64/fpu/e_hypotf.S: Likewise. * sysdeps/ia64/fpu/e_hypotl.S: Likewise. * sysdeps/ia64/fpu/e_log.S: Likewise. * sysdeps/ia64/fpu/e_log2.S: Likewise. * sysdeps/ia64/fpu/e_log2f.S: Likewise. * sysdeps/ia64/fpu/e_log2l.S: Likewise. * sysdeps/ia64/fpu/e_logf.S: Likewise. * sysdeps/ia64/fpu/e_pow.S: Likewise. * sysdeps/ia64/fpu/e_powf.S: Likewise. * sysdeps/ia64/fpu/e_powl.S: Likewise. * sysdeps/ia64/fpu/e_remainder.S: Likewise. * sysdeps/ia64/fpu/e_remainderf.S: Likewise. * sysdeps/ia64/fpu/e_remainderl.S: Likewise. * sysdeps/ia64/fpu/e_scalb.S: Likewise. * sysdeps/ia64/fpu/e_scalbf.S: Likewise. * sysdeps/ia64/fpu/e_scalbl.S: Likewise. * sysdeps/ia64/fpu/e_sinh.S: Likewise. * sysdeps/ia64/fpu/e_sinhf.S: Likewise. * sysdeps/ia64/fpu/e_sinhl.S: Likewise. * sysdeps/ia64/fpu/e_sqrt.S: Likewise. * sysdeps/ia64/fpu/e_sqrtf.S: Likewise. * sysdeps/ia64/fpu/e_sqrtl.S: Likewise. * sysdeps/ia64/fpu/libm_error.c: Likewise. * sysdeps/ia64/fpu/libm_reduce.c: Likewise. * sysdeps/ia64/fpu/libm_support.h: Likewise. * sysdeps/ia64/fpu/s_atan.S: Likewise. * sysdeps/ia64/fpu/s_atanf.S: Likewise. * sysdeps/ia64/fpu/s_atanl.S: Likewise. * sysdeps/ia64/fpu/s_cbrt.S: Likewise. * sysdeps/ia64/fpu/s_cbrtf.S: Likewise. * sysdeps/ia64/fpu/s_cbrtl.S: Likewise. * sysdeps/ia64/fpu/s_ceil.S: Likewise. * sysdeps/ia64/fpu/s_ceilf.S: Likewise. * sysdeps/ia64/fpu/s_ceill.S: Likewise. * sysdeps/ia64/fpu/s_cos.S: Likewise. * sysdeps/ia64/fpu/s_cosf.S: Likewise. * sysdeps/ia64/fpu/s_cosl.S: Likewise. * sysdeps/ia64/fpu/s_expm1.S: Likewise. * sysdeps/ia64/fpu/s_expm1f.S: Likewise. * sysdeps/ia64/fpu/s_expm1l.S: Likewise. * sysdeps/ia64/fpu/s_fabs.S: Likewise. * sysdeps/ia64/fpu/s_fabsf.S: Likewise. * sysdeps/ia64/fpu/s_fabsl.S: Likewise. * sysdeps/ia64/fpu/s_floor.S: Likewise. * sysdeps/ia64/fpu/s_floorf.S: Likewise. * sysdeps/ia64/fpu/s_floorl.S: Likewise. * sysdeps/ia64/fpu/s_frexp.c: Likewise. * sysdeps/ia64/fpu/s_frexpf.c: Likewise. * sysdeps/ia64/fpu/s_frexpl.c: Likewise. * sysdeps/ia64/fpu/s_ilogb.S: Likewise. * sysdeps/ia64/fpu/s_ilogbf.S: Likewise. * sysdeps/ia64/fpu/s_ilogbl.S: Likewise. * sysdeps/ia64/fpu/s_log1p.S: Likewise. * sysdeps/ia64/fpu/s_log1pf.S: Likewise. * sysdeps/ia64/fpu/s_log1pl.S: Likewise. * sysdeps/ia64/fpu/s_logb.S: Likewise. * sysdeps/ia64/fpu/s_logbf.S: Likewise. * sysdeps/ia64/fpu/s_logbl.S: Likewise. * sysdeps/ia64/fpu/s_modf.S: Likewise. * sysdeps/ia64/fpu/s_modff.S: Likewise. * sysdeps/ia64/fpu/s_modfl.S: Likewise. * sysdeps/ia64/fpu/s_nearbyint.S: Likewise. * sysdeps/ia64/fpu/s_nearbyintf.S: Likewise. * sysdeps/ia64/fpu/s_nearbyintl.S: Likewise. * sysdeps/ia64/fpu/s_rint.S: Likewise. * sysdeps/ia64/fpu/s_rintf.S: Likewise. * sysdeps/ia64/fpu/s_rintl.S: Likewise. * sysdeps/ia64/fpu/s_round.S: Likewise. * sysdeps/ia64/fpu/s_roundf.S: Likewise. * sysdeps/ia64/fpu/s_roundl.S: Likewise. * sysdeps/ia64/fpu/s_significand.S: Likewise. * sysdeps/ia64/fpu/s_significandf.S: Likewise. * sysdeps/ia64/fpu/s_significandl.S: Likewise. * sysdeps/ia64/fpu/s_tan.S: Likewise. * sysdeps/ia64/fpu/s_tanf.S: Likewise. * sysdeps/ia64/fpu/s_tanl.S: Likewise. * sysdeps/ia64/fpu/s_trunc.S: Likewise. * sysdeps/ia64/fpu/s_truncf.S: Likewise. * sysdeps/ia64/fpu/s_truncl.S: Likewise. * sysdeps/ia64/fpu/e_acosh.S: New file from Intel libm v2.1+. * sysdeps/ia64/fpu/e_acoshf.S: Likewise. * sysdeps/ia64/fpu/e_acoshl.S: Likewise. * sysdeps/ia64/fpu/e_atanh.S: Likewise. * sysdeps/ia64/fpu/e_atanhf.S: Likewise. * sysdeps/ia64/fpu/e_atanhl.S: Likewise. * sysdeps/ia64/fpu/e_exp10.S: Likewise. * sysdeps/ia64/fpu/e_exp10f.S: Likewise. * sysdeps/ia64/fpu/e_exp10l.S: Likewise. * sysdeps/ia64/fpu/e_exp2.S: Likewise. * sysdeps/ia64/fpu/e_exp2f.S: Likewise. * sysdeps/ia64/fpu/e_exp2l.S: Likewise. * sysdeps/ia64/fpu/e_lgamma_r.S: Likewise. * sysdeps/ia64/fpu/e_lgammaf_r.S: Likewise. * sysdeps/ia64/fpu/e_lgammal_r.S: Likewise. * sysdeps/ia64/fpu/e_logl.S: Likewise. * sysdeps/ia64/fpu/libm_frexp.S: Likewise. * sysdeps/ia64/fpu/libm_frexpf.S: Likewise. * sysdeps/ia64/fpu/libm_frexpl.S: Likewise. * sysdeps/ia64/fpu/s_libm_ldexp.S: Likewise. * sysdeps/ia64/fpu/s_libm_ldexpf.S: Likewise. * sysdeps/ia64/fpu/s_libm_ldexpl.S: Likewise. * sysdeps/ia64/fpu/s_libm_scalbn.S: Likewise. * sysdeps/ia64/fpu/s_libm_scalbnf.S: Likewise. * sysdeps/ia64/fpu/s_libm_scalbnl.S: Likewise. * sysdeps/ia64/fpu/libm_lgamma.S: Likewise. * sysdeps/ia64/fpu/libm_lgammaf.S: Likewise. * sysdeps/ia64/fpu/libm_lgammal.S: Likewise. * sysdeps/ia64/fpu/libm_sincos.S: Likewise. * sysdeps/ia64/fpu/libm_sincos_large.S: Likewise. * sysdeps/ia64/fpu/libm_sincosf.S: Likewise. * sysdeps/ia64/fpu/libm_sincosl.S: Likewise. * sysdeps/ia64/fpu/libm_scalblnf.S: Likewise. * sysdeps/ia64/fpu/s_asinh.S: Likewise. * sysdeps/ia64/fpu/s_asinhf.S: Likewise. * sysdeps/ia64/fpu/s_asinhl.S: Likewise. * sysdeps/ia64/fpu/s_erf.S: Likewise. * sysdeps/ia64/fpu/s_erfc.S: Likewise. * sysdeps/ia64/fpu/s_erfcf.S: Likewise. * sysdeps/ia64/fpu/s_erfcl.S: Likewise. * sysdeps/ia64/fpu/s_erff.S: Likewise. * sysdeps/ia64/fpu/s_erfl.S: Likewise. * sysdeps/ia64/fpu/s_fdim.S: Likewise. * sysdeps/ia64/fpu/s_fdimf.S: Likewise. * sysdeps/ia64/fpu/s_fdiml.S: Likewise. * sysdeps/ia64/fpu/s_fma.S: Likewise. * sysdeps/ia64/fpu/s_fmaf.S: Likewise. * sysdeps/ia64/fpu/s_fmal.S: Likewise. * sysdeps/ia64/fpu/s_fmax.S: Likewise. * sysdeps/ia64/fpu/s_fmaxf.S: Likewise. * sysdeps/ia64/fpu/s_fmaxl.S: Likewise. * sysdeps/ia64/fpu/s_ldexp.c: Likewise. * sysdeps/ia64/fpu/s_ldexpf.c: Likewise. * sysdeps/ia64/fpu/s_ldexpl.c: Likewise. * sysdeps/ia64/fpu/s_nextafter.S: Likewise. * sysdeps/ia64/fpu/s_nextafterf.S: Likewise. * sysdeps/ia64/fpu/s_nextafterl.S: Likewise. * sysdeps/ia64/fpu/s_nexttoward.S: Likewise. * sysdeps/ia64/fpu/s_nexttowardf.S: Likewise. * sysdeps/ia64/fpu/s_nexttowardl.S: Likewise. * sysdeps/ia64/fpu/s_tanh.S: Likewise. * sysdeps/ia64/fpu/s_tanhf.S: Likewise. * sysdeps/ia64/fpu/s_tanhl.S: Likewise. * sysdeps/ia64/fpu/s_scalblnf.c: Likewise. * sysdeps/ia64/fpu/w_lgamma.c: Likewise. * sysdeps/ia64/fpu/w_lgammaf.c: Likewise. * sysdeps/ia64/fpu/w_lgammal.c: Likewise. * sysdeps/ia64/fpu/w_tgamma.S: Likewise. * sysdeps/ia64/fpu/w_tgammaf.S: Likewise. * sysdeps/ia64/fpu/w_tgammal.S: Likewise. * sysdeps/ia64/fpu/e_gamma_r.c: New empty dummy-file. * sysdeps/ia64/fpu/e_gammaf_r.c: Likewise. * sysdeps/ia64/fpu/e_gammal_r.c: Likewise. * sysdeps/ia64/fpu/w_acosh.c: Likewise. * sysdeps/ia64/fpu/w_acoshf.c: Likewise. * sysdeps/ia64/fpu/w_acoshl.c: Likewise. * sysdeps/ia64/fpu/w_atanh.c: Likewise. * sysdeps/ia64/fpu/w_atanhf.c: Likewise. * sysdeps/ia64/fpu/w_atanhl.c: Likewise. * sysdeps/ia64/fpu/w_exp10.c: Likewise. * sysdeps/ia64/fpu/w_exp10f.c: Likewise. * sysdeps/ia64/fpu/w_exp10l.c: Likewise. * sysdeps/ia64/fpu/w_exp2.c: Likewise. * sysdeps/ia64/fpu/w_exp2f.c: Likewise. * sysdeps/ia64/fpu/w_exp2l.c: Likewise. * sysdeps/ia64/fpu/w_expl.c: Likewise. * sysdeps/ia64/fpu/e_expl.S: Likewise. * sysdeps/ia64/fpu/w_lgamma_r.c: Likewise. * sysdeps/ia64/fpu/w_lgammaf_r.c: Likewise. * sysdeps/ia64/fpu/w_lgammal_r.c: Likewise. * sysdeps/ia64/fpu/w_log2.c: Likewise. * sysdeps/ia64/fpu/w_log2f.c: Likewise. * sysdeps/ia64/fpu/w_log2l.c: Likewise. * sysdeps/ia64/fpu/w_sinh.c: Likewise. * sysdeps/ia64/fpu/w_sinhf.c: Likewise. * sysdeps/ia64/fpu/w_sinhl.c: Likewise. * sysdeps/ia64/fpu/libm_atan2_reg.S: Remove. * sysdeps/ia64/fpu/s_ldexp.S: Likewise. * sysdeps/ia64/fpu/s_ldexpf.S: Likewise. * sysdeps/ia64/fpu/s_ldexpl.S: Likewise. * sysdeps/ia64/fpu/s_scalbn.S: Likewise. * sysdeps/ia64/fpu/s_scalbnf.S: Likewise. * sysdeps/ia64/fpu/s_scalbnl.S: Likewise. * sysdeps/ia64/fpu/s_sincos.c: Make it an empty dummy-file. * sysdeps/ia64/fpu/s_sincosf.c: Likewise. * sysdeps/ia64/fpu/s_sincosl.c: Likewise. * sysdeps/ia64/fpu/e_atan2l.S: Add "Not needed" comment. * sysdeps/ia64/fpu/s_copysign.S: Add __libm_copysign{,f,l} alias for use by libm_error.c * sysdeps/ia64/fpu/Makefile (libm-sysdep_routines): Remove libm_atan2_reg, libm_tan, libm_frexp4{f,l}. Mention s_erfc{,f,l}, libm_frexp{,f,l}, libm_ldexp{,f,l}, libm_sincos{,f,l}, libm_sincos_large, libm_lgamma{,f,l}, libm_scalbn{,f,l}, libm_scalblnf. (sysdep_routines): Remove libm_frexp4{,f,l}. Mention libm_frexp{,f,l}, libm_ldexp{,f,l}, and libm_scalbn{,f,l}. (sysdep-CPPFLAGS): Add -include libm-symbols.h, -D__POSIX__, _D_LIB_VERSIONIMF=_LIB_VERSION, -DSIZE_LONG_INT_64, and -DSIZE_LONG_LONG_INT_64.
590 lines
12 KiB
ArmAsm
590 lines
12 KiB
ArmAsm
.file "remainder.s"
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// Copyright (c) 2000 - 2003, Intel Corporation
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// All rights reserved.
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//
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// Contributed 2000 by the Intel Numerics Group, Intel Corporation
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//
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// Redistribution and use in source and binary forms, with or without
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// modification, are permitted provided that the following conditions are
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// met:
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//
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// * Redistributions of source code must retain the above copyright
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// notice, this list of conditions and the following disclaimer.
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//
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// * Redistributions in binary form must reproduce the above copyright
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// notice, this list of conditions and the following disclaimer in the
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// documentation and/or other materials provided with the distribution.
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//
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// * The name of Intel Corporation may not be used to endorse or promote
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// products derived from this software without specific prior written
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// permission.
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// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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// "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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// LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
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// A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL INTEL OR ITS
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// CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
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// EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
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// PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR
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// PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY
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// OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY OR TORT (INCLUDING
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// NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
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// SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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//
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// Intel Corporation is the author of this code, and requests that all
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// problem reports or change requests be submitted to it directly at
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// http://www.intel.com/software/products/opensource/libraries/num.htm.
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//
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// History
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//====================================================================
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// 02/02/00 Initial version
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// 03/02/00 New Algorithm
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// 04/04/00 Unwind support added
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// 07/21/00 Fixed quotient=2^{24*m+23}*1.q1...q23 1 bug
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// 08/15/00 Bundle added after call to __libm_error_support to properly
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// set [the previously overwritten] GR_Parameter_RESULT.
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// 11/29/00 Set FR_Y to f9
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// 05/20/02 Cleaned up namespace and sf0 syntax
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// 02/10/03 Reordered header: .section, .global, .proc, .align
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//
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// API
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//====================================================================
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// double remainder(double,double);
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//
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// Overview of operation
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//====================================================================
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// remainder(a,b)=a-i*b,
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// where i is an integer such that, if b!=0 and a is finite,
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// |a/b-i|<=1/2. If |a/b-i|=1/2, i is even.
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//
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// Algorithm
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//====================================================================
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// a). eliminate special cases
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// b). if |a/b|<0.25 (first quotient estimate), return a
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// c). use single precision divide algorithm to get quotient q
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// rounded to 24 bits of precision
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// d). calculate partial remainders (using both q and q-ulp);
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// select one and RZ(a/b) based on the sign of |a|-|b|*q
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// e). if the exponent difference (exponent(a)-exponent(b))
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// is less than 24 (quotient estimate<2^{24}-2), use RZ(a/b)
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// and sticky bits to round to integer; exit loop and
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// calculate final remainder
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// f). if exponent(a)-exponent(b)>=24, select new value of a as
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// the partial remainder calculated using RZ(a/b);
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// repeat from c).
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//
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// Special cases
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//====================================================================
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// a=+/- Inf, or b=+/-0: return NaN, call libm_error_support
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// a=NaN or b=NaN: return NaN
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// Registers used
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//====================================================================
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// Predicate registers: p6-p14
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// General registers: r2,r3,r28,r29,r32 (ar.pfs), r33-r39
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// Floating point registers: f6-f15,f32
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GR_SAVE_B0 = r33
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GR_SAVE_PFS = r34
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GR_SAVE_GP = r35
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GR_SAVE_SP = r36
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GR_Parameter_X = r37
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GR_Parameter_Y = r38
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GR_Parameter_RESULT = r39
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GR_Parameter_TAG = r40
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FR_X = f10
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FR_Y = f9
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FR_RESULT = f8
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.section .text
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GLOBAL_IEEE754_ENTRY(remainder)
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// inputs in f8, f9
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// result in f8
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{ .mfi
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alloc r32=ar.pfs,1,4,4,0
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// f13=|a|
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fmerge.s f13=f0,f8
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nop.i 0
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}
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{.mfi
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nop.m 0
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// f14=|b|
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fmerge.s f14=f0,f9
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nop.i 0;;
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}
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{.mlx
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mov r28=0x2ffdd
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// r2=2^{23}
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movl r3=0x4b000000;;
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}
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// Y +-NAN, +-inf, +-0? p11
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{ .mfi
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setf.exp f32=r28
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fclass.m.unc p11,p0 = f9, 0xe7
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nop.i 999
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}
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// qnan snan inf norm unorm 0 -+
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// 1 1 1 0 0 0 11
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// e 3
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// X +-NAN, +-inf, ? p9
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{ .mfi
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nop.m 999
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fclass.m.unc p9,p0 = f8, 0xe3
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nop.i 999;;
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}
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{.mfi
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nop.m 0
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mov f12=f0
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nop.i 0
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}
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{ .mfi
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// set p7=1
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cmp.eq.unc p7,p0=r0,r0
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// Step (1)
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// y0 = 1 / b in f10
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frcpa.s1 f10,p6=f13,f14
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nop.i 0;;
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}
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{.bbb
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(p9) br.cond.spnt FREM_X_NAN_INF
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(p11) br.cond.spnt FREM_Y_NAN_INF_ZERO
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nop.b 0
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} {.mfi
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nop.m 0
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// set D flag if a (f8) is denormal
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fnma.s0 f6=f8,f1,f8
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nop.i 0;;
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}
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remloop24:
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{ .mfi
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nop.m 0
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// Step (2)
|
|
// q0 = a * y0 in f12
|
|
(p6) fma.s1 f12=f13,f10,f0
|
|
nop.i 0
|
|
} { .mfi
|
|
nop.m 0
|
|
// Step (3)
|
|
// e0 = 1 - b * y0 in f7
|
|
(p6) fnma.s1 f7=f14,f10,f1
|
|
nop.i 0;;
|
|
} {.mlx
|
|
nop.m 0
|
|
// r2=1.25*2^{-24}
|
|
movl r2=0x33a00000;;
|
|
}
|
|
|
|
{.mfi
|
|
nop.m 0
|
|
// q1=q0*(1+e0)
|
|
(p6) fma.s1 f15=f12,f7,f12
|
|
nop.i 0
|
|
}
|
|
{ .mfi
|
|
nop.m 0
|
|
// Step (4)
|
|
// e1 = e0 * e0 + E in f7
|
|
(p6) fma.s1 f7=f7,f7,f32
|
|
nop.i 0;;
|
|
}
|
|
{.mii
|
|
(p7) getf.exp r29=f12
|
|
(p7) mov r28=0xfffd
|
|
nop.i 0;;
|
|
}
|
|
{ .mfi
|
|
// f12=2^{23}
|
|
setf.s f12=r3
|
|
// Step (5)
|
|
// q2 = q1 + e1 * q1 in f11
|
|
(p6) fma.s.s1 f11=f7,f15,f15
|
|
nop.i 0
|
|
} { .mfi
|
|
nop.m 0
|
|
// Step (6)
|
|
// q2 = q1 + e1 * q1 in f6
|
|
(p6) fma.s1 f6=f7,f15,f15
|
|
nop.i 0;;
|
|
}
|
|
|
|
{.mmi
|
|
// f15=1.25*2^{-24}
|
|
setf.s f15=r2
|
|
// q<1/4 ? (i.e. expon< -2)
|
|
(p7) cmp.gt p7,p0=r28,r29
|
|
nop.i 0;;
|
|
}
|
|
|
|
{.mfb
|
|
// r29= -32+bias
|
|
mov r29=0xffdf
|
|
// if |a/b|<1/4, set D flag before returning
|
|
(p7) fma.d.s0 f9=f9,f0,f8
|
|
nop.b 0;;
|
|
}
|
|
{.mfb
|
|
nop.m 0
|
|
// can be combined with bundle above if sign of 0 or
|
|
// FTZ enabled are not important
|
|
(p7) fmerge.s f8=f8,f9
|
|
// return if |a|<4*|b| (estimated quotient < 1/4)
|
|
(p7) br.ret.spnt b0;;
|
|
}
|
|
{.mfi
|
|
// f7=2^{-32}
|
|
setf.exp f7=r29
|
|
// set f8 to current a value | sign
|
|
fmerge.s f8=f8,f13
|
|
nop.i 0;;
|
|
}
|
|
|
|
|
|
{.mfi
|
|
getf.exp r28=f6
|
|
// last step ? (q<2^{23})
|
|
fcmp.lt.unc.s1 p0,p12=f6,f12
|
|
nop.i 0;;
|
|
}
|
|
{.mfi
|
|
nop.m 0
|
|
// r=a-b*q
|
|
fnma.s1 f6=f14,f11,f13
|
|
nop.i 0
|
|
} {.mfi
|
|
// r2=23+bias
|
|
mov r2=0xffff+23
|
|
// q'=q-q*(1.25*2^{-24}) (q'=q-ulp)
|
|
fnma.s.s1 f15=f11,f15,f11
|
|
nop.i 0;;
|
|
}
|
|
{.mmi
|
|
nop.m 0
|
|
cmp.eq p11,p14=r2,r28
|
|
nop.i 0;;
|
|
}
|
|
|
|
.pred.rel "mutex",p11,p14
|
|
{.mfi
|
|
nop.m 0
|
|
// if exp_q=2^23, then r=a-b*2^{23}
|
|
(p11) fnma.s1 f13=f12,f14,f13
|
|
nop.i 0
|
|
}
|
|
{.mfi
|
|
nop.m 0
|
|
// r2=a-b*q'
|
|
(p14) fnma.s1 f13=f14,f15,f13
|
|
nop.i 0;;
|
|
}
|
|
{.mfi
|
|
nop.m 0
|
|
// r>0 iff q=RZ(a/b) and inexact
|
|
fcmp.gt.unc.s1 p8,p0=f6,f0
|
|
nop.i 0
|
|
} {.mfi
|
|
nop.m 0
|
|
// r<0 iff q'=RZ(a/b) and inexact
|
|
(p14) fcmp.lt.unc.s1 p9,p10=f6,f0
|
|
nop.i 0;;
|
|
}
|
|
|
|
.pred.rel "mutex",p8,p9
|
|
{.mfi
|
|
nop.m 0
|
|
// (p8) Q=q+(last iteration ? sticky bits:0)
|
|
// i.e. Q=q+q*x (x=2^{-32} or 0)
|
|
(p8) fma.s1 f11=f11,f7,f11
|
|
nop.i 0
|
|
} {.mfi
|
|
nop.m 0
|
|
// (p9) Q=q'+(last iteration ? sticky bits:0)
|
|
// i.e. Q=q'+q'*x (x=2^{-32} or 0)
|
|
(p9) fma.s1 f11=f15,f7,f15
|
|
nop.i 0;;
|
|
}
|
|
|
|
{.mfb
|
|
nop.m 0
|
|
// (p9) set r=r2 (new a, if not last iteration)
|
|
// (p10) new a =r
|
|
(p10) mov f13=f6
|
|
(p12) br.cond.sptk remloop24;;
|
|
}
|
|
|
|
// last iteration
|
|
{.mfi
|
|
nop.m 0
|
|
// set f9=|b|*sgn(a)
|
|
fmerge.s f9=f8,f9
|
|
nop.i 0
|
|
}
|
|
{.mfi
|
|
nop.m 0
|
|
// round to integer
|
|
fcvt.fx.s1 f11=f11
|
|
nop.i 0;;
|
|
}
|
|
{.mfi
|
|
nop.m 0
|
|
// save sign of a
|
|
fmerge.s f7=f8,f8
|
|
nop.i 0
|
|
} {.mfi
|
|
nop.m 0
|
|
// normalize
|
|
fcvt.xf f11=f11
|
|
nop.i 0;;
|
|
}
|
|
{.mfi
|
|
nop.m 0
|
|
// This can be removed if sign of 0 is not important
|
|
// get remainder using sf1
|
|
fnma.d.s1 f12=f9,f11,f8
|
|
nop.i 0
|
|
}
|
|
{.mfi
|
|
nop.m 0
|
|
// get remainder
|
|
fnma.d.s0 f8=f9,f11,f8
|
|
nop.i 0;;
|
|
}
|
|
{.mfi
|
|
nop.m 0
|
|
// f12=0?
|
|
// This can be removed if sign of 0 is not important
|
|
fcmp.eq.unc.s1 p8,p0=f12,f0
|
|
nop.i 0;;
|
|
}
|
|
{.mfb
|
|
nop.m 0
|
|
// if f8=0, set sign correctly
|
|
// This can be removed if sign of 0 is not important
|
|
(p8) fmerge.s f8=f7,f8
|
|
// return
|
|
br.ret.sptk b0;;
|
|
}
|
|
|
|
|
|
FREM_X_NAN_INF:
|
|
|
|
// Y zero ?
|
|
{.mfi
|
|
nop.m 0
|
|
fma.s1 f10=f9,f1,f0
|
|
nop.i 0;;
|
|
}
|
|
{.mfi
|
|
nop.m 0
|
|
fcmp.eq.unc.s1 p11,p0=f10,f0
|
|
nop.i 0;;
|
|
}
|
|
{.mib
|
|
nop.m 0
|
|
nop.i 0
|
|
// if Y zero
|
|
(p11) br.cond.spnt FREM_Y_ZERO;;
|
|
}
|
|
|
|
// X infinity? Return QNAN indefinite
|
|
{ .mfi
|
|
nop.m 999
|
|
fclass.m.unc p8,p0 = f8, 0x23
|
|
nop.i 999
|
|
}
|
|
// X infinity? Return QNAN indefinite
|
|
{ .mfi
|
|
nop.m 999
|
|
fclass.m.unc p11,p0 = f8, 0x23
|
|
nop.i 999;;
|
|
}
|
|
// Y NaN ?
|
|
{.mfi
|
|
nop.m 999
|
|
(p8) fclass.m.unc p0,p8=f9,0xc3
|
|
nop.i 0;;
|
|
}
|
|
{.mfi
|
|
nop.m 999
|
|
// also set Denormal flag if necessary
|
|
(p8) fma.s0 f9=f9,f1,f0
|
|
nop.i 0
|
|
}
|
|
{ .mfi
|
|
nop.m 999
|
|
(p8) frcpa.s0 f8,p7 = f8,f8
|
|
nop.i 999 ;;
|
|
}
|
|
|
|
{.mfi
|
|
nop.m 999
|
|
(p11) mov f10=f8
|
|
nop.i 0
|
|
}
|
|
{ .mfi
|
|
nop.m 999
|
|
(p8) fma.d.s0 f8=f8,f1,f0
|
|
nop.i 0 ;;
|
|
}
|
|
|
|
{ .mfb
|
|
nop.m 999
|
|
frcpa.s0 f8,p7=f8,f9
|
|
(p11) br.cond.spnt EXP_ERROR_RETURN;;
|
|
}
|
|
{ .mib
|
|
nop.m 0
|
|
nop.i 0
|
|
br.ret.spnt b0 ;;
|
|
}
|
|
|
|
|
|
FREM_Y_NAN_INF_ZERO:
|
|
|
|
// Y INF
|
|
{ .mfi
|
|
nop.m 999
|
|
fclass.m.unc p7,p0 = f9, 0x23
|
|
nop.i 999 ;;
|
|
}
|
|
|
|
{ .mfb
|
|
nop.m 999
|
|
(p7) fma.d.s0 f8=f8,f1,f0
|
|
(p7) br.ret.spnt b0 ;;
|
|
}
|
|
|
|
// Y NAN?
|
|
{ .mfi
|
|
nop.m 999
|
|
fclass.m.unc p9,p0 = f9, 0xc3
|
|
nop.i 999 ;;
|
|
}
|
|
|
|
{ .mfb
|
|
nop.m 999
|
|
(p9) fma.d.s0 f8=f9,f1,f0
|
|
(p9) br.ret.spnt b0 ;;
|
|
}
|
|
|
|
FREM_Y_ZERO:
|
|
// Y zero? Must be zero at this point
|
|
// because it is the only choice left.
|
|
// Return QNAN indefinite
|
|
|
|
// X NAN?
|
|
{ .mfi
|
|
nop.m 999
|
|
fclass.m.unc p9,p10 = f8, 0xc3
|
|
nop.i 999 ;;
|
|
}
|
|
{ .mfi
|
|
nop.m 999
|
|
(p10) fclass.nm p9,p10 = f8, 0xff
|
|
nop.i 999 ;;
|
|
}
|
|
|
|
{.mfi
|
|
nop.m 999
|
|
(p9) frcpa.s0 f11,p7=f8,f0
|
|
nop.i 0;;
|
|
}
|
|
|
|
{ .mfi
|
|
nop.m 999
|
|
(p10) frcpa.s0 f11,p7 = f0,f0
|
|
nop.i 999;;
|
|
}
|
|
|
|
{ .mfi
|
|
nop.m 999
|
|
fmerge.s f10 = f8, f8
|
|
nop.i 999
|
|
}
|
|
|
|
{ .mfi
|
|
nop.m 999
|
|
fma.d.s0 f8=f11,f1,f0
|
|
nop.i 999
|
|
}
|
|
|
|
|
|
EXP_ERROR_RETURN:
|
|
|
|
{ .mib
|
|
mov GR_Parameter_TAG = 124
|
|
nop.i 999
|
|
br.sptk __libm_error_region;;
|
|
}
|
|
|
|
GLOBAL_IEEE754_END(remainder)
|
|
|
|
|
|
LOCAL_LIBM_ENTRY(__libm_error_region)
|
|
.prologue
|
|
{ .mfi
|
|
add GR_Parameter_Y=-32,sp // Parameter 2 value
|
|
nop.f 0
|
|
.save ar.pfs,GR_SAVE_PFS
|
|
mov GR_SAVE_PFS=ar.pfs // Save ar.pfs
|
|
}
|
|
{ .mfi
|
|
.fframe 64
|
|
add sp=-64,sp // Create new stack
|
|
nop.f 0
|
|
mov GR_SAVE_GP=gp // Save gp
|
|
};;
|
|
{ .mmi
|
|
stfd [GR_Parameter_Y] = FR_Y,16 // Save Parameter 2 on stack
|
|
add GR_Parameter_X = 16,sp // Parameter 1 address
|
|
.save b0, GR_SAVE_B0
|
|
mov GR_SAVE_B0=b0 // Save b0
|
|
};;
|
|
.body
|
|
{ .mib
|
|
stfd [GR_Parameter_X] = FR_X // Store Parameter 1 on stack
|
|
add GR_Parameter_RESULT = 0,GR_Parameter_Y
|
|
nop.b 0 // Parameter 3 address
|
|
}
|
|
{ .mib
|
|
stfd [GR_Parameter_Y] = FR_RESULT // Store Parameter 3 on stack
|
|
add GR_Parameter_Y = -16,GR_Parameter_Y
|
|
br.call.sptk b0=__libm_error_support# // Call error handling function
|
|
};;
|
|
{ .mmi
|
|
nop.m 0
|
|
nop.m 0
|
|
add GR_Parameter_RESULT = 48,sp
|
|
};;
|
|
{ .mmi
|
|
ldfd f8 = [GR_Parameter_RESULT] // Get return result off stack
|
|
.restore sp
|
|
add sp = 64,sp // Restore stack pointer
|
|
mov b0 = GR_SAVE_B0 // Restore return address
|
|
};;
|
|
{ .mib
|
|
mov gp = GR_SAVE_GP // Restore gp
|
|
mov ar.pfs = GR_SAVE_PFS // Restore ar.pfs
|
|
br.ret.sptk b0 // Return
|
|
};;
|
|
|
|
LOCAL_LIBM_END(__libm_error_region)
|
|
|
|
|
|
|
|
.type __libm_error_support#,@function
|
|
.global __libm_error_support#
|
|
|
|
|