mirror of
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bb803bff5c
2004-12-29 Jakub Jelinek <jakub@redhat.com> * sysdeps/ia64/fpu/libm_support.h (__libm_error_support): Use libc_hidden_proto instead of HIDDEN_PROTO. * sysdeps/ia64/fpu/libm-symbols.h (HIDDEN_PROTO): Remove. (__libm_error_support): If ASSEMBLER and in libc, define to HIDDEN_JUMPTARGET(__libm_error_support). 2004-12-28 David Mosberger <davidm@hpl.hp.com> * sysdeps/ia64/fpu/Makefile (duplicated-routines): New macro. (sysdep_routines): Replace libm_ldexp{,f,l} and libm_scalbn{,f,l} with $(duplicated-routines). (libm-sysdep_routines): Likewise, but substitute "s_" prefix for "m_" prefix. 2004-12-27 David Mosberger <davidm@hpl.hp.com> * sysdeps/ia64/fpu/libm-symbols.h: Add include of <sysdep.h> and undefine "ret" macro. Add __libm_error_support hidden definitions. * sysdeps/ia64/fpu/e_lgamma_r.c: Remove CVS-id comment. Add missing portion of copyright statement. * sysdeps/ia64/fpu/e_lgammaf_r.c: Likewise. * sysdeps/ia64/fpu/e_lgammal_r.c: Likewise. * sysdeps/ia64/fpu/w_lgamma.c: Remove CVS-id comment. Add missing portion of copyright statement. (__ieee754_lgamma): Rename from lgamma(). Make lgamma() a weak alias. (__ieee754_gamma): Likewise. * sysdeps/ia64/fpu/w_lgammaf.c: Likewise. * sysdeps/ia64/fpu/w_lgammal.c: Likewise. 2004-12-09 H. J. Lu <hjl@lucon.org> * sysdeps/ia64/fpu/s_nextafterl.c: Remove. * sysdeps/ia64/fpu/s_nexttoward.c: Likewise. * sysdeps/ia64/fpu/s_nexttowardf.c: Likewise. * sysdeps/ia64/fpu/e_atan2l.S: Remove (duplicate of e_atan2l.c). * sysdeps/ia64/fpu/e_expl.S: Likewise. * sysdeps/ia64/fpu/e_logl.c: Remove (conflicts with e_logl.S). 2004-11-18 David Mosberger <davidm@hpl.hp.com> * sysdeps/ia64/fpu/README: New file. * sysdeps/ia64/fpu/gen_import_file_list: New file. * sysdeps/ia64/fpu/import_check: Likewise. * sysdeps/ia64/fpu/import_diffs: Likewise. * sysdeps/ia64/fpu/import_file.awk: Likewise. * sysdeps/ia64/fpu/import_intel_libm: Likewise. * sysdeps/ia64/fpu/libm-symbols.h: Likewise. * sysdeps/ia64/fpu/e_acos.S: Update from Intel libm v2.1+. * sysdeps/ia64/fpu/e_acosf.S: Likewise. * sysdeps/ia64/fpu/e_acosl.S: Likewise. * sysdeps/ia64/fpu/e_asin.S: Likewise. * sysdeps/ia64/fpu/e_asinf.S: Likewise. * sysdeps/ia64/fpu/e_asinl.S: Likewise. * sysdeps/ia64/fpu/e_atan2.S: Likewise. * sysdeps/ia64/fpu/e_atan2f.S: Likewise. * sysdeps/ia64/fpu/e_cosh.S: Likewise. * sysdeps/ia64/fpu/e_coshf.S: Likewise. * sysdeps/ia64/fpu/e_coshl.S: Likewise. * sysdeps/ia64/fpu/e_exp.S: Likewise. * sysdeps/ia64/fpu/e_expf.S: Likewise. * sysdeps/ia64/fpu/e_fmod.S: Likewise. * sysdeps/ia64/fpu/e_fmodf.S: Likewise. * sysdeps/ia64/fpu/e_fmodl.S: Likewise. * sysdeps/ia64/fpu/e_hypot.S: Likewise. * sysdeps/ia64/fpu/e_hypotf.S: Likewise. * sysdeps/ia64/fpu/e_hypotl.S: Likewise. * sysdeps/ia64/fpu/e_log.S: Likewise. * sysdeps/ia64/fpu/e_log2.S: Likewise. * sysdeps/ia64/fpu/e_log2f.S: Likewise. * sysdeps/ia64/fpu/e_log2l.S: Likewise. * sysdeps/ia64/fpu/e_logf.S: Likewise. * sysdeps/ia64/fpu/e_pow.S: Likewise. * sysdeps/ia64/fpu/e_powf.S: Likewise. * sysdeps/ia64/fpu/e_powl.S: Likewise. * sysdeps/ia64/fpu/e_remainder.S: Likewise. * sysdeps/ia64/fpu/e_remainderf.S: Likewise. * sysdeps/ia64/fpu/e_remainderl.S: Likewise. * sysdeps/ia64/fpu/e_scalb.S: Likewise. * sysdeps/ia64/fpu/e_scalbf.S: Likewise. * sysdeps/ia64/fpu/e_scalbl.S: Likewise. * sysdeps/ia64/fpu/e_sinh.S: Likewise. * sysdeps/ia64/fpu/e_sinhf.S: Likewise. * sysdeps/ia64/fpu/e_sinhl.S: Likewise. * sysdeps/ia64/fpu/e_sqrt.S: Likewise. * sysdeps/ia64/fpu/e_sqrtf.S: Likewise. * sysdeps/ia64/fpu/e_sqrtl.S: Likewise. * sysdeps/ia64/fpu/libm_error.c: Likewise. * sysdeps/ia64/fpu/libm_reduce.c: Likewise. * sysdeps/ia64/fpu/libm_support.h: Likewise. * sysdeps/ia64/fpu/s_atan.S: Likewise. * sysdeps/ia64/fpu/s_atanf.S: Likewise. * sysdeps/ia64/fpu/s_atanl.S: Likewise. * sysdeps/ia64/fpu/s_cbrt.S: Likewise. * sysdeps/ia64/fpu/s_cbrtf.S: Likewise. * sysdeps/ia64/fpu/s_cbrtl.S: Likewise. * sysdeps/ia64/fpu/s_ceil.S: Likewise. * sysdeps/ia64/fpu/s_ceilf.S: Likewise. * sysdeps/ia64/fpu/s_ceill.S: Likewise. * sysdeps/ia64/fpu/s_cos.S: Likewise. * sysdeps/ia64/fpu/s_cosf.S: Likewise. * sysdeps/ia64/fpu/s_cosl.S: Likewise. * sysdeps/ia64/fpu/s_expm1.S: Likewise. * sysdeps/ia64/fpu/s_expm1f.S: Likewise. * sysdeps/ia64/fpu/s_expm1l.S: Likewise. * sysdeps/ia64/fpu/s_fabs.S: Likewise. * sysdeps/ia64/fpu/s_fabsf.S: Likewise. * sysdeps/ia64/fpu/s_fabsl.S: Likewise. * sysdeps/ia64/fpu/s_floor.S: Likewise. * sysdeps/ia64/fpu/s_floorf.S: Likewise. * sysdeps/ia64/fpu/s_floorl.S: Likewise. * sysdeps/ia64/fpu/s_frexp.c: Likewise. * sysdeps/ia64/fpu/s_frexpf.c: Likewise. * sysdeps/ia64/fpu/s_frexpl.c: Likewise. * sysdeps/ia64/fpu/s_ilogb.S: Likewise. * sysdeps/ia64/fpu/s_ilogbf.S: Likewise. * sysdeps/ia64/fpu/s_ilogbl.S: Likewise. * sysdeps/ia64/fpu/s_log1p.S: Likewise. * sysdeps/ia64/fpu/s_log1pf.S: Likewise. * sysdeps/ia64/fpu/s_log1pl.S: Likewise. * sysdeps/ia64/fpu/s_logb.S: Likewise. * sysdeps/ia64/fpu/s_logbf.S: Likewise. * sysdeps/ia64/fpu/s_logbl.S: Likewise. * sysdeps/ia64/fpu/s_modf.S: Likewise. * sysdeps/ia64/fpu/s_modff.S: Likewise. * sysdeps/ia64/fpu/s_modfl.S: Likewise. * sysdeps/ia64/fpu/s_nearbyint.S: Likewise. * sysdeps/ia64/fpu/s_nearbyintf.S: Likewise. * sysdeps/ia64/fpu/s_nearbyintl.S: Likewise. * sysdeps/ia64/fpu/s_rint.S: Likewise. * sysdeps/ia64/fpu/s_rintf.S: Likewise. * sysdeps/ia64/fpu/s_rintl.S: Likewise. * sysdeps/ia64/fpu/s_round.S: Likewise. * sysdeps/ia64/fpu/s_roundf.S: Likewise. * sysdeps/ia64/fpu/s_roundl.S: Likewise. * sysdeps/ia64/fpu/s_significand.S: Likewise. * sysdeps/ia64/fpu/s_significandf.S: Likewise. * sysdeps/ia64/fpu/s_significandl.S: Likewise. * sysdeps/ia64/fpu/s_tan.S: Likewise. * sysdeps/ia64/fpu/s_tanf.S: Likewise. * sysdeps/ia64/fpu/s_tanl.S: Likewise. * sysdeps/ia64/fpu/s_trunc.S: Likewise. * sysdeps/ia64/fpu/s_truncf.S: Likewise. * sysdeps/ia64/fpu/s_truncl.S: Likewise. * sysdeps/ia64/fpu/e_acosh.S: New file from Intel libm v2.1+. * sysdeps/ia64/fpu/e_acoshf.S: Likewise. * sysdeps/ia64/fpu/e_acoshl.S: Likewise. * sysdeps/ia64/fpu/e_atanh.S: Likewise. * sysdeps/ia64/fpu/e_atanhf.S: Likewise. * sysdeps/ia64/fpu/e_atanhl.S: Likewise. * sysdeps/ia64/fpu/e_exp10.S: Likewise. * sysdeps/ia64/fpu/e_exp10f.S: Likewise. * sysdeps/ia64/fpu/e_exp10l.S: Likewise. * sysdeps/ia64/fpu/e_exp2.S: Likewise. * sysdeps/ia64/fpu/e_exp2f.S: Likewise. * sysdeps/ia64/fpu/e_exp2l.S: Likewise. * sysdeps/ia64/fpu/e_lgamma_r.S: Likewise. * sysdeps/ia64/fpu/e_lgammaf_r.S: Likewise. * sysdeps/ia64/fpu/e_lgammal_r.S: Likewise. * sysdeps/ia64/fpu/e_logl.S: Likewise. * sysdeps/ia64/fpu/libm_frexp.S: Likewise. * sysdeps/ia64/fpu/libm_frexpf.S: Likewise. * sysdeps/ia64/fpu/libm_frexpl.S: Likewise. * sysdeps/ia64/fpu/s_libm_ldexp.S: Likewise. * sysdeps/ia64/fpu/s_libm_ldexpf.S: Likewise. * sysdeps/ia64/fpu/s_libm_ldexpl.S: Likewise. * sysdeps/ia64/fpu/s_libm_scalbn.S: Likewise. * sysdeps/ia64/fpu/s_libm_scalbnf.S: Likewise. * sysdeps/ia64/fpu/s_libm_scalbnl.S: Likewise. * sysdeps/ia64/fpu/libm_lgamma.S: Likewise. * sysdeps/ia64/fpu/libm_lgammaf.S: Likewise. * sysdeps/ia64/fpu/libm_lgammal.S: Likewise. * sysdeps/ia64/fpu/libm_sincos.S: Likewise. * sysdeps/ia64/fpu/libm_sincos_large.S: Likewise. * sysdeps/ia64/fpu/libm_sincosf.S: Likewise. * sysdeps/ia64/fpu/libm_sincosl.S: Likewise. * sysdeps/ia64/fpu/libm_scalblnf.S: Likewise. * sysdeps/ia64/fpu/s_asinh.S: Likewise. * sysdeps/ia64/fpu/s_asinhf.S: Likewise. * sysdeps/ia64/fpu/s_asinhl.S: Likewise. * sysdeps/ia64/fpu/s_erf.S: Likewise. * sysdeps/ia64/fpu/s_erfc.S: Likewise. * sysdeps/ia64/fpu/s_erfcf.S: Likewise. * sysdeps/ia64/fpu/s_erfcl.S: Likewise. * sysdeps/ia64/fpu/s_erff.S: Likewise. * sysdeps/ia64/fpu/s_erfl.S: Likewise. * sysdeps/ia64/fpu/s_fdim.S: Likewise. * sysdeps/ia64/fpu/s_fdimf.S: Likewise. * sysdeps/ia64/fpu/s_fdiml.S: Likewise. * sysdeps/ia64/fpu/s_fma.S: Likewise. * sysdeps/ia64/fpu/s_fmaf.S: Likewise. * sysdeps/ia64/fpu/s_fmal.S: Likewise. * sysdeps/ia64/fpu/s_fmax.S: Likewise. * sysdeps/ia64/fpu/s_fmaxf.S: Likewise. * sysdeps/ia64/fpu/s_fmaxl.S: Likewise. * sysdeps/ia64/fpu/s_ldexp.c: Likewise. * sysdeps/ia64/fpu/s_ldexpf.c: Likewise. * sysdeps/ia64/fpu/s_ldexpl.c: Likewise. * sysdeps/ia64/fpu/s_nextafter.S: Likewise. * sysdeps/ia64/fpu/s_nextafterf.S: Likewise. * sysdeps/ia64/fpu/s_nextafterl.S: Likewise. * sysdeps/ia64/fpu/s_nexttoward.S: Likewise. * sysdeps/ia64/fpu/s_nexttowardf.S: Likewise. * sysdeps/ia64/fpu/s_nexttowardl.S: Likewise. * sysdeps/ia64/fpu/s_tanh.S: Likewise. * sysdeps/ia64/fpu/s_tanhf.S: Likewise. * sysdeps/ia64/fpu/s_tanhl.S: Likewise. * sysdeps/ia64/fpu/s_scalblnf.c: Likewise. * sysdeps/ia64/fpu/w_lgamma.c: Likewise. * sysdeps/ia64/fpu/w_lgammaf.c: Likewise. * sysdeps/ia64/fpu/w_lgammal.c: Likewise. * sysdeps/ia64/fpu/w_tgamma.S: Likewise. * sysdeps/ia64/fpu/w_tgammaf.S: Likewise. * sysdeps/ia64/fpu/w_tgammal.S: Likewise. * sysdeps/ia64/fpu/e_gamma_r.c: New empty dummy-file. * sysdeps/ia64/fpu/e_gammaf_r.c: Likewise. * sysdeps/ia64/fpu/e_gammal_r.c: Likewise. * sysdeps/ia64/fpu/w_acosh.c: Likewise. * sysdeps/ia64/fpu/w_acoshf.c: Likewise. * sysdeps/ia64/fpu/w_acoshl.c: Likewise. * sysdeps/ia64/fpu/w_atanh.c: Likewise. * sysdeps/ia64/fpu/w_atanhf.c: Likewise. * sysdeps/ia64/fpu/w_atanhl.c: Likewise. * sysdeps/ia64/fpu/w_exp10.c: Likewise. * sysdeps/ia64/fpu/w_exp10f.c: Likewise. * sysdeps/ia64/fpu/w_exp10l.c: Likewise. * sysdeps/ia64/fpu/w_exp2.c: Likewise. * sysdeps/ia64/fpu/w_exp2f.c: Likewise. * sysdeps/ia64/fpu/w_exp2l.c: Likewise. * sysdeps/ia64/fpu/w_expl.c: Likewise. * sysdeps/ia64/fpu/e_expl.S: Likewise. * sysdeps/ia64/fpu/w_lgamma_r.c: Likewise. * sysdeps/ia64/fpu/w_lgammaf_r.c: Likewise. * sysdeps/ia64/fpu/w_lgammal_r.c: Likewise. * sysdeps/ia64/fpu/w_log2.c: Likewise. * sysdeps/ia64/fpu/w_log2f.c: Likewise. * sysdeps/ia64/fpu/w_log2l.c: Likewise. * sysdeps/ia64/fpu/w_sinh.c: Likewise. * sysdeps/ia64/fpu/w_sinhf.c: Likewise. * sysdeps/ia64/fpu/w_sinhl.c: Likewise. * sysdeps/ia64/fpu/libm_atan2_reg.S: Remove. * sysdeps/ia64/fpu/s_ldexp.S: Likewise. * sysdeps/ia64/fpu/s_ldexpf.S: Likewise. * sysdeps/ia64/fpu/s_ldexpl.S: Likewise. * sysdeps/ia64/fpu/s_scalbn.S: Likewise. * sysdeps/ia64/fpu/s_scalbnf.S: Likewise. * sysdeps/ia64/fpu/s_scalbnl.S: Likewise. * sysdeps/ia64/fpu/s_sincos.c: Make it an empty dummy-file. * sysdeps/ia64/fpu/s_sincosf.c: Likewise. * sysdeps/ia64/fpu/s_sincosl.c: Likewise. * sysdeps/ia64/fpu/e_atan2l.S: Add "Not needed" comment. * sysdeps/ia64/fpu/s_copysign.S: Add __libm_copysign{,f,l} alias for use by libm_error.c * sysdeps/ia64/fpu/Makefile (libm-sysdep_routines): Remove libm_atan2_reg, libm_tan, libm_frexp4{f,l}. Mention s_erfc{,f,l}, libm_frexp{,f,l}, libm_ldexp{,f,l}, libm_sincos{,f,l}, libm_sincos_large, libm_lgamma{,f,l}, libm_scalbn{,f,l}, libm_scalblnf. (sysdep_routines): Remove libm_frexp4{,f,l}. Mention libm_frexp{,f,l}, libm_ldexp{,f,l}, and libm_scalbn{,f,l}. (sysdep-CPPFLAGS): Add -include libm-symbols.h, -D__POSIX__, _D_LIB_VERSIONIMF=_LIB_VERSION, -DSIZE_LONG_INT_64, and -DSIZE_LONG_LONG_INT_64.
548 lines
11 KiB
ArmAsm
548 lines
11 KiB
ArmAsm
.file "scalb.s"
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// Copyright (c) 2000 - 2003, Intel Corporation
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// All rights reserved.
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//
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// Contributed 2000 by the Intel Numerics Group, Intel Corporation
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//
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// Redistribution and use in source and binary forms, with or without
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// modification, are permitted provided that the following conditions are
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// met:
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//
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// * Redistributions of source code must retain the above copyright
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// notice, this list of conditions and the following disclaimer.
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//
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// * Redistributions in binary form must reproduce the above copyright
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// notice, this list of conditions and the following disclaimer in the
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// documentation and/or other materials provided with the distribution.
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//
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// * The name of Intel Corporation may not be used to endorse or promote
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// products derived from this software without specific prior written
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// permission.
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// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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// "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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// LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
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// A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL INTEL OR ITS
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// CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
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// EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
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// PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR
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// PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY
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// OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY OR TORT (INCLUDING
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// NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
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// SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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//
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// Intel Corporation is the author of this code, and requests that all
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// problem reports or change requests be submitted to it directly at
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// http://www.intel.com/software/products/opensource/libraries/num.htm.
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//
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// History
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//==============================================================
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// 02/02/00 Initial version
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// 01/26/01 Scalb completely reworked and now standalone version
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// 05/20/02 Cleaned up namespace and sf0 syntax
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// 02/10/03 Reordered header: .section, .global, .proc, .align
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//
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// API
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//==============================================================
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// double = scalb (double x, double n)
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// input floating point f8 and floating point f9
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// output floating point f8
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//
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// Returns x* 2**n using an fma and detects overflow
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// and underflow.
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//
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//
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FR_Floating_X = f8
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FR_Result = f8
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FR_Floating_N = f9
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FR_Result2 = f9
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FR_Norm_N = f10
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FR_Result3 = f11
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FR_Norm_X = f12
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FR_N_float_int = f13
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FR_Two_N = f14
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FR_Two_to_Big = f15
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FR_Big = f6
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FR_NBig = f7
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GR_N_Biased = r15
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GR_Big = r16
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GR_NBig = r17
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GR_Scratch = r18
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GR_Scratch1 = r19
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GR_Bias = r20
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GR_N_as_int = r21
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GR_SAVE_B0 = r32
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GR_SAVE_GP = r33
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GR_SAVE_PFS = r34
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GR_Parameter_X = r35
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GR_Parameter_Y = r36
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GR_Parameter_RESULT = r37
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GR_Tag = r38
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.section .text
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GLOBAL_IEEE754_ENTRY(scalb)
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//
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// Is x NAN, INF, ZERO, +-?
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//
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{ .mfi
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alloc r32=ar.pfs,0,3,4,0
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fclass.m.unc p7,p0 = FR_Floating_X, 0xe7 //@snan | @qnan | @inf | @zero
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addl GR_Scratch = 0x019C3F,r0
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}
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//
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// Is y a NAN, INF, ZERO, +-?
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//
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{ .mfi
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nop.m 999
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fclass.m.unc p6,p0 = FR_Floating_N, 0xe7 //@snan | @qnan | @inf | @zero
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addl GR_Scratch1 = 0x063BF,r0
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}
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;;
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//
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// Convert N to a fp integer
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// Normalize x
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//
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{ .mfi
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nop.m 0
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fnorm.s1 FR_Norm_N = FR_Floating_N
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nop.i 999
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}
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{ .mfi
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nop.m 999
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fnorm.s1 FR_Norm_X = FR_Floating_X
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nop.i 999
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};;
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//
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// Create 2*big
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// Create 2**-big
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// Normalize x
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// Branch on special values.
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//
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{ .mib
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setf.exp FR_Big = GR_Scratch
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nop.i 0
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(p6) br.cond.spnt SCALB_NAN_INF_ZERO
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}
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{ .mib
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setf.exp FR_NBig = GR_Scratch1
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nop.i 0
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(p7) br.cond.spnt SCALB_NAN_INF_ZERO
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};;
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//
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// Convert N to a fp integer
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// Create -35000
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//
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{ .mfi
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addl GR_Scratch = 1,r0
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fcvt.fx.trunc.s1 FR_N_float_int = FR_Norm_N
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addl GR_NBig = -35000,r0
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}
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;;
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//
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// Put N if a GP register
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// Convert N_float_int to floating point value
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// Create 35000
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// Build the exponent Bias
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//
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{ .mii
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getf.sig GR_N_as_int = FR_N_float_int
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shl GR_Scratch = GR_Scratch,63
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addl GR_Big = 35000,r0
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}
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{ .mfi
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addl GR_Bias = 0x0FFFF,r0
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fcvt.xf FR_N_float_int = FR_N_float_int
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nop.i 0
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};;
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//
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// Catch those fp values that are beyond 2**64-1
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// Is N > 35000
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// Is N < -35000
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//
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{ .mfi
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cmp.ne.unc p9,p10 = GR_N_as_int,GR_Scratch
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nop.f 0
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nop.i 0
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}
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{ .mmi
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cmp.ge.unc p6, p0 = GR_N_as_int, GR_Big
|
|
cmp.le.unc p8, p0 = GR_N_as_int, GR_NBig
|
|
nop.i 0
|
|
};;
|
|
|
|
//
|
|
// Is N really an int, only for those non-int indefinites?
|
|
// Create exp bias.
|
|
//
|
|
{ .mfi
|
|
add GR_N_Biased = GR_Bias,GR_N_as_int
|
|
(p9) fcmp.neq.unc.s1 p7,p0 = FR_Norm_N, FR_N_float_int
|
|
nop.i 0
|
|
};;
|
|
|
|
//
|
|
// Branch and return if N is not an int.
|
|
// Main path, create 2**N
|
|
//
|
|
{ .mfi
|
|
setf.exp FR_Two_N = GR_N_Biased
|
|
nop.i 999
|
|
}
|
|
{ .mfb
|
|
nop.m 0
|
|
(p7) frcpa.s0 f8,p11 = f0,f0
|
|
(p7) br.ret.spnt b0
|
|
};;
|
|
|
|
//
|
|
// Set denormal on denormal input x and denormal input N
|
|
//
|
|
{ .mfi
|
|
nop.m 999
|
|
(p10)fcmp.ge.s1 p6,p8 = FR_Norm_N,f0
|
|
nop.i 0
|
|
};;
|
|
{ .mfi
|
|
nop.m 999
|
|
fcmp.ge.s0 p0,p11 = FR_Floating_X,f0
|
|
nop.i 999
|
|
}
|
|
{ .mfi
|
|
nop.m 999
|
|
fcmp.ge.s0 p12,p13 = FR_Floating_N,f0
|
|
nop.i 0
|
|
};;
|
|
|
|
//
|
|
// Adjust 2**N if N was very small or very large
|
|
//
|
|
|
|
{ .mfi
|
|
nop.m 0
|
|
(p6) fma.s1 FR_Two_N = FR_Big,f1,f0
|
|
nop.i 0
|
|
}
|
|
{ .mlx
|
|
nop.m 999
|
|
movl GR_Scratch = 0x00000000000303FF
|
|
};;
|
|
{ .mfi
|
|
nop.m 0
|
|
(p8) fma.s1 FR_Two_N = FR_NBig,f1,f0
|
|
nop.i 0
|
|
}
|
|
{ .mlx
|
|
nop.m 999
|
|
movl GR_Scratch1= 0x00000000000103FF
|
|
};;
|
|
|
|
// Set up necessary status fields
|
|
//
|
|
// S0 user supplied status
|
|
// S2 user supplied status + WRE + TD (Overflows)
|
|
// S3 user supplied status + FZ + TD (Underflows)
|
|
//
|
|
{ .mfi
|
|
nop.m 999
|
|
fsetc.s3 0x7F,0x41
|
|
nop.i 999
|
|
}
|
|
{ .mfi
|
|
nop.m 999
|
|
fsetc.s2 0x7F,0x42
|
|
nop.i 999
|
|
};;
|
|
|
|
//
|
|
// Do final operation
|
|
//
|
|
{ .mfi
|
|
setf.exp FR_NBig = GR_Scratch
|
|
fma.d.s0 FR_Result = FR_Two_N,FR_Norm_X,f0
|
|
nop.i 999
|
|
}
|
|
{ .mfi
|
|
nop.m 999
|
|
fma.d.s3 FR_Result3 = FR_Two_N,FR_Norm_X,f0
|
|
nop.i 999
|
|
};;
|
|
{ .mfi
|
|
setf.exp FR_Big = GR_Scratch1
|
|
fma.d.s2 FR_Result2 = FR_Two_N,FR_Norm_X,f0
|
|
nop.i 999
|
|
};;
|
|
|
|
// Check for overflow or underflow.
|
|
//
|
|
// S0 user supplied status
|
|
// S2 user supplied status + WRE + TD (Overflow)
|
|
// S3 user supplied status + FZ + TD (Underflow)
|
|
//
|
|
//
|
|
// Restore s3
|
|
// Restore s2
|
|
//
|
|
{ .mfi
|
|
nop.m 0
|
|
fsetc.s3 0x7F,0x40
|
|
nop.i 999
|
|
}
|
|
{ .mfi
|
|
nop.m 0
|
|
fsetc.s2 0x7F,0x40
|
|
nop.i 999
|
|
};;
|
|
|
|
//
|
|
// Is the result zero?
|
|
//
|
|
{ .mfi
|
|
nop.m 999
|
|
fclass.m.unc p6, p0 = FR_Result3, 0x007
|
|
nop.i 999
|
|
}
|
|
{ .mfi
|
|
addl GR_Tag = 53, r0
|
|
fcmp.ge.unc.s1 p7, p8 = FR_Result2 , FR_Big
|
|
nop.i 0
|
|
};;
|
|
|
|
//
|
|
// Detect masked underflow - Tiny + Inexact Only
|
|
//
|
|
{ .mfi
|
|
nop.m 999
|
|
(p6) fcmp.neq.unc.s1 p6, p0 = FR_Result , FR_Result2
|
|
nop.i 999
|
|
};;
|
|
|
|
//
|
|
// Is result bigger the allowed range?
|
|
// Branch out for underflow
|
|
//
|
|
{ .mfb
|
|
(p6) addl GR_Tag = 54, r0
|
|
(p8) fcmp.le.unc.s1 p9, p10 = FR_Result2 , FR_NBig
|
|
(p6) br.cond.spnt SCALB_UNDERFLOW
|
|
};;
|
|
|
|
//
|
|
// Branch out for overflow
|
|
//
|
|
{ .mbb
|
|
nop.m 0
|
|
(p7) br.cond.spnt SCALB_OVERFLOW
|
|
(p9) br.cond.spnt SCALB_OVERFLOW
|
|
};;
|
|
|
|
//
|
|
// Return from main path.
|
|
//
|
|
{ .mfb
|
|
nop.m 999
|
|
nop.f 0
|
|
br.ret.sptk b0;;
|
|
}
|
|
|
|
SCALB_NAN_INF_ZERO:
|
|
|
|
//
|
|
// Convert N to a fp integer
|
|
//
|
|
{ .mfi
|
|
addl GR_Scratch = 1,r0
|
|
fcvt.fx.trunc.s1 FR_N_float_int = FR_Norm_N
|
|
nop.i 999
|
|
}
|
|
{ .mfi
|
|
nop.m 0
|
|
fclass.m.unc p6,p0 = FR_Floating_N, 0xc3 //@snan | @qnan
|
|
nop.i 0
|
|
};;
|
|
{ .mfi
|
|
nop.m 0
|
|
fclass.m.unc p7,p0 = FR_Floating_X, 0xc3 //@snan | @qnan
|
|
shl GR_Scratch = GR_Scratch,63
|
|
};;
|
|
{ .mfi
|
|
nop.m 0
|
|
fclass.m.unc p8,p0 = FR_Floating_N, 0x21 // @inf
|
|
nop.i 0
|
|
}
|
|
{ .mfi
|
|
nop.m 0
|
|
fclass.m.unc p9,p0 = FR_Floating_N, 0x22 // @-inf
|
|
nop.i 0
|
|
};;
|
|
|
|
//
|
|
// Either X or N is a Nan, return result and possible raise invalid.
|
|
//
|
|
{ .mfb
|
|
nop.m 0
|
|
(p6) fma.d.s0 FR_Result = FR_Floating_N,FR_Floating_X,f0
|
|
(p6) br.ret.spnt b0
|
|
};;
|
|
{ .mfb
|
|
getf.sig GR_N_as_int = FR_N_float_int
|
|
(p7) fma.d.s0 FR_Result = FR_Floating_N,FR_Floating_X,f0
|
|
(p7) br.ret.spnt b0
|
|
};;
|
|
|
|
//
|
|
// If N + Inf do something special
|
|
// For N = -Inf, create Int
|
|
//
|
|
{ .mfb
|
|
nop.m 0
|
|
(p8) fma.d.s0 FR_Result = FR_Floating_X, FR_Floating_N,f0
|
|
(p8) br.ret.spnt b0
|
|
}
|
|
{ .mfi
|
|
nop.m 0
|
|
(p9) fnma.d.s0 FR_Floating_N = FR_Floating_N, f1, f0
|
|
nop.i 0
|
|
};;
|
|
|
|
//
|
|
// If N==-Inf,return x/(-N)
|
|
//
|
|
{ .mfb
|
|
nop.m 0
|
|
(p9) frcpa.s0 FR_Result,p6 = FR_Floating_X,FR_Floating_N
|
|
(p9) br.ret.spnt b0
|
|
};;
|
|
|
|
//
|
|
// Convert N_float_int to floating point value
|
|
//
|
|
{ .mfi
|
|
cmp.ne.unc p9,p0 = GR_N_as_int,GR_Scratch
|
|
fcvt.xf FR_N_float_int = FR_N_float_int
|
|
nop.i 0
|
|
};;
|
|
|
|
//
|
|
// Is N an integer.
|
|
//
|
|
{ .mfi
|
|
nop.m 0
|
|
(p9) fcmp.neq.unc.s1 p7,p0 = FR_Norm_N, FR_N_float_int
|
|
nop.i 0
|
|
};;
|
|
|
|
//
|
|
// If N not an int, return NaN and raise invalid.
|
|
//
|
|
{ .mfb
|
|
nop.m 0
|
|
(p7) frcpa.s0 FR_Result,p6 = f0,f0
|
|
(p7) br.ret.spnt b0
|
|
};;
|
|
|
|
//
|
|
// Always return x in other path.
|
|
//
|
|
{ .mfb
|
|
nop.m 0
|
|
fma.d.s0 FR_Result = FR_Floating_X,f1,f0
|
|
br.ret.sptk b0
|
|
};;
|
|
|
|
GLOBAL_IEEE754_END(scalb)
|
|
__libm_error_region:
|
|
|
|
SCALB_OVERFLOW:
|
|
SCALB_UNDERFLOW:
|
|
|
|
//
|
|
// Get stack address of N
|
|
//
|
|
.prologue
|
|
{ .mfi
|
|
add GR_Parameter_Y=-32,sp
|
|
nop.f 0
|
|
.save ar.pfs,GR_SAVE_PFS
|
|
mov GR_SAVE_PFS=ar.pfs
|
|
}
|
|
//
|
|
// Adjust sp
|
|
//
|
|
{ .mfi
|
|
.fframe 64
|
|
add sp=-64,sp
|
|
nop.f 0
|
|
mov GR_SAVE_GP=gp
|
|
};;
|
|
|
|
//
|
|
// Store N on stack in correct position
|
|
// Locate the address of x on stack
|
|
//
|
|
{ .mmi
|
|
stfd [GR_Parameter_Y] = FR_Norm_N,16
|
|
add GR_Parameter_X = 16,sp
|
|
.save b0, GR_SAVE_B0
|
|
mov GR_SAVE_B0=b0
|
|
};;
|
|
|
|
//
|
|
// Store x on the stack.
|
|
// Get address for result on stack.
|
|
//
|
|
.body
|
|
{ .mib
|
|
stfd [GR_Parameter_X] = FR_Norm_X
|
|
add GR_Parameter_RESULT = 0,GR_Parameter_Y
|
|
nop.b 0
|
|
}
|
|
{ .mib
|
|
stfd [GR_Parameter_Y] = FR_Result
|
|
add GR_Parameter_Y = -16,GR_Parameter_Y
|
|
br.call.sptk b0=__libm_error_support#
|
|
};;
|
|
|
|
//
|
|
// Get location of result on stack
|
|
//
|
|
{ .mmi
|
|
nop.m 0
|
|
nop.m 0
|
|
add GR_Parameter_RESULT = 48,sp
|
|
};;
|
|
|
|
//
|
|
// Get the new result
|
|
//
|
|
{ .mmi
|
|
ldfd FR_Result = [GR_Parameter_RESULT]
|
|
.restore sp
|
|
add sp = 64,sp
|
|
mov b0 = GR_SAVE_B0
|
|
};;
|
|
|
|
//
|
|
// Restore gp, ar.pfs and return
|
|
//
|
|
{ .mib
|
|
mov gp = GR_SAVE_GP
|
|
mov ar.pfs = GR_SAVE_PFS
|
|
br.ret.sptk b0
|
|
};;
|
|
|
|
LOCAL_LIBM_END(__libm_error_region)
|
|
|
|
.type __libm_error_support#,@function
|
|
.global __libm_error_support#
|