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144 lines
4.3 KiB
C
144 lines
4.3 KiB
C
/* Machine-dependent software floating-point definitions.
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Sparc64 userland (_Q_* and _Qp_*) version.
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Copyright (C) 1997,1998,1999 Free Software Foundation, Inc.
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This file is part of the GNU C Library.
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Contributed by Richard Henderson (rth@cygnus.com),
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Jakub Jelinek (jj@ultra.linux.cz) and
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David S. Miller (davem@redhat.com).
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The GNU C Library is free software; you can redistribute it and/or
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modify it under the terms of the GNU Lesser General Public
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License as published by the Free Software Foundation; either
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version 2.1 of the License, or (at your option) any later version.
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The GNU C Library is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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Lesser General Public License for more details.
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You should have received a copy of the GNU Lesser General Public
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License along with the GNU C Library; if not, write to the Free
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Software Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA
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02111-1307 USA. */
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#include <fpu_control.h>
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#include <fenv.h>
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#define _FP_W_TYPE_SIZE 64
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#define _FP_W_TYPE unsigned long
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#define _FP_WS_TYPE signed long
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#define _FP_I_TYPE long
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/* Helper macros for _FP_MUL_MEAT_2_120_240_double. */
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#define _FP_MUL_MEAT_SET_FE_TZ \
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do { \
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static fpu_control_t _fetz = _FPU_RC_DOWN; \
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_FPU_SETCW(_fetz); \
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} while (0)
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#ifndef _FP_MUL_MEAT_RESET_FE
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#define _FP_MUL_MEAT_RESET_FE _FPU_SETCW(_fcw)
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#endif
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#define _FP_MUL_MEAT_S(R,X,Y) \
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_FP_MUL_MEAT_1_imm(_FP_WFRACBITS_S,R,X,Y)
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#define _FP_MUL_MEAT_D(R,X,Y) \
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_FP_MUL_MEAT_1_wide(_FP_WFRACBITS_D,R,X,Y,umul_ppmm)
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#define _FP_MUL_MEAT_Q(R,X,Y) \
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_FP_MUL_MEAT_2_120_240_double(_FP_WFRACBITS_Q,R,X,Y, \
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_FP_MUL_MEAT_SET_FE_TZ, \
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_FP_MUL_MEAT_RESET_FE)
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#define _FP_DIV_MEAT_S(R,X,Y) _FP_DIV_MEAT_1_imm(S,R,X,Y,_FP_DIV_HELP_imm)
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#define _FP_DIV_MEAT_D(R,X,Y) _FP_DIV_MEAT_1_udiv_norm(D,R,X,Y)
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#define _FP_DIV_MEAT_Q(R,X,Y) _FP_DIV_MEAT_2_udiv(Q,R,X,Y)
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#define _FP_NANFRAC_S ((_FP_QNANBIT_S << 1) - 1)
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#define _FP_NANFRAC_D ((_FP_QNANBIT_D << 1) - 1)
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#define _FP_NANFRAC_Q ((_FP_QNANBIT_Q << 1) - 1), -1
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#define _FP_NANSIGN_S 0
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#define _FP_NANSIGN_D 0
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#define _FP_NANSIGN_Q 0
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#define _FP_KEEPNANFRACP 1
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/* If one NaN is signaling and the other is not,
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* we choose that one, otherwise we choose Y.
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*/
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#define _FP_CHOOSENAN(fs, wc, R, X, Y, OP) \
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do { \
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if ((_FP_FRAC_HIGH_RAW_##fs(Y) & _FP_QNANBIT_##fs) \
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&& !(_FP_FRAC_HIGH_RAW_##fs(X) & _FP_QNANBIT_##fs)) \
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{ \
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R##_s = X##_s; \
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_FP_FRAC_COPY_##wc(R,X); \
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} \
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else \
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{ \
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R##_s = Y##_s; \
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_FP_FRAC_COPY_##wc(R,Y); \
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} \
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R##_c = FP_CLS_NAN; \
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} while (0)
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/* Obtain the current rounding mode. */
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#ifndef FP_ROUNDMODE
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#define FP_ROUNDMODE ((_fcw >> 30) & 0x3)
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#endif
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/* Exception flags. */
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#define FP_EX_INVALID (1 << 4)
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#define FP_EX_OVERFLOW (1 << 3)
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#define FP_EX_UNDERFLOW (1 << 2)
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#define FP_EX_DIVZERO (1 << 1)
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#define FP_EX_INEXACT (1 << 0)
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#define _FP_DECL_EX fpu_control_t _fcw
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#define FP_INIT_ROUNDMODE \
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do { \
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_FPU_GETCW(_fcw); \
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} while (0)
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#define FP_INHIBIT_RESULTS ((_fcw >> 23) & _fex)
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/* Simulate exceptions using double arithmetics. */
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extern double __Qp_handle_exceptions(int exc);
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#define FP_HANDLE_EXCEPTIONS \
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do { \
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if (!_fex) \
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{ \
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/* This is the common case, so we do it inline. \
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* We need to clear cexc bits if any. \
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*/ \
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__asm__ __volatile__("\n" \
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" fzero %%f62\n" \
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" faddd %%f62, %%f62, %%f62\n" \
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" " : : : "f62"); \
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} \
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else \
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{ \
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__Qp_handle_exceptions (_fex); \
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} \
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} while (0)
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#define QP_HANDLE_EXCEPTIONS(_a) \
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do { \
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if ((_fcw >> 23) & _fex) \
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{ \
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_a; \
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} \
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else \
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{ \
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_fcw = (_fcw & ~0x1fL) | (_fex << 5) | _fex; \
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_FPU_SETCW(_fcw); \
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} \
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} while (0)
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#define QP_NO_EXCEPTIONS \
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__asm ("fzero %%f62\n" \
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" faddd %%f62, %%f62, %%f62" : : : "f62")
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#define QP_CLOBBER "memory", "f52", "f54", "f56", "f58", "f60", "f62"
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#define QP_CLOBBER_CC QP_CLOBBER , "cc"
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