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bde40c2f9a
New macros. * sysdeps/x86_64/soft-fp/sfp-machine.h: Likewise. * soft-fp/soft-fp.h: Allow sfp-machine.h to define FP_RND_NEAREST without defining FP_ROUNDMODE.
90 lines
2.7 KiB
C
90 lines
2.7 KiB
C
#define _FP_W_TYPE_SIZE 32
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#define _FP_W_TYPE unsigned long
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#define _FP_WS_TYPE signed long
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#define _FP_I_TYPE long
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#define __FP_FRAC_ADD_2(rh, rl, xh, xl, yh, yl) \
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__asm__("addl %5,%1; adcl %3,%0" \
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: "=r"(rh), "=r"(rl) \
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: "%0"(xh), "g"(yh), "%1"(xl), "g"(yl) \
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: "cc")
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#define __FP_FRAC_ADD_4(r3,r2,r1,r0,x3,x2,x1,x0,y3,y2,y1,y0) \
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do { \
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__asm__ volatile("addl %5,%1; adcl %3,%0" \
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: "=r"(r1), "=r"(r0) \
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: "%0"(x1), "g"(y1), "%1"(x0), "g"(y0) \
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: "cc"); \
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__asm__ volatile("adcl %5,%1; adcl %3,%0" \
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: "=r"(r3), "=r"(r2) \
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: "%0"(x3), "g"(y3), "%1"(x2), "g"(y2) \
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: "cc"); \
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} while (0)
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#define __FP_FRAC_SUB_2(rh, rl, xh, xl, yh, yl) \
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__asm__("subl %5,%1; sbbl %4,%0" \
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: "=r"(rh), "=r"(rl) \
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: "0"(xh), "1"(xl), "g"(yh), "g"(yl) \
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: "cc")
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#define __FP_CLZ(r, x) \
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do { \
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__asm__("bsrl %1,%0" : "=r"(r) : "g"(x) : "cc"); \
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r ^= 31; \
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} while (0)
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#define _i386_mul_32_64(rh, rl, x, y) \
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__asm__("mull %2" : "=d"(rh), "=a"(rl) : "%g"(x), "1"(y) : "cc")
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#define _i386_div_64_32(q, r, nh, nl, d) \
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__asm__ ("divl %4" : "=a"(q), "=d"(r) : "0"(nl), "1"(nh), "g"(d) : "cc")
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#define _FP_MUL_MEAT_S(R,X,Y) \
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_FP_MUL_MEAT_1_wide(_FP_WFRACBITS_S,R,X,Y,_i386_mul_32_64)
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#define _FP_MUL_MEAT_D(R,X,Y) \
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_FP_MUL_MEAT_2_wide(_FP_WFRACBITS_D,R,X,Y,_i386_mul_32_64)
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#define _FP_DIV_MEAT_S(R,X,Y) _FP_DIV_MEAT_1_udiv(S,R,X,Y)
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#define _FP_DIV_MEAT_D(R,X,Y) _FP_DIV_MEAT_2_udiv(D,R,X,Y)
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#define _FP_NANFRAC_S _FP_QNANBIT_S
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#define _FP_NANFRAC_D _FP_QNANBIT_D, 0
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#define _FP_NANFRAC_Q _FP_QNANBIT_Q, 0, 0, 0
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#define _FP_NANSIGN_S 1
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#define _FP_NANSIGN_D 1
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#define _FP_NANSIGN_Q 1
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#define _FP_KEEPNANFRACP 1
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/* Here is something Intel misdesigned: the specs don't define
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the case where we have two NaNs with same mantissas, but
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different sign. Different operations pick up different NaNs.
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*/
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#define _FP_CHOOSENAN(fs, wc, R, X, Y, OP) \
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do { \
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if (_FP_FRAC_GT_##wc(X, Y) \
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|| (_FP_FRAC_EQ_##wc(X,Y) && (OP == '+' || OP == '*'))) \
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{ \
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R##_s = X##_s; \
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_FP_FRAC_COPY_##wc(R,X); \
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} \
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else \
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{ \
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R##_s = Y##_s; \
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_FP_FRAC_COPY_##wc(R,Y); \
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} \
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R##_c = FP_CLS_NAN; \
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} while (0)
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#define FP_EX_INVALID (1 << 0)
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#define FP_EX_DENORM (1 << 1)
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#define FP_EX_DIVZERO (1 << 2)
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#define FP_EX_OVERFLOW (1 << 3)
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#define FP_EX_UNDERFLOW (1 << 4)
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#define FP_EX_INEXACT (1 << 5)
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#define FP_RND_NEAREST 0
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#define FP_RND_ZERO 3
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#define FP_RND_PINF 2
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#define FP_RND_MINF 1
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