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07c3d1ec03
Emag is a 64-bit CPU core released by AmpereComputing.
Add its name to cpu list, and corresponding macro as utilities for
later IFUNC dispatch.
* manual/tunables.texi (Tunable glibc.cpu.name): Add emag.
* sysdeps/unix/sysv/linux/aarch64/cpu-features.c (cpu_list):
Add emag.
* sysdeps/unix/sysv/linux/aarch64/cpu-features.h (IS_EMAG):
New macro.
86 lines
2.3 KiB
C
86 lines
2.3 KiB
C
/* Initialize CPU feature data. AArch64 version.
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This file is part of the GNU C Library.
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Copyright (C) 2017-2019 Free Software Foundation, Inc.
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The GNU C Library is free software; you can redistribute it and/or
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modify it under the terms of the GNU Lesser General Public
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License as published by the Free Software Foundation; either
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version 2.1 of the License, or (at your option) any later version.
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The GNU C Library is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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Lesser General Public License for more details.
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You should have received a copy of the GNU Lesser General Public
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License along with the GNU C Library; if not, see
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<http://www.gnu.org/licenses/>. */
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#include <cpu-features.h>
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#include <sys/auxv.h>
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#include <elf/dl-hwcaps.h>
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#define DCZID_DZP_MASK (1 << 4)
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#define DCZID_BS_MASK (0xf)
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#if HAVE_TUNABLES
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struct cpu_list
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{
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const char *name;
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uint64_t midr;
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};
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static struct cpu_list cpu_list[] = {
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{"falkor", 0x510FC000},
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{"thunderxt88", 0x430F0A10},
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{"thunderx2t99", 0x431F0AF0},
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{"thunderx2t99p1", 0x420F5160},
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{"phecda", 0x680F0000},
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{"ares", 0x411FD0C0},
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{"emag", 0x503F0001},
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{"generic", 0x0}
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};
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static uint64_t
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get_midr_from_mcpu (const char *mcpu)
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{
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for (int i = 0; i < sizeof (cpu_list) / sizeof (struct cpu_list); i++)
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if (strcmp (mcpu, cpu_list[i].name) == 0)
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return cpu_list[i].midr;
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return UINT64_MAX;
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}
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#endif
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static inline void
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init_cpu_features (struct cpu_features *cpu_features)
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{
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register uint64_t midr = UINT64_MAX;
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#if HAVE_TUNABLES
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/* Get the tunable override. */
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const char *mcpu = TUNABLE_GET (glibc, cpu, name, const char *, NULL);
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if (mcpu != NULL)
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midr = get_midr_from_mcpu (mcpu);
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#endif
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/* If there was no useful tunable override, query the MIDR if the kernel
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allows it. */
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if (midr == UINT64_MAX)
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{
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if (GLRO (dl_hwcap) & HWCAP_CPUID)
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asm volatile ("mrs %0, midr_el1" : "=r"(midr));
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else
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midr = 0;
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}
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cpu_features->midr_el1 = midr;
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/* Check if ZVA is enabled. */
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unsigned dczid;
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asm volatile ("mrs %0, dczid_el0" : "=r"(dczid));
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if ((dczid & DCZID_DZP_MASK) == 0)
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cpu_features->zva_size = 4 << (dczid & DCZID_BS_MASK);
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}
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