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I used these shell commands: ../glibc/scripts/update-copyrights $PWD/../gnulib/build-aux/update-copyright (cd ../glibc && git commit -am"[this commit message]") and then ignored the output, which consisted lines saying "FOO: warning: copyright statement not found" for each of 6694 files FOO. I then removed trailing white space from benchtests/bench-pthread-locks.c and iconvdata/tst-iconv-big5-hkscs-to-2ucs4.c, to work around this diagnostic from Savannah: remote: *** pre-commit check failed ... remote: *** error: lines with trailing whitespace found remote: error: hook declined to update refs/heads/master
108 lines
3.4 KiB
C
108 lines
3.4 KiB
C
/* Raise given exceptions.
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Copyright (C) 2000-2021 Free Software Foundation, Inc.
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This file is part of the GNU C Library.
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Contributed by Denis Joseph Barrow (djbarrow@de.ibm.com) and
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Martin Schwidefsky (schwidefsky@de.ibm.com).
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The GNU C Library is free software; you can redistribute it and/or
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modify it under the terms of the GNU Lesser General Public
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License as published by the Free Software Foundation; either
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version 2.1 of the License, or (at your option) any later version.
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The GNU C Library is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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Lesser General Public License for more details.
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You should have received a copy of the GNU Lesser General Public
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License along with the GNU C Library; if not, see
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<https://www.gnu.org/licenses/>. */
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#include <fenv_libc.h>
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#include <float.h>
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#include <math.h>
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static __inline__ void
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fexceptdiv (float d, float e)
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{
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__asm__ __volatile__ ("debr %0,%1" : : "f" (d), "f" (e) );
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}
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static __inline__ void
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fexceptadd (float d, float e)
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{
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__asm__ __volatile__ ("aebr %0,%1" : : "f" (d), "f" (e) );
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}
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#ifdef HAVE_S390_MIN_Z196_ZARCH_ASM_SUPPORT
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static __inline__ void
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fexceptround (double e)
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{
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float d;
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/* Load rounded from double to float with M3 = round toward 0, M4 = Suppress
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IEEE-inexact exception.
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In case of e=0x1p128 and the overflow-mask bit is zero, only the
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IEEE-overflow flag is set. If overflow-mask bit is one, DXC field is set to
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0x20 "IEEE overflow, exact".
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In case of e=0x1p-150 and the underflow-mask bit is zero, only the
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IEEE-underflow flag is set. If underflow-mask bit is one, DXC field is set
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to 0x10 "IEEE underflow, exact".
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This instruction is available with a zarch machine >= z196. */
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__asm__ __volatile__ ("ledbra %0,5,%1,4" : "=f" (d) : "f" (e) );
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}
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#endif
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int
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__feraiseexcept (int excepts)
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{
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/* Raise exceptions represented by EXPECTS. But we must raise only
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one signal at a time. It is important that if the overflow/underflow
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exception and the inexact exception are given at the same time,
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the overflow/underflow exception follows the inexact exception. */
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/* First: invalid exception. */
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if (FE_INVALID & excepts)
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fexceptdiv (0.0, 0.0);
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/* Next: division by zero. */
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if (FE_DIVBYZERO & excepts)
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fexceptdiv (1.0, 0.0);
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/* Next: overflow. */
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if (FE_OVERFLOW & excepts)
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{
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#ifdef HAVE_S390_MIN_Z196_ZARCH_ASM_SUPPORT
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fexceptround (0x1p128);
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#else
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/* If overflow-mask bit is zero, both IEEE-overflow and IEEE-inexact flags
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are set. If overflow-mask bit is one, DXC field is set to 0x2C "IEEE
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overflow, inexact and incremented". */
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fexceptadd (FLT_MAX, 1.0e32);
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#endif
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}
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/* Next: underflow. */
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if (FE_UNDERFLOW & excepts)
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{
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#ifdef HAVE_S390_MIN_Z196_ZARCH_ASM_SUPPORT
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fexceptround (0x1p-150);
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#else
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/* If underflow-mask bit is zero, both IEEE-underflow and IEEE-inexact
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flags are set. If underflow-mask bit is one, DXC field is set to 0x1C
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"IEEE underflow, inexact and incremented". */
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fexceptdiv (FLT_MIN, 3.0);
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#endif
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}
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/* Last: inexact. */
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if (FE_INEXACT & excepts)
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fexceptdiv (2.0, 3.0);
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/* Success. */
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return 0;
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}
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libm_hidden_def (__feraiseexcept)
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weak_alias (__feraiseexcept, feraiseexcept)
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libm_hidden_weak (feraiseexcept)
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