mirror of
https://sourceware.org/git/glibc.git
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5a82c74822
Also, change sources.redhat.com to sourceware.org.
This patch was automatically generated by running the following shell
script, which uses GNU sed, and which avoids modifying files imported
from upstream:
sed -ri '
s,(http|ftp)(://(.*\.)?(gnu|fsf|sourceware)\.org($|[^.]|\.[^a-z])),https\2,g
s,(http|ftp)(://(.*\.)?)sources\.redhat\.com($|[^.]|\.[^a-z]),https\2sourceware.org\4,g
' \
$(find $(git ls-files) -prune -type f \
! -name '*.po' \
! -name 'ChangeLog*' \
! -path COPYING ! -path COPYING.LIB \
! -path manual/fdl-1.3.texi ! -path manual/lgpl-2.1.texi \
! -path manual/texinfo.tex ! -path scripts/config.guess \
! -path scripts/config.sub ! -path scripts/install-sh \
! -path scripts/mkinstalldirs ! -path scripts/move-if-change \
! -path INSTALL ! -path locale/programs/charmap-kw.h \
! -path po/libc.pot ! -path sysdeps/gnu/errlist.c \
! '(' -name configure \
-execdir test -f configure.ac -o -f configure.in ';' ')' \
! '(' -name preconfigure \
-execdir test -f preconfigure.ac ';' ')' \
-print)
and then by running 'make dist-prepare' to regenerate files built
from the altered files, and then executing the following to cleanup:
chmod a+x sysdeps/unix/sysv/linux/riscv/configure
# Omit irrelevant whitespace and comment-only changes,
# perhaps from a slightly-different Autoconf version.
git checkout -f \
sysdeps/csky/configure \
sysdeps/hppa/configure \
sysdeps/riscv/configure \
sysdeps/unix/sysv/linux/csky/configure
# Omit changes that caused a pre-commit check to fail like this:
# remote: *** error: sysdeps/powerpc/powerpc64/ppc-mcount.S: trailing lines
git checkout -f \
sysdeps/powerpc/powerpc64/ppc-mcount.S \
sysdeps/unix/sysv/linux/s390/s390-64/syscall.S
# Omit change that caused a pre-commit check to fail like this:
# remote: *** error: sysdeps/sparc/sparc64/multiarch/memcpy-ultra3.S: last line does not end in newline
git checkout -f sysdeps/sparc/sparc64/multiarch/memcpy-ultra3.S
158 lines
3.8 KiB
ArmAsm
158 lines
3.8 KiB
ArmAsm
/* Copyright (C) 2001-2019 Free Software Foundation, Inc.
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This file is part of the GNU C Library.
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Contributed by David Mosberger-Tang <davidm@hpl.hp.com>.
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The GNU C Library is free software; you can redistribute it and/or
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modify it under the terms of the GNU Lesser General Public
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License as published by the Free Software Foundation; either
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version 2.1 of the License, or (at your option) any later version.
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The GNU C Library is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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Lesser General Public License for more details.
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You should have received a copy of the GNU Lesser General Public
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License along with the GNU C Library; if not, see
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<https://www.gnu.org/licenses/>. */
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#include <sysdep.h>
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#include <features.h>
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#include "ucontext_i.h"
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/* __getcontext (ucontext_t *ucp)
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Saves the machine context in UCP such that when it is activated,
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it appears as if __getcontext() returned again. The only difference
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is that on a first return, r9 contains 1 and on a subsequent
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return, it contains 0.
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This implementation in intended to be used for *synchronous* context
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switches only. Therefore, it does not have to save anything
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other than the PRESERVED state. */
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ENTRY(__getcontext)
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.prologue
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.body
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alloc r11 = ar.pfs, 1, 0, 4, 0
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// sigprocmask (SIG_BLOCK, NULL, &sc->sc_mask):
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mov r3 = SC_MASK
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mov out0 = SIG_BLOCK
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flushrs // save dirty partition on rbs
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mov out1 = 0
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add out2 = r3, in0
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mov out3 = 8 // sizeof kernel sigset_t
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DO_CALL(__NR_rt_sigprocmask)
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mov.m rFPSR = ar.fpsr
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mov.m rRSC = ar.rsc
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add r2 = SC_GR+1*8, r32
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;;
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mov.m rBSP = ar.bsp
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.prologue
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.save ar.unat, rUNAT
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mov.m rUNAT = ar.unat
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.body
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add r3 = SC_GR+4*8, r32
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;;
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.mem.offset 0,0; st8.spill [r2] = r1, (5*8 - 1*8)
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.mem.offset 8,0; st8.spill [r3] = r4, 16
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mov rPFS = r11
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;;
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.mem.offset 0,0; st8.spill [r2] = r5, 16
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.mem.offset 8,0; st8.spill [r3] = r6, 48
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and rTMP = ~0x3, rRSC
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;;
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.mem.offset 0,0; st8.spill [r2] = r7, (SC_FR+2*16-(SC_GR+7*8))
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.mem.offset 8,0; st8.spill [r3] = sp, (SC_FR+3*16-(SC_GR+12*8))
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;;
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mov.m ar.rsc = rTMP // put RSE into enforced lazy mode
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mov.m rNAT = ar.unat
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mov.i rLC = ar.lc
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;;
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mov.m rRNAT = ar.rnat
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mov.m ar.rsc = rRSC // restore RSE mode
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mov rPR = pr
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/*
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* Rotate NaT bits by rPOS positions to the right:
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*/
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stf.spill [r2] = f2, 32
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stf.spill [r3] = f3, 32
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add rPOS = SC_GR, r32 // rPOS <- &sc_gr[0]
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;;
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stf.spill [r2] = f4, (16*16-4*16)
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stf.spill [r3] = f5, (17*16-5*16)
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extr.u rPOS = rPOS, 3, 6 // get NaT bit number for r0
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;;
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stf.spill [r2] = f16, 32
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stf.spill [r3] = f17, 32
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sub rCPOS = 64, rPOS
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;;
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stf.spill [r2] = f18, 32
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stf.spill [r3] = f19, 32
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shr.u rTMP = rNAT, rPOS
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;;
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stf.spill [r2] = f20, 32
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stf.spill [r3] = f21, 32
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shl rNAT = rNAT, rCPOS
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;;
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stf.spill [r2] = f22, 32
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stf.spill [r3] = f23, 32
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or rNAT = rNAT, rTMP
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;;
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stf.spill [r2] = f24, 32
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stf.spill [r3] = f25, 32
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mov r8 = 0
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;;
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stf.spill [r2] = f26, 32
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stf.spill [r3] = f27, 32
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mov r9 = 1
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;;
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stf.spill [r2] = f28, 32
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stf.spill [r3] = f29, 32
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mov rB0 = b0
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;;
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stf.spill [r2] = f30, 32
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stf.spill [r3] = f31, 32
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mov rB1 = b1
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;;
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mov ar.unat = rUNAT // we're done spilling integer regs; restore caller's UNaT
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add r2 = SC_NAT, r32
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add r3 = SC_BSP, r32
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;;
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st8 [r2] = rNAT, (SC_RNAT-SC_NAT)
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st8 [r3] = rBSP, (SC_UNAT-SC_BSP)
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mov rB2 = b2
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;;
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st8 [r2] = rRNAT, (SC_FPSR-SC_RNAT)
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st8 [r3] = rUNAT, (SC_PFS-SC_UNAT)
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mov rB3 = b3
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;;
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st8 [r2] = rFPSR, (SC_LC-SC_FPSR)
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st8 [r3] = rPFS, (SC_PR-SC_PFS)
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mov rB4 = b4
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;;
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st8 [r2] = rLC, (SC_BR+0*8-SC_LC)
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st8 [r3] = rPR, (SC_BR+1*8-SC_PR)
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mov rB5 = b5
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;;
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st8 [r2] = rB0, 16
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st8 [r3] = rB1, 16
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;;
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st8 [r2] = rB2, 16
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st8 [r3] = rB3, 16
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;;
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st8 [r2] = rB4
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st8 [r3] = rB5
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ret
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END(__getcontext)
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weak_alias (__getcontext, getcontext)
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