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2ad7600be7
I've moved the MIPS port from ports to the main sysdeps hierarchy. Beyond the README update, the move of the files was simply git mv ports/sysdeps/mips sysdeps/mips git mv ports/sysdeps/unix/mips sysdeps/unix/mips git mv ports/sysdeps/unix/sysv/linux/mips sysdeps/unix/sysv/linux/mips and in addition to the ChangeLog entries here, I put a note at the top of ports/ChangeLog.mips similar to those in other files. Tested that disassembly of installed shared libraries for mips is the same before and after this patch (except for ld.so where paths in assertions are involved, as for arm). * sysdeps/mips: Move directory from ports/sysdeps/mips. * sysdeps/unix/mips: Move directory from ports/sysdeps/unix/mips. * sysdeps/unix/sysv/linux/mips: Move directory from ports/sysdeps/unix/sysv/linux/mips. * README: Update listing for mips-*-linux-gnu and mips64-*-linux-gnu. * sysdeps/mips: Move directory to ../sysdeps/mips. * sysdeps/unix/mips: Move directory to ../sysdeps/unix/mips. * sysdeps/unix/sysv/linux/mips: Move directory to ../sysdeps/unix/sysv/linux/mips.
215 lines
6.0 KiB
ArmAsm
215 lines
6.0 KiB
ArmAsm
/* Save and set current context.
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Copyright (C) 2009-2014 Free Software Foundation, Inc.
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This file is part of the GNU C Library.
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Contributed by Maciej W. Rozycki <macro@codesourcery.com>.
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The GNU C Library is free software; you can redistribute it and/or
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modify it under the terms of the GNU Lesser General Public
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License as published by the Free Software Foundation; either
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version 2.1 of the License, or (at your option) any later version.
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The GNU C Library is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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Lesser General Public License for more details.
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You should have received a copy of the GNU Lesser General Public
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License along with the GNU C Library. If not, see
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<http://www.gnu.org/licenses/>. */
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#include <sysdep.h>
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#include <sys/asm.h>
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#include <sys/fpregdef.h>
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#include <sys/regdef.h>
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#include "ucontext_i.h"
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/* int swapcontext (ucontext_t *oucp, const ucontext_t *ucp) */
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.text
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.set nomips16
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LOCALSZ = 0
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ARGSZ = 0
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MASK = 0x00000000
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#ifdef __PIC__
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LOCALSZ = 1 /* save gp */
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#endif
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#if _MIPS_SIM != _ABIO32
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ARGSZ = 1 /* save a1 */
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# ifdef __PIC__
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MASK = 0x10000000
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# endif
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#endif
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FRAMESZ = (((ARGSZ + LOCALSZ) * SZREG) + ALSZ) & ALMASK
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GPOFF = FRAMESZ - ((ARGSZ + 1) * SZREG)
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#if _MIPS_SIM != _ABIO32
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A1OFF = FRAMESZ - (1 * SZREG) /* callee-allocated */
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#else
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A1OFF = FRAMESZ + (1 * SZREG) /* caller-allocated */
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#endif
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NESTED (__swapcontext, FRAMESZ, ra)
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.mask MASK, -(ARGSZ * SZREG)
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.fmask 0x00000000, 0
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#ifdef __PIC__
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SETUP_GP
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move a2, sp
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# define _SP a2
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# if _MIPS_SIM != _ABIO32
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move a3, gp
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# define _GP a3
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# endif
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PTR_ADDIU sp, -FRAMESZ
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cfi_adjust_cfa_offset (FRAMESZ)
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SETUP_GP64_STACK (GPOFF, __swapcontext)
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SAVE_GP (GPOFF)
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#else /* ! __PIC__ */
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# define _SP sp
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# define _GP gp
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#endif /* ! __PIC__ */
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#ifdef PROF
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.set noat
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move AT, ra
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jal _mcount
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.set at
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#endif
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/* Store a magic flag. */
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li v1, 1
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REG_S v1, (0 * SZREG + MCONTEXT_GREGS)(a0) /* zero */
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REG_S s0, (16 * SZREG + MCONTEXT_GREGS)(a0)
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REG_S s1, (17 * SZREG + MCONTEXT_GREGS)(a0)
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REG_S s2, (18 * SZREG + MCONTEXT_GREGS)(a0)
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REG_S s3, (19 * SZREG + MCONTEXT_GREGS)(a0)
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REG_S s4, (20 * SZREG + MCONTEXT_GREGS)(a0)
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REG_S s5, (21 * SZREG + MCONTEXT_GREGS)(a0)
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REG_S s6, (22 * SZREG + MCONTEXT_GREGS)(a0)
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REG_S s7, (23 * SZREG + MCONTEXT_GREGS)(a0)
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#if ! defined (__PIC__) || _MIPS_SIM != _ABIO32
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REG_S _GP, (28 * SZREG + MCONTEXT_GREGS)(a0)
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#endif
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REG_S _SP, (29 * SZREG + MCONTEXT_GREGS)(a0)
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REG_S fp, (30 * SZREG + MCONTEXT_GREGS)(a0)
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REG_S ra, (31 * SZREG + MCONTEXT_GREGS)(a0)
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REG_S ra, MCONTEXT_PC(a0)
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#ifdef __mips_hard_float
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# if _MIPS_SIM == _ABI64
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s.d fs0, (24 * SZREG + MCONTEXT_FPREGS)(a0)
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s.d fs1, (25 * SZREG + MCONTEXT_FPREGS)(a0)
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s.d fs2, (26 * SZREG + MCONTEXT_FPREGS)(a0)
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s.d fs3, (27 * SZREG + MCONTEXT_FPREGS)(a0)
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s.d fs4, (28 * SZREG + MCONTEXT_FPREGS)(a0)
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s.d fs5, (29 * SZREG + MCONTEXT_FPREGS)(a0)
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s.d fs6, (30 * SZREG + MCONTEXT_FPREGS)(a0)
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s.d fs7, (31 * SZREG + MCONTEXT_FPREGS)(a0)
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# else /* _MIPS_SIM != _ABI64 */
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s.d fs0, (20 * SZREG + MCONTEXT_FPREGS)(a0)
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s.d fs1, (22 * SZREG + MCONTEXT_FPREGS)(a0)
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s.d fs2, (24 * SZREG + MCONTEXT_FPREGS)(a0)
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s.d fs3, (26 * SZREG + MCONTEXT_FPREGS)(a0)
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s.d fs4, (28 * SZREG + MCONTEXT_FPREGS)(a0)
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s.d fs5, (30 * SZREG + MCONTEXT_FPREGS)(a0)
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# endif /* _MIPS_SIM != _ABI64 */
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cfc1 v1, fcr31
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sw v1, MCONTEXT_FPC_CSR(a0)
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#endif /* __mips_hard_float */
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REG_S a1, A1OFF(sp)
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/* rt_sigprocmask (SIG_SETMASK, &ucp->uc_sigmask, &oucp->uc_sigmask, _NSIG8) */
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li a3, _NSIG8
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PTR_ADDU a2, a0, UCONTEXT_SIGMASK
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PTR_ADDU a1, a1, UCONTEXT_SIGMASK
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li a0, SIG_SETMASK
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li v0, SYS_ify (rt_sigprocmask)
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syscall
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bnez a3, 99f
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REG_L v0, A1OFF(sp)
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#ifdef __mips_hard_float
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# if _MIPS_SIM == _ABI64
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l.d fs0, (24 * SZREG + MCONTEXT_FPREGS)(v0)
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l.d fs1, (25 * SZREG + MCONTEXT_FPREGS)(v0)
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l.d fs2, (26 * SZREG + MCONTEXT_FPREGS)(v0)
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l.d fs3, (27 * SZREG + MCONTEXT_FPREGS)(v0)
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l.d fs4, (28 * SZREG + MCONTEXT_FPREGS)(v0)
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l.d fs5, (29 * SZREG + MCONTEXT_FPREGS)(v0)
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l.d fs6, (30 * SZREG + MCONTEXT_FPREGS)(v0)
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l.d fs7, (31 * SZREG + MCONTEXT_FPREGS)(v0)
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# else /* _MIPS_SIM != _ABI64 */
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l.d fs0, (20 * SZREG + MCONTEXT_FPREGS)(v0)
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l.d fs1, (22 * SZREG + MCONTEXT_FPREGS)(v0)
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l.d fs2, (24 * SZREG + MCONTEXT_FPREGS)(v0)
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l.d fs3, (26 * SZREG + MCONTEXT_FPREGS)(v0)
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l.d fs4, (28 * SZREG + MCONTEXT_FPREGS)(v0)
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l.d fs5, (30 * SZREG + MCONTEXT_FPREGS)(v0)
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# endif /* _MIPS_SIM != _ABI64 */
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lw v1, MCONTEXT_FPC_CSR(v0)
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ctc1 v1, fcr31
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#endif /* __mips_hard_float */
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/* Note the contents of argument registers will be random
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unless makecontext() has been called. */
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REG_L a0, (4 * SZREG + MCONTEXT_GREGS)(v0)
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REG_L a1, (5 * SZREG + MCONTEXT_GREGS)(v0)
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REG_L a2, (6 * SZREG + MCONTEXT_GREGS)(v0)
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REG_L a3, (7 * SZREG + MCONTEXT_GREGS)(v0)
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#if _MIPS_SIM != _ABIO32
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REG_L a4, (8 * SZREG + MCONTEXT_GREGS)(v0)
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REG_L a5, (9 * SZREG + MCONTEXT_GREGS)(v0)
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REG_L a6, (10 * SZREG + MCONTEXT_GREGS)(v0)
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REG_L a7, (11 * SZREG + MCONTEXT_GREGS)(v0)
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#endif
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REG_L s0, (16 * SZREG + MCONTEXT_GREGS)(v0)
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REG_L s1, (17 * SZREG + MCONTEXT_GREGS)(v0)
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REG_L s2, (18 * SZREG + MCONTEXT_GREGS)(v0)
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REG_L s3, (19 * SZREG + MCONTEXT_GREGS)(v0)
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REG_L s4, (20 * SZREG + MCONTEXT_GREGS)(v0)
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REG_L s5, (21 * SZREG + MCONTEXT_GREGS)(v0)
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REG_L s6, (22 * SZREG + MCONTEXT_GREGS)(v0)
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REG_L s7, (23 * SZREG + MCONTEXT_GREGS)(v0)
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#if ! defined (__PIC__) || _MIPS_SIM != _ABIO32
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REG_L gp, (28 * SZREG + MCONTEXT_GREGS)(v0)
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#endif
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REG_L sp, (29 * SZREG + MCONTEXT_GREGS)(v0)
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REG_L fp, (30 * SZREG + MCONTEXT_GREGS)(v0)
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REG_L ra, (31 * SZREG + MCONTEXT_GREGS)(v0)
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REG_L t9, MCONTEXT_PC(v0)
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move v0, zero
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jr t9
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99:
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#ifdef __PIC__
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PTR_LA t9, JUMPTARGET (__syscall_error)
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RESTORE_GP64_STACK
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PTR_ADDIU sp, FRAMESZ
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cfi_adjust_cfa_offset (-FRAMESZ)
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jr t9
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#else /* ! __PIC__ */
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j JUMPTARGET (__syscall_error)
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#endif /* ! __PIC__ */
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PSEUDO_END (__swapcontext)
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weak_alias (__swapcontext, swapcontext)
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