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aeb25823d8
2002-06-05 Brian Youmans <3diff@gnu.org> * sysdeps/ia64/fpu/e_acos.S: Added text of Intel license. * sysdeps/ia64/fpu/e_acosf.S: Likewise. * sysdeps/ia64/fpu/e_acosl.S: Likewise. * sysdeps/ia64/fpu/e_asin.S: Likewise. * sysdeps/ia64/fpu/e_asinf.S: Likewise. * sysdeps/ia64/fpu/e_asinl.S: Likewise. * sysdeps/ia64/fpu/e_atan2.S: Likewise. * sysdeps/ia64/fpu/e_atan2f.S: Likewise. * sysdeps/ia64/fpu/e_cosh.S: Likewise. * sysdeps/ia64/fpu/e_coshf.S: Likewise. * sysdeps/ia64/fpu/e_coshl.S: Likewise. * sysdeps/ia64/fpu/e_exp.S: Likewise. * sysdeps/ia64/fpu/e_expf.S: Likewise. * sysdeps/ia64/fpu/e_fmod.S: Likewise. * sysdeps/ia64/fpu/e_fmodf.S: Likewise. * sysdeps/ia64/fpu/e_fmodl.S: Likewise. * sysdeps/ia64/fpu/e_hypot.S: Likewise. * sysdeps/ia64/fpu/e_hypotf.S: Likewise. * sysdeps/ia64/fpu/e_hypotl.S: Likewise. * sysdeps/ia64/fpu/e_log.S: Likewise. * sysdeps/ia64/fpu/e_logf.S: Likewise. * sysdeps/ia64/fpu/e_pow.S: Likewise. * sysdeps/ia64/fpu/e_powf.S: Likewise. * sysdeps/ia64/fpu/e_powl.S: Likewise. * sysdeps/ia64/fpu/e_remainder.S: Likewise. * sysdeps/ia64/fpu/e_remainderf.S: Likewise. * sysdeps/ia64/fpu/e_remainderl.S: Likewise. * sysdeps/ia64/fpu/e_scalb.S: Likewise. * sysdeps/ia64/fpu/e_scalbf.S: Likewise. * sysdeps/ia64/fpu/e_scalbl.S: Likewise. * sysdeps/ia64/fpu/e_sinh.S: Likewise. * sysdeps/ia64/fpu/e_sinhf.S: Likewise. * sysdeps/ia64/fpu/e_sinhl.S: Likewise. * sysdeps/ia64/fpu/e_sqrt.S: Likewise. * sysdeps/ia64/fpu/e_sqrtf.S: Likewise. * sysdeps/ia64/fpu/e_sqrtl.S: Likewise. * sysdeps/ia64/fpu/libm_atan2_req.S: Likewise. * sysdeps/ia64/fpu/libm_error.c: Likewise. * sysdeps/ia64/fpu/libm_frexp4.S: Likewise. * sysdeps/ia64/fpu/libm_frexp4f.S: Likewise. * sysdeps/ia64/fpu/s_frexpl.c: Likewise. * sysdeps/ia64/fpu/s_ilogb.S: Likewise. * sysdeps/ia64/fpu/s_ilogbf.S: Likewise. * sysdeps/ia64/fpu/s_ilogbl.S: Likewise. * sysdeps/ia64/fpu/s_ldexp.S: Likewise. * sysdeps/ia64/fpu/s_ldexpf.S: Likewise. * sysdeps/ia64/fpu/s_ldexpl.S: Likewise. * sysdeps/ia64/fpu/s_log1p.S: Likewise. * sysdeps/ia64/fpu/s_log1pf.S: Likewise. * sysdeps/ia64/fpu/s_log1pl.S: Likewise. * sysdeps/ia64/fpu/s_logb.S: Likewise. * sysdeps/ia64/fpu/s_logbf.S: Likewise. * sysdeps/ia64/fpu/s_logbl.S: Likewise. * sysdeps/ia64/fpu/s_modf.S: Likewise. * sysdeps/ia64/fpu/s_modff.S: Likewise. * sysdeps/ia64/fpu/s_modfl.S: Likewise. * sysdeps/ia64/fpu/s_nearbyint.S: Likewise. * sysdeps/ia64/fpu/s_nearbyintf.S: Likewise. * sysdeps/ia64/fpu/s_nearbyintl.S: Likewise. * sysdeps/ia64/fpu/s_rint.S: Likewise. * sysdeps/ia64/fpu/s_rintf.S: Likewise. * sysdeps/ia64/fpu/s_rintl.S: Likewise. * sysdeps/ia64/fpu/s_round.S: Likewise. * sysdeps/ia64/fpu/s_roundf.S: Likewise. * sysdeps/ia64/fpu/s_roundl.S: Likewise. * sysdeps/ia64/fpu/s_scalbn.S: Likewise. * sysdeps/ia64/fpu/s_scalbnf.S: Likewise. * sysdeps/ia64/fpu/s_scalbnl.S: Likewise. * sysdeps/ia64/fpu/s_significand.S: Likewise. * sysdeps/ia64/fpu/s_significandf.S: Likewise. * sysdeps/ia64/fpu/s_significandl.S: Likewise. * sysdeps/ia64/fpu/s_tan.S: Likewise. * sysdeps/ia64/fpu/s_tanf.S: Likewise. * sysdeps/ia64/fpu/s_tanl.S: Likewise. * sysdeps/ia64/fpu/s_trunc.S: Likewise. * sysdeps/ia64/fpu/s_truncf.S: Likewise. * sysdeps/ia64/fpu/s_truncl.S: Likewise. * sysdeps/ieee754/dbl-64/doasin.c: Changed copyright notice to reflect IBM donation of math library to FSF * sysdeps/ieee754/dbl-64/dosincos.c: Likewise. * sysdeps/ieee754/dbl-64/e_asin.c: Likewise. * sysdeps/ieee754/dbl-64/e_atan2.c: Likewise. * sysdeps/ieee754/dbl-64/e_exp.c: Likewise. * sysdeps/ieee754/dbl-64/e_log.c: Likewise. * sysdeps/ieee754/dbl-64/e_pow.c: Likewise. * sysdeps/ieee754/dbl-64/e_remainder.c: Likewise. * sysdeps/ieee754/dbl-64/e_sqrt.c: Likewise. * sysdeps/ieee754/dbl-64/halfulp.c: Likewise. * sysdeps/ieee754/dbl-64/mpa.c: Likewise. * sysdeps/ieee754/dbl-64/mpatan.c: Likewise. * sysdeps/ieee754/dbl-64/mpatan2.c: Likewise. * sysdeps/ieee754/dbl-64/mpexp.c: Likewise. * sysdeps/ieee754/dbl-64/mplog.c: Likewise. * sysdeps/ieee754/dbl-64/mpsqrt.c: Likewise. * sysdeps/ieee754/dbl-64/mptan.c: Likewise. * sysdeps/ieee754/dbl-64/s_atan.c: Likewise. * sysdeps/ieee754/dbl-64/s_sin.c: Likewise. * sysdeps/ieee754/dbl-64/s_tan.c: Likewise. * sysdeps/ieee754/dbl-64/sincos32.c: Likewise. * sysdeps/ieee754/dbl-64/slowexp.c: Likewise. * sysdeps/ieee754/dbl-64/slowpow.c: Likewise. * sysdeps/gnu/netinet/udp.h: Added BSD copying permission notice * sysdeps/vax/__longjmp.c: Likewise. * sysdeps/vax/setjmp.c: Likewise. * libio/filedoalloc.c: Fixed BSD copying permission notice to remove advertising clause * sysdeps/vax/htonl.s: Likewise. * sysdeps/vax/htons.s: Likewise. * libio/wfiledoalloc.c: Likewise. * stdlib/random.c: Likewise. * stdlib/random_r.c: Likewise. * sysdeps/mach/sys/reboot.h: Likewise. * inet/getnameinfo.c: Deleted advertising clause from Inner Net License * sysdeps/posix/getaddrinfo.c: Likewise. * sunrpc/des_impl.c: Updated license permission notice to Lesser GPL and corrected pointer to point to the correct license.
408 lines
9.0 KiB
ArmAsm
408 lines
9.0 KiB
ArmAsm
.file "hypotf.asm"
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// Copyright (C) 2000, 2001, Intel Corporation
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// All rights reserved.
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//
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// Contributed 2/2/2000 by John Harrison, Cristina Iordache, Ted Kubaska,
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// Bob Norin, Shane Story, and Ping Tak Peter Tang of the
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// Computational Software Lab, Intel Corporation.
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//
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// Redistribution and use in source and binary forms, with or without
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// modification, are permitted provided that the following conditions are
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// met:
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//
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// * Redistributions of source code must retain the above copyright
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// notice, this list of conditions and the following disclaimer.
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//
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// * Redistributions in binary form must reproduce the above copyright
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// notice, this list of conditions and the following disclaimer in the
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// documentation and/or other materials provided with the distribution.
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//
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// * The name of Intel Corporation may not be used to endorse or promote
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// products derived from this software without specific prior written
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// permission.
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//
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// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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// "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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// LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
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// A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL INTEL OR ITS
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// CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
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// EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
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// PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR
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// PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY
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// OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY OR TORT (INCLUDING
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// NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
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// SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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//
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// Intel Corporation is the author of this code, and requests that all
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// problem reports or change requests be submitted to it directly at
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// http://developer.intel.com/opensource.
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//
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// *********************************************************************
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//
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// History:
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// 2/02/00 hand-optimized
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// 4/04/00 Unwind support added
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// 6/26/00 new version
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// 8/15/00 Bundle added after call to __libm_error_support to properly
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// set [the previously overwritten] GR_Parameter_RESULT.
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//
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// *********************************************************************
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// ___________
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// Function: hypotf(x,y) = |(x^2 + y^2) = for single precision values
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// x and y
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// Also provides cabsf functionality.
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//
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// *********************************************************************
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//
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// Resources Used:
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//
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// Floating-Point Registers: f8 (Input and Return Value)
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// f9 (Input)
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// f6 -f15
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//
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// General Purpose Registers:
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// r2-r3 (Scratch)
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// r32-r36 (Locals)
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// r37-r40 (Used to pass arguments to error handling routine)
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//
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// Predicate Registers: p6 - p10
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//
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// *********************************************************************
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//
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// IEEE Special Conditions:
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//
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// All faults and exceptions should be raised correctly.
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// Overflow can occur.
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// hypotf(Infinity and anything) = +Infinity
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// hypotf(QNaN and anything) = QNaN
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// hypotf(SNaN and anything ) = QNaN
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//
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// *********************************************************************
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//
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// Implementation:
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// x2 = x * x in double-extended
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// y2 = y * y in double-extended
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// temp = x2 + y2 in double-extended
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// sqrt(temp) rounded to single precision
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//
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// *********************************************************************
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#include "libm_support.h"
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GR_SAVE_PFS = r33
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GR_SAVE_B0 = r34
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GR_SAVE_GP = r35
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GR_Parameter_X = r36
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GR_Parameter_Y = r37
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GR_Parameter_RESULT = r38
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GR_Parameter_TAG = r39
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FR_X = f14
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FR_Y = f15
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FR_RESULT = f8
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.section .text
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#ifndef _LIBC
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.proc cabsf#
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.global cabsf#
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cabsf:
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.endp cabsf
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#endif
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.proc hypotf#
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.global hypotf#
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.align 64
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hypotf:
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#ifdef _LIBC
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.global __hypotf
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__hypotf:
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.global __ieee754_hypotf
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__ieee754_hypotf:
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#endif
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{.mfi
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alloc r32= ar.pfs,0,4,4,0
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// Compute x*x
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fma.s1 f10=f8,f8,f0
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// r2=bias-1
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mov r2=0xfffe
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}
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{.mfi
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nop.m 0
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// y*y
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fma.s1 f11=f9,f9,f0
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nop.i 0;;
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}
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{ .mfi
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nop.m 0
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// Check if x is an Inf - if so return Inf even
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// if y is a NaN (C9X)
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fclass.m.unc p7, p6 = f8, 0x023
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nop.i 0
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}
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{.mfi
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nop.m 0
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// if possible overflow, copy f8 to f14
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// set Denormal, if necessary
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// (p8)
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fma.s.s0 f14=f8,f1,f0
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nop.i 0;;
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}
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{ .mfi
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nop.m 0
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// Check if y is an Inf - if so return Inf even
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// if x is a NaN (C9X)
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fclass.m.unc p8, p9 = f9, 0x023
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nop.i 0
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}
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{ .mfi
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nop.m 0
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// For x=inf, multiply y by 1 to raise invalid on y an SNaN
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// (p7) fma.s0 f9=f9,f1,f0
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// copy f9 to f15; set Denormal, if necessary
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fma.s.s0 f15=f9,f1,f0
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nop.i 0;;
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}
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{.mfi
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nop.m 0
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// is y Zero ?
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(p6) fclass.m p6,p0=f9,0x7
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nop.i 0;;
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}
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{.mfi
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nop.m 0
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// is x Zero ?
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(p9) fclass.m p9,p0=f8,0x7
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nop.i 0;;
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}
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{.mfi
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// f7=0.5
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setf.exp f7=r2
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// a=x2+y2
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fma.s1 f12=f10,f1,f11
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nop.i 0;;
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}
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{.mfi
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nop.m 0
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// x not NaN ?
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(p6) fclass.m p7,p0=f8,0x3f
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nop.i 0
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}
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{.mfi
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// 2*emax-2
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mov r2=0x100fb
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// f6=2
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fma.s1 f6=f1,f1,f1
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nop.i 0;;
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}
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{.mfi
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nop.m 0
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// y not NaN ?
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(p9) fclass.m p8,p0=f9,0x3f
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nop.i 0;;
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}
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{.mfb
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nop.m 0
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// if f8=Infinity or f9=Zero, return |f8|
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(p7) fmerge.s f8=f0,f14
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(p7) br.ret.spnt b0
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}
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{.mfb
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nop.m 0
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// if f9=Infinity or f8=Zero, return |f9|
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(p8) fmerge.s f8=f0,f15
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(p8) br.ret.spnt b0;;
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}
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{ .mfi
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nop.m 0
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// Identify Natvals, Infs, NaNs, and Zeros
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// and return result
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fclass.m.unc p7, p0 = f12, 0x1E7
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nop.i 0
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}
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{.mfi
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nop.m 0
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// z0=frsqrta(a)
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frsqrta.s1 f8,p6=f12
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nop.i 0;;
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}
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{.mfb
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// get exponent of x^2+y^2
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getf.exp r3=f12
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// if special case, set f8
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(p7) mov f8=f12
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(p7) br.ret.spnt b0;;
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}
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{.mfi
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nop.m 0
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// S0=a*z0
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(p6) fma.s1 f12=f12,f8,f0
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nop.i 0
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}
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{.mfi
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nop.m 0
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// H0=0.5*z0
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(p6) fma.s1 f10=f8,f7,f0
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nop.i 0;;
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}
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{.mfi
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nop.m 0
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// f6=5/2
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fma.s1 f6=f7,f1,f6
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nop.i 0
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}
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{.mfi
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nop.m 0
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// f11=3/2
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fma.s1 f11=f7,f1,f1
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nop.i 0;;
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}
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{.mfi
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nop.m 0
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// d=0.5-S0*H0
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(p6) fnma.s1 f7=f12,f10,f7
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nop.i 0;;
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}
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{.mfi
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nop.m 0
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// P01=d+1
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(p6) fma.s1 f10=f1,f7,f1
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nop.i 0
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}
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{.mfi
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nop.m 0
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// P23=5/2*d+3/2
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(p6) fma.s1 f11=f6,f7,f11
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nop.i 0;;
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}
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{.mfi
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nop.m 0
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// d2=d*d
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(p6) fma.s1 f7=f7,f7,f0
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nop.i 0;;
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}
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{.mfi
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// Is x^2 + y^2 well less than the overflow
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// threshold?
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(p6) cmp.lt.unc p7, p8 = r3,r2
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// P=P01+d2*P23
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(p6) fma.s1 f10=f7,f11,f10
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nop.i 0;;
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}
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{.mfb
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nop.m 0
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// S=P*S0
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fma.s.s0 f8=f10,f12,f0
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// No overflow in this case
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(p7) br.ret.sptk b0;;
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}
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{ .mfi
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nop.m 0
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(p8) fsetc.s2 0x7F,0x42
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// Possible overflow path, must detect by
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// Setting widest range exponent with prevailing
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// rounding mode.
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nop.i 0 ;;
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}
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{ .mfi
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// bias+0x400 (bias+EMAX+1)
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(p8) mov r2=0x1007f
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// S=P*S0
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(p8) fma.s.s2 f12=f10,f12,f0
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nop.i 0 ;;
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}
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{ .mfi
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(p8) setf.exp f11 = r2
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(p8) fsetc.s2 0x7F,0x40
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// Restore Original Mode in S2
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nop.i 0 ;;
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}
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{ .mfi
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nop.m 0
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(p8) fcmp.lt.unc.s1 p9, p10 = f12, f11
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nop.i 0 ;;
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}
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{ .mib
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nop.m 0
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mov GR_Parameter_TAG = 47
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// No overflow
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(p9) br.ret.sptk b0;;
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}
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.endp hypotf
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ASM_SIZE_DIRECTIVE(hypotf)
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.proc __libm_error_region
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__libm_error_region:
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.prologue
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{ .mii
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add GR_Parameter_Y=-32,sp // Parameter 2 value
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(p0) mov GR_Parameter_TAG = 47
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.save ar.pfs,GR_SAVE_PFS
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mov GR_SAVE_PFS=ar.pfs // Save ar.pfs
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}
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{ .mfi
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.fframe 64
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add sp=-64,sp // Create new stack
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nop.f 0
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mov GR_SAVE_GP=gp // Save gp
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};;
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{ .mmi
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stfs [GR_Parameter_Y] = FR_Y,16 // Store Parameter 2 on stack
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add GR_Parameter_X = 16,sp // Parameter 1 address
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.save b0, GR_SAVE_B0
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mov GR_SAVE_B0=b0 // Save b0
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};;
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.body
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{ .mib
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stfs [GR_Parameter_X] = FR_X // Store Parameter 1 on stack
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add GR_Parameter_RESULT = 0,GR_Parameter_Y
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nop.b 0 // Parameter 3 address
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}
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{ .mib
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stfs [GR_Parameter_Y] = FR_RESULT // Store Parameter 3 on stack
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add GR_Parameter_Y = -16,GR_Parameter_Y
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br.call.sptk b0=__libm_error_support# // Call error handling function
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};;
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{ .mmi
|
|
nop.m 0
|
|
nop.m 0
|
|
add GR_Parameter_RESULT = 48,sp
|
|
};;
|
|
{ .mmi
|
|
ldfs f8 = [GR_Parameter_RESULT] // Get return result off stack
|
|
.restore sp
|
|
add sp = 64,sp // Restore stack pointer
|
|
mov b0 = GR_SAVE_B0 // Restore return address
|
|
};;
|
|
{ .mib
|
|
mov gp = GR_SAVE_GP // Restore gp
|
|
mov ar.pfs = GR_SAVE_PFS // Restore ar.pfs
|
|
br.ret.sptk b0 // Return
|
|
};;
|
|
|
|
.endp __libm_error_region
|
|
ASM_SIZE_DIRECTIVE(__libm_error_region)
|
|
|
|
.type __libm_error_support#,@function
|
|
.global __libm_error_support#
|