glibc/sysdeps/mips/bits/fenv.h
Joseph Myers 506d7fb1d4 Do not define various fenv.h macros for MIPS soft-float (bug 23479).
MIPS soft-float glibc does not support floating-point exceptions and
rounding modes, and uses a different ABI from hard-float so a
soft-float compilation cannot use a glibc that does support
floating-point exceptions and rounding modes.  Thus, bits/fenv.h
should not, when compiling for soft-float, define macros for the
unsupported features.

This patch changes it accordingly to define those macros only for
hard-float.  None of the exception macros are defined for soft-float,
with FE_ALL_EXCEPT defined to 0 in that case, and only FE_TONEAREST is
defined of the rounding-mode macros, and FE_NOMASK_ENV is not defined;
this is consistent with how architectures lacking exception and
rounding mode support generally define things in this header.  As well
as making the header more correct for this case, this also means the
generic math_private.h optimizations for this case automatically apply
(inlining libm-internal fenv.h function calls that are trivial when
exceptions and rounding modes are not supported).

The mips64 sfp-machine.h then needs similar changes to disable more of
the exception and rounding mode handling for soft-float.  (The mips32
sfp-machine.h is already used only for soft-float, has no integration
with hardware exceptions or rounding modes and so needs no changes.)

Existing binaries might use the old FE_NOMASK_ENV value as an argument
to fesetenv / feupdateenv and expect an error for it (given that it
was defined in a header that also defined FE_ALL_EXCEPT to a nonzero
value).  To preserve that error, wrappers for the fallback fesetenv
and feupdateenv are created in sysdeps/mips/nofpu/.

Tested for mips64 (hard-float and soft-float, all three ABIs).

	[BZ #23479]
	* sysdeps/mips/bits/fenv.h (FE_INEXACT): Define only if
	[__mips_hard_float].
	(FE_UNDERFLOW): Likewise.
	(FE_OVERFLOW): Likewise.
	(FE_DIVBYZERO): Likewise.
	(FE_INVALID): Likewise.
	(FE_ALL_EXCEPT): Define to 0 if [!__mips_hard_float].
	(FE_TOWARDZERO): Define only if [__mips_hard_float].
	(FE_UPWARD): Likewise.
	(FE_DOWNWARD): Likewise.
	(__FE_UNDEFINED): Define if [!__mips_hard_float]
	(FE_NOMASK_ENV): Define only if [__mips_hard_float].
	* sysdeps/mips/mips64/sfp-machine.h (_FP_DECL_EX): Define only if
	[__mips_hard_float].
	(FP_ROUNDMODE): Likewise.
	(FP_RND_NEAREST): Likewise.
	(FP_RND_ZERO): Likewise.
	(FP_RND_PINF): Likewise.
	(FP_RND_MINF): Likewise.
	(FP_EX_INVALID): Likewise.
	(FP_EX_OVERFLOW): Likewise.
	(FP_EX_UNDERFLOW): Likewise.
	(FP_EX_DIVZERO): Likewise.
	(FP_EX_INEXACT): Likewise.
	(FP_INIT_ROUNDMODE): Likewise.
	* sysdeps/mips/nofpu/fesetenv.c: New file.
	* sysdeps/mips/nofpu/feupdateenv.c: Likewise.
2018-08-02 15:53:29 +00:00

114 lines
2.9 KiB
C

/* Copyright (C) 1998-2018 Free Software Foundation, Inc.
This file is part of the GNU C Library.
The GNU C Library is free software; you can redistribute it and/or
modify it under the terms of the GNU Lesser General Public
License as published by the Free Software Foundation; either
version 2.1 of the License, or (at your option) any later version.
The GNU C Library is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
Lesser General Public License for more details.
You should have received a copy of the GNU Lesser General Public
License along with the GNU C Library. If not, see
<http://www.gnu.org/licenses/>. */
#ifndef _FENV_H
# error "Never use <bits/fenv.h> directly; include <fenv.h> instead."
#endif
#ifdef __mips_hard_float
/* Define bits representing the exception. We use the bit positions
of the appropriate bits in the FPU control word. */
enum
{
FE_INEXACT =
# define FE_INEXACT 0x04
FE_INEXACT,
FE_UNDERFLOW =
# define FE_UNDERFLOW 0x08
FE_UNDERFLOW,
FE_OVERFLOW =
# define FE_OVERFLOW 0x10
FE_OVERFLOW,
FE_DIVBYZERO =
# define FE_DIVBYZERO 0x20
FE_DIVBYZERO,
FE_INVALID =
# define FE_INVALID 0x40
FE_INVALID,
};
# define FE_ALL_EXCEPT \
(FE_INEXACT | FE_DIVBYZERO | FE_UNDERFLOW | FE_OVERFLOW | FE_INVALID)
/* The MIPS FPU supports all of the four defined rounding modes. We
use again the bit positions in the FPU control word as the values
for the appropriate macros. */
enum
{
FE_TONEAREST =
# define FE_TONEAREST 0x0
FE_TONEAREST,
FE_TOWARDZERO =
# define FE_TOWARDZERO 0x1
FE_TOWARDZERO,
FE_UPWARD =
# define FE_UPWARD 0x2
FE_UPWARD,
FE_DOWNWARD =
# define FE_DOWNWARD 0x3
FE_DOWNWARD
};
#else
/* In the soft-float case, only rounding to nearest is supported, with
no exceptions. */
enum
{
__FE_UNDEFINED = -1,
FE_TONEAREST =
# define FE_TONEAREST 0x0
FE_TONEAREST
};
# define FE_ALL_EXCEPT 0
#endif
/* Type representing exception flags. */
typedef unsigned short int fexcept_t;
/* Type representing floating-point environment. This function corresponds
to the layout of the block written by the `fstenv'. */
typedef struct
{
unsigned int __fp_control_register;
}
fenv_t;
/* If the default argument is used we use this value. */
#define FE_DFL_ENV ((const fenv_t *) -1)
#if defined __USE_GNU && defined __mips_hard_float
/* Floating-point environment where none of the exception is masked. */
# define FE_NOMASK_ENV ((const fenv_t *) -2)
#endif
#if __GLIBC_USE (IEC_60559_BFP_EXT)
/* Type representing floating-point control modes. */
typedef unsigned int femode_t;
/* Default floating-point control modes. */
# define FE_DFL_MODE ((const femode_t *) -1L)
#endif