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95e114a091
The rseq area is placed directly into struct pthread. rseq registration failure is not treated as an error, so it is possible that threads run with inconsistent registration status. <sys/rseq.h> is not yet installed as a public header. Co-Authored-By: Mathieu Desnoyers <mathieu.desnoyers@efficios.com> Reviewed-by: Szabolcs Nagy <szabolcs.nagy@arm.com> Reviewed-by: Siddhesh Poyarekar <siddhesh@sourceware.org>
63 lines
2.1 KiB
C
63 lines
2.1 KiB
C
/* Restartable Sequences Linux mips architecture header.
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Copyright (C) 2021 Free Software Foundation, Inc.
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The GNU C Library is free software; you can redistribute it and/or
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modify it under the terms of the GNU Lesser General Public
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License as published by the Free Software Foundation; either
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version 2.1 of the License, or (at your option) any later version.
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The GNU C Library is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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Lesser General Public License for more details.
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You should have received a copy of the GNU Lesser General Public
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License along with the GNU C Library; if not, see
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<https://www.gnu.org/licenses/>. */
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#ifndef _SYS_RSEQ_H
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# error "Never use <bits/rseq.h> directly; include <sys/rseq.h> instead."
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#endif
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/* RSEQ_SIG is a signature required before each abort handler code.
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It is a 32-bit value that maps to actual architecture code compiled
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into applications and libraries. It needs to be defined for each
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architecture. When choosing this value, it needs to be taken into
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account that generating invalid instructions may have ill effects on
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tools like objdump, and may also have impact on the CPU speculative
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execution efficiency in some cases.
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RSEQ_SIG uses the break instruction. The instruction pattern is:
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On MIPS:
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0350000d break 0x350
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On nanoMIPS:
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00100350 break 0x350
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On microMIPS:
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0000d407 break 0x350
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For nanoMIPS32 and microMIPS, the instruction stream is encoded as
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16-bit halfwords, so the signature halfwords need to be swapped
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accordingly for little-endian. */
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#if defined (__nanomips__)
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# ifdef __MIPSEL__
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# define RSEQ_SIG 0x03500010
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# else
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# define RSEQ_SIG 0x00100350
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# endif
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#elif defined (__mips_micromips)
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# ifdef __MIPSEL__
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# define RSEQ_SIG 0xd4070000
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# else
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# define RSEQ_SIG 0x0000d407
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# endif
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#elif defined (__mips__)
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# define RSEQ_SIG 0x0350000d
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#else
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/* Unknown MIPS architecture. */
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#endif
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