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7900ac490d
Rearrange operations so MOV is not necessary in reduction or around the special-case handler. Reduce memory access by using more indexed MLAs in polynomial. Reviewed-by: Wilco Dijkstra <Wilco.Dijkstra@arm.com>
84 lines
3.0 KiB
C
84 lines
3.0 KiB
C
/* Single-precision vector (Advanced SIMD) tanh function
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Copyright (C) 2024 Free Software Foundation, Inc.
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This file is part of the GNU C Library.
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The GNU C Library is free software; you can redistribute it and/or
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modify it under the terms of the GNU Lesser General Public
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License as published by the Free Software Foundation; either
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version 2.1 of the License, or (at your option) any later version.
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The GNU C Library is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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Lesser General Public License for more details.
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You should have received a copy of the GNU Lesser General Public
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License along with the GNU C Library; if not, see
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<https://www.gnu.org/licenses/>. */
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#include "v_expm1f_inline.h"
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static const struct data
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{
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struct v_expm1f_data expm1f_consts;
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uint32x4_t boring_bound, large_bound, onef;
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} data = {
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.expm1f_consts = V_EXPM1F_DATA,
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/* 0x1.205966p+3, above which tanhf rounds to 1 (or -1 for negative). */
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.boring_bound = V4 (0x41102cb3),
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.large_bound = V4 (0x7f800000),
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};
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static float32x4_t NOINLINE VPCS_ATTR
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special_case (float32x4_t x, uint32x4_t is_boring, float32x4_t boring,
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float32x4_t q, uint32x4_t special)
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{
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return v_call_f32 (
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tanhf, x,
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vbslq_f32 (is_boring, boring, vdivq_f32 (q, vaddq_f32 (q, v_f32 (2.0)))),
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special);
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}
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/* Approximation for single-precision vector tanh(x), using a simplified
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version of expm1f. The maximum error is 2.58 ULP:
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_ZGVnN4v_tanhf (0x1.fa5eep-5) got 0x1.f9ba02p-5
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want 0x1.f9ba08p-5. */
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float32x4_t VPCS_ATTR NOINLINE V_NAME_F1 (tanh) (float32x4_t x)
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{
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const struct data *d = ptr_barrier (&data);
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uint32x4_t ix = vreinterpretq_u32_f32 (x);
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float32x4_t ax = vabsq_f32 (x);
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uint32x4_t iax = vreinterpretq_u32_f32 (ax);
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uint32x4_t sign = veorq_u32 (ix, iax);
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uint32x4_t is_boring = vcgtq_u32 (iax, d->boring_bound);
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/* expm1 exponent bias is 1.0f reinterpreted to int. */
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float32x4_t boring = vreinterpretq_f32_u32 (vorrq_u32 (
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sign, vreinterpretq_u32_s32 (d->expm1f_consts.exponent_bias)));
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#if WANT_SIMD_EXCEPT
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/* If fp exceptions are to be triggered properly, set all special and boring
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lanes to 0, which will trigger no exceptions, and fix them up later. */
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uint32x4_t special = vorrq_u32 (vcgtq_u32 (iax, d->large_bound),
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vcltq_u32 (iax, v_u32 (0x34000000)));
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x = v_zerofy_f32 (x, is_boring);
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if (__glibc_unlikely (v_any_u32 (special)))
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x = v_zerofy_f32 (x, special);
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#else
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uint32x4_t special = vcgtq_u32 (iax, d->large_bound);
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#endif
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/* tanh(x) = (e^2x - 1) / (e^2x + 1). */
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float32x4_t q = expm1f_inline (vmulq_n_f32 (x, 2), &d->expm1f_consts);
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if (__glibc_unlikely (v_any_u32 (special)))
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return special_case (vreinterpretq_f32_u32 (ix), is_boring, boring, q,
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special);
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float32x4_t y = vdivq_f32 (q, vaddq_f32 (q, v_f32 (2.0)));
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return vbslq_f32 (is_boring, boring, y);
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}
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libmvec_hidden_def (V_NAME_F1 (tanh))
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HALF_WIDTH_ALIAS_F1 (tanh)
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