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848746e88e
Add ELF_DYNAMIC_AFTER_RELOC to allow target specific processing after relocation. For x86-64, add #define DT_X86_64_PLT (DT_LOPROC + 0) #define DT_X86_64_PLTSZ (DT_LOPROC + 1) #define DT_X86_64_PLTENT (DT_LOPROC + 3) 1. DT_X86_64_PLT: The address of the procedure linkage table. 2. DT_X86_64_PLTSZ: The total size, in bytes, of the procedure linkage table. 3. DT_X86_64_PLTENT: The size, in bytes, of a procedure linkage table entry. With the r_addend field of the R_X86_64_JUMP_SLOT relocation set to the memory offset of the indirect branch instruction. Define ELF_DYNAMIC_AFTER_RELOC for x86-64 to rewrite the PLT section with direct branch after relocation when the lazy binding is disabled. PLT rewrite is disabled by default since SELinux may disallow modifying code pages and ld.so can't detect it in all cases. Use $ export GLIBC_TUNABLES=glibc.cpu.plt_rewrite=1 to enable PLT rewrite with 32-bit direct jump at run-time or $ export GLIBC_TUNABLES=glibc.cpu.plt_rewrite=2 to enable PLT rewrite with 32-bit direct jump and on APX processors with 64-bit absolute jump at run-time. Reviewed-by: Noah Goldstein <goldstein.w.n@gmail.com>
76 lines
2.7 KiB
Plaintext
76 lines
2.7 KiB
Plaintext
# x86 specific tunables.
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# Copyright (C) 2017-2024 Free Software Foundation, Inc.
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# This file is part of the GNU C Library.
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# The GNU C Library is free software; you can redistribute it and/or
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# modify it under the terms of the GNU Lesser General Public
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# License as published by the Free Software Foundation; either
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# version 2.1 of the License, or (at your option) any later version.
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# The GNU C Library is distributed in the hope that it will be useful,
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# but WITHOUT ANY WARRANTY; without even the implied warranty of
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# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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# Lesser General Public License for more details.
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# You should have received a copy of the GNU Lesser General Public
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# License along with the GNU C Library; if not, see
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# <https://www.gnu.org/licenses/>.
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glibc {
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cpu {
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hwcaps {
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type: STRING
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}
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x86_ibt {
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type: STRING
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}
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x86_shstk {
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type: STRING
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}
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x86_non_temporal_threshold {
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type: SIZE_T
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}
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x86_rep_movsb_threshold {
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type: SIZE_T
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# Since there is overhead to set up REP MOVSB operation, REP
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# MOVSB isn't faster on short data. The memcpy micro benchmark
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# in glibc shows that 2KB is the approximate value above which
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# REP MOVSB becomes faster than SSE2 optimization on processors
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# with Enhanced REP MOVSB. Since larger register size can move
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# more data with a single load and store, the threshold is
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# higher with larger register size. Micro benchmarks show AVX
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# REP MOVSB becomes faster apprximately at 8KB. The AVX512
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# threshold is extrapolated to 16KB. For machines with FSRM the
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# threshold is universally set at 2112 bytes. Note: Since the
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# REP MOVSB threshold must be greater than 8 times of vector
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# size and the default value is 4096 * (vector size / 16), the
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# default value and the minimum value must be updated at
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# run-time. NB: Don't set the default value since we can't tell
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# if the tunable value is set by user or not [BZ #27069].
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minval: 1
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}
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x86_rep_stosb_threshold {
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type: SIZE_T
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# Since there is overhead to set up REP STOSB operation, REP STOSB
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# isn't faster on short data. The memset micro benchmark in glibc
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# shows that 2KB is the approximate value above which REP STOSB
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# becomes faster on processors with Enhanced REP STOSB. Since the
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# stored value is fixed, larger register size has minimal impact
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# on threshold.
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minval: 1
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default: 2048
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}
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x86_data_cache_size {
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type: SIZE_T
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}
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x86_shared_cache_size {
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type: SIZE_T
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}
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plt_rewrite {
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type: INT_32
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minval: 0
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maxval: 2
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}
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}
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}
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