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be1e5d3113
http://sourceware.org/ml/libc-alpha/2013-08/msg00089.html Little-endian fixes for setjmp/longjmp. When writing these I noticed the setjmp code corrupts the non volatile VMX registers when using an unaligned buffer. Anton fixed this, and also simplified it quite a bit. The current code uses boilerplate for the case where we want to store 16 bytes to an unaligned address. For that we have to do a read/modify/write of two aligned 16 byte quantities. In our case we are storing a bunch of back to back data (consective VMX registers), and only the start and end of the region need the read/modify/write. [BZ #15723] * sysdeps/powerpc/jmpbuf-offsets.h: Comment fix. * sysdeps/powerpc/powerpc32/fpu/__longjmp-common.S: Correct _dl_hwcap access for little-endian. * sysdeps/powerpc/powerpc32/fpu/setjmp-common.S: Likewise. Don't destroy vmx regs when saving unaligned. * sysdeps/powerpc/powerpc64/__longjmp-common.S: Correct CR load. * sysdeps/powerpc/powerpc64/setjmp-common.S: Likewise CR save. Don't destroy vmx regs when saving unaligned.
174 lines
4.4 KiB
ArmAsm
174 lines
4.4 KiB
ArmAsm
/* longjmp for PowerPC.
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Copyright (C) 1995-2013 Free Software Foundation, Inc.
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This file is part of the GNU C Library.
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The GNU C Library is free software; you can redistribute it and/or
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modify it under the terms of the GNU Lesser General Public
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License as published by the Free Software Foundation; either
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version 2.1 of the License, or (at your option) any later version.
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The GNU C Library is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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Lesser General Public License for more details.
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You should have received a copy of the GNU Lesser General Public
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License along with the GNU C Library; if not, see
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<http://www.gnu.org/licenses/>. */
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#include <sysdep.h>
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#define _ASM
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#ifdef __NO_VMX__
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# include <novmxsetjmp.h>
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#else
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# include <jmpbuf-offsets.h>
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#endif
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.machine "altivec"
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ENTRY (__longjmp)
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#ifndef __NO_VMX__
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# ifdef PIC
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mflr r6
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cfi_register (lr,r6)
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SETUP_GOT_ACCESS(r5,got_label)
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addis r5,r5,_GLOBAL_OFFSET_TABLE_-got_label@ha
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addi r5,r5,_GLOBAL_OFFSET_TABLE_-got_label@l
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# ifdef SHARED
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# ifdef IS_IN_rtld
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/* Inside ld.so we use the local alias to avoid runtime GOT
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relocations. */
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lwz r5,_rtld_local_ro@got(r5)
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# else
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lwz r5,_rtld_global_ro@got(r5)
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# endif
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mtlr r6
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cfi_same_value (lr)
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lwz r5,RTLD_GLOBAL_RO_DL_HWCAP_OFFSET+LOWORD(r5)
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# else
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lwz r5,_dl_hwcap@got(r5)
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mtlr r6
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cfi_same_value (lr)
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lwz r5,LOWORD(r5)
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# endif
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# else
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lis r5,(_dl_hwcap+LOWORD)@ha
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lwz r5,(_dl_hwcap+LOWORD)@l(r5)
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# endif
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andis. r5,r5,(PPC_FEATURE_HAS_ALTIVEC >> 16)
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beq L(no_vmx)
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la r5,((JB_VRS)*4)(3)
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andi. r6,r5,0xf
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lwz r0,((JB_VRSAVE)*4)(3)
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mtspr VRSAVE,r0
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beq+ L(aligned_restore_vmx)
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addi r6,r5,16
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lvsl v0,0,r5
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lvx v1,0,r5
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addi r5,r5,32
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lvx v21,0,r6
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vperm v20,v1,v21,v0
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# define load_misaligned_vmx_lo_loaded(loadvr,lovr,shiftvr,loadgpr,addgpr) \
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addi addgpr,addgpr,32; \
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lvx lovr,0,loadgpr; \
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vperm loadvr,loadvr,lovr,shiftvr;
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load_misaligned_vmx_lo_loaded(v21,v22,v0,r5,r6)
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load_misaligned_vmx_lo_loaded(v22,v23,v0,r6,r5)
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load_misaligned_vmx_lo_loaded(v23,v24,v0,r5,r6)
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load_misaligned_vmx_lo_loaded(v24,v25,v0,r6,r5)
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load_misaligned_vmx_lo_loaded(v25,v26,v0,r5,r6)
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load_misaligned_vmx_lo_loaded(v26,v27,v0,r6,r5)
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load_misaligned_vmx_lo_loaded(v27,v28,v0,r5,r6)
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load_misaligned_vmx_lo_loaded(v28,v29,v0,r6,r5)
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load_misaligned_vmx_lo_loaded(v29,v30,v0,r5,r6)
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load_misaligned_vmx_lo_loaded(v30,v31,v0,r6,r5)
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lvx v1,0,r5
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vperm v31,v31,v1,v0
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b L(no_vmx)
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L(aligned_restore_vmx):
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addi r6,r5,16
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lvx v20,0,r5
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addi r5,r5,32
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lvx v21,0,r6
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addi r6,r6,32
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lvx v22,0,r5
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addi r5,r5,32
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lvx v23,0,r6
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addi r6,r6,32
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lvx v24,0,r5
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addi r5,r5,32
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lvx v25,0,r6
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addi r6,r6,32
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lvx v26,0,r5
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addi r5,r5,32
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lvx v27,0,r6
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addi r6,r6,32
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lvx v28,0,r5
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addi r5,r5,32
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lvx v29,0,r6
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addi r6,r6,32
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lvx v30,0,r5
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lvx v31,0,r6
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L(no_vmx):
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#endif
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#if defined PTR_DEMANGLE || defined CHECK_SP
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lwz r24,(JB_GPR1*4)(r3)
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# ifdef CHECK_SP
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# ifdef PTR_DEMANGLE
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PTR_DEMANGLE3 (r24, r24, r25)
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# endif
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CHECK_SP (r24)
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mr r1,r24
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# endif
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#else
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lwz r1,(JB_GPR1*4)(r3)
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#endif
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lwz r0,(JB_LR*4)(r3)
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lwz r14,((JB_GPRS+0)*4)(r3)
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lfd fp14,((JB_FPRS+0*2)*4)(r3)
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lwz r15,((JB_GPRS+1)*4)(r3)
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lfd fp15,((JB_FPRS+1*2)*4)(r3)
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lwz r16,((JB_GPRS+2)*4)(r3)
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lfd fp16,((JB_FPRS+2*2)*4)(r3)
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lwz r17,((JB_GPRS+3)*4)(r3)
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lfd fp17,((JB_FPRS+3*2)*4)(r3)
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lwz r18,((JB_GPRS+4)*4)(r3)
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lfd fp18,((JB_FPRS+4*2)*4)(r3)
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lwz r19,((JB_GPRS+5)*4)(r3)
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lfd fp19,((JB_FPRS+5*2)*4)(r3)
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lwz r20,((JB_GPRS+6)*4)(r3)
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lfd fp20,((JB_FPRS+6*2)*4)(r3)
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#ifdef PTR_DEMANGLE
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# ifndef CHECK_SP
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PTR_DEMANGLE3 (r1, r24, r25)
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# endif
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PTR_DEMANGLE2 (r0, r25)
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#endif
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mtlr r0
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lwz r21,((JB_GPRS+7)*4)(r3)
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lfd fp21,((JB_FPRS+7*2)*4)(r3)
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lwz r22,((JB_GPRS+8)*4)(r3)
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lfd fp22,((JB_FPRS+8*2)*4)(r3)
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lwz r0,(JB_CR*4)(r3)
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lwz r23,((JB_GPRS+9)*4)(r3)
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lfd fp23,((JB_FPRS+9*2)*4)(r3)
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lwz r24,((JB_GPRS+10)*4)(r3)
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lfd fp24,((JB_FPRS+10*2)*4)(r3)
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lwz r25,((JB_GPRS+11)*4)(r3)
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lfd fp25,((JB_FPRS+11*2)*4)(r3)
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mtcrf 0xFF,r0
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lwz r26,((JB_GPRS+12)*4)(r3)
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lfd fp26,((JB_FPRS+12*2)*4)(r3)
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lwz r27,((JB_GPRS+13)*4)(r3)
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lfd fp27,((JB_FPRS+13*2)*4)(r3)
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lwz r28,((JB_GPRS+14)*4)(r3)
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lfd fp28,((JB_FPRS+14*2)*4)(r3)
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lwz r29,((JB_GPRS+15)*4)(r3)
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lfd fp29,((JB_FPRS+15*2)*4)(r3)
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lwz r30,((JB_GPRS+16)*4)(r3)
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lfd fp30,((JB_FPRS+16*2)*4)(r3)
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lwz r31,((JB_GPRS+17)*4)(r3)
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lfd fp31,((JB_FPRS+17*2)*4)(r3)
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mr r3,r4
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blr
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END (__longjmp)
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