Szabolcs Nagy 2b1d7148e3 [AArch64] make setcontext etc functions consistent with the kernel ... since https://sourceware.org/ml/libc-alpha/2014-04/msg00006.html setcontext etc is no longer tied to the kernel use of ucontext. in that patch the ucontext reserved space is not used consistently with the kernel abi: the d8,d9 pair is saved in the slot of q8. this is ok (*context functions work together), but probably not desirable (ucontexts created by the kernel and getcontext are subtly different). the fix just replaces dN with qN in the save/restore code, which does a bit more than needed (saves/restores the top half of qN that is not callee saved), but this should not be an issue (and avoids having to deal with endianness). (kernel fpsimd context layout: the first 64bit contains 0x210 the fpsimd context size and 0x46508001 the FPSIMD_MAGIC, the second 64bit is for fpsr and fpcr, and the rest is the 128bit q0..q31 registers). given d8=8.1, d9=9.1,... d15=15.1, the context created by getcontext is current: (gdb) x/40xg ctx.uc_mcontext.__reserved 0x410df0 <ctx+464>: 0x0000021046508001 0x0000000000000000 0x410e00 <ctx+480>: 0x0000000000000000 0x0000000000000000 0x410e10 <ctx+496>: 0x0000000000000000 0x0000000000000000 0x410e20 <ctx+512>: 0x0000000000000000 0x0000000000000000 0x410e30 <ctx+528>: 0x0000000000000000 0x0000000000000000 0x410e40 <ctx+544>: 0x0000000000000000 0x0000000000000000 0x410e50 <ctx+560>: 0x0000000000000000 0x0000000000000000 0x410e60 <ctx+576>: 0x0000000000000000 0x0000000000000000 0x410e70 <ctx+592>: 0x0000000000000000 0x0000000000000000 0x410e80 <ctx+608>: 0x4020333333333333 0x4022333333333333 0x410e90 <ctx+624>: 0x0000000000000000 0x0000000000000000 0x410ea0 <ctx+640>: 0x4024333333333333 0x4026333333333333 0x410eb0 <ctx+656>: 0x0000000000000000 0x0000000000000000 0x410ec0 <ctx+672>: 0x4028333333333333 0x402a333333333333 0x410ed0 <ctx+688>: 0x0000000000000000 0x0000000000000000 0x410ee0 <ctx+704>: 0x402c333333333333 0x402e333333333333 0x410ef0 <ctx+720>: 0x0000000000000000 0x0000000000000000 0x410f00 <ctx+736>: 0x0000000000000000 0x0000000000000000 0x410f10 <ctx+752>: 0x0000000000000000 0x0000000000000000 0x410f20 <ctx+768>: 0x0000000000000000 0x0000000000000000 fixed: (gdb) x/40xg ctx.uc_mcontext.__reserved 0x410d70 <ctx+464>: 0x0000021046508001 0x0000000000000000 0x410d80 <ctx+480>: 0x0000000000000000 0x0000000000000000 0x410d90 <ctx+496>: 0x0000000000000000 0x0000000000000000 0x410da0 <ctx+512>: 0x0000000000000000 0x0000000000000000 0x410db0 <ctx+528>: 0x0000000000000000 0x0000000000000000 0x410dc0 <ctx+544>: 0x0000000000000000 0x0000000000000000 0x410dd0 <ctx+560>: 0x0000000000000000 0x0000000000000000 0x410de0 <ctx+576>: 0x0000000000000000 0x0000000000000000 0x410df0 <ctx+592>: 0x0000000000000000 0x0000000000000000 0x410e00 <ctx+608>: 0x4020333333333333 0x0000000000000000 0x410e10 <ctx+624>: 0x4022333333333333 0x0000000000000000 0x410e20 <ctx+640>: 0x4024333333333333 0x0000000000000000 0x410e30 <ctx+656>: 0x4026333333333333 0x0000000000000000 0x410e40 <ctx+672>: 0x4028333333333333 0x0000000000000000 0x410e50 <ctx+688>: 0x402a333333333333 0x0000000000000000 0x410e60 <ctx+704>: 0x402c333333333333 0x0000000000000000 0x410e70 <ctx+720>: 0x402e333333333333 0x0000000000000000 0x410e80 <ctx+736>: 0x0000000000000000 0x0000000000000000 0x410e90 <ctx+752>: 0x0000000000000000 0x0000000000000000 0x410ea0 <ctx+768>: 0x0000000000000000 0x0000000000000000 2015-07-06 Szabolcs Nagy <szabolcs.nagy@arm.com> * sysdeps/unix/sysv/linux/aarch64/getcontext.S (__getcontext): Use q registers instead of d ones so the layout is kernel abi compatible. * sysdeps/unix/sysv/linux/aarch64/setcontext.S (__setcontext): Likewise. * sysdeps/unix/sysv/linux/aarch64/swapcontext.S (__swapcontext): Likewise.# Please enter the commit message for your changes. Lines starting		2015-07-06 12:46:43 +01:00
..
aarch64	Regenerate aarch64 libm-test-ulps	2015-07-02 14:58:12 +01:00
alpha	alpha: Update libm-test-ulps	2015-05-19 09:43:54 -07:00
arm	Regenerate ARM libm-test-ulps.	2015-07-01 17:50:15 +00:00
generic	Refactoring of START for conditions in individual tests	2015-05-14 18:07:06 +03:00
gnu	hurd: fix unwind-resume.c build	2015-02-08 18:46:00 +01:00
hppa	hppa: Fix feupdateenv and fesetexceptflag (Bug 18111).	2015-03-11 02:48:59 -04:00
i386	Clean up BUSY_WAIT_NOP and atomic_delay.	2015-06-30 15:57:15 +02:00
ia64	Set errno for log1p on pole/domain error.	2015-04-13 21:19:27 +02:00
ieee754	Fix ldbl-128 expm1l (-min_subnorm) result sign (bug 18619).	2015-07-01 22:27:49 +00:00
init_array	NPTL: Initializer for .init_array-only configurations.	2015-02-13 13:19:11 -08:00
m68k	Set errno for log1p on pole/domain error.	2015-04-13 21:19:27 +02:00
mach	Fix nice getpriority, setpriority namespace (bug 18553).	2015-06-17 20:22:39 +00:00
microblaze	Replace ELF_RTYPE_CLASS_NOCOPY with ELF_RTYPE_CLASS_COPY	2015-03-05 08:40:41 -08:00
mips	Regenerate MIPS libm-test-ulps.	2015-07-01 17:24:37 +00:00
nacl	Clean up BUSY_WAIT_NOP and atomic_delay.	2015-06-30 15:57:15 +02:00
nios2	Replace ELF_RTYPE_CLASS_NOCOPY with ELF_RTYPE_CLASS_COPY	2015-03-05 08:40:41 -08:00
nptl	Use unsigned types for counters in getaddrinfo_a code.	2015-06-24 17:58:12 -07:00
posix	Fix nice getpriority, setpriority namespace (bug 18553).	2015-06-17 20:22:39 +00:00
powerpc	Regenerate powerpc-nofpu libm-test-ulps.	2015-07-01 18:04:28 +00:00
pthread	Use unsigned types for counters in AIO code.	2015-06-24 17:43:32 -07:00
s390	S/390: Regenerate ULPs	2015-06-19 13:47:59 +02:00
sh	Replace ELF_RTYPE_CLASS_NOCOPY with ELF_RTYPE_CLASS_COPY	2015-03-05 08:40:41 -08:00
sparc	Clean up BUSY_WAIT_NOP and atomic_delay.	2015-06-30 15:57:15 +02:00
tile	Use libc_hidden_proto / libc_hidden_def with __strnlen.	2015-06-02 20:24:25 +00:00
unix	[AArch64] make setcontext etc functions consistent with the kernel	2015-07-06 12:46:43 +01:00
wordsize-32	Update copyright dates with scripts/update-copyrights.	2015-01-02 16:29:47 +00:00
wordsize-64	Update copyright dates with scripts/update-copyrights.	2015-01-02 16:29:47 +00:00
x86	Vector sincosf for x86_64 and tests.	2015-06-18 20:11:27 +03:00
x86_64	Clean up BUSY_WAIT_NOP and atomic_delay.	2015-06-30 15:57:15 +02:00