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ceabdcd130
1. Add default ISA level selection in non-multiarch/rtld
implementations.
2. Add ISA level build guards to different implementations.
- I.e strcmp-avx2.S which is ISA level 3 will only build if
compiled ISA level <= 3. Otherwise there is no reason to
include it as we will always use one of the ISA level 4
implementations (strcmp-evex.S).
3. Refactor the ifunc selector and ifunc implementation list to use
the ISA level aware wrapper macros that allow functions below the
compiled ISA level (with a guranteed replacement) to be skipped.
Tested with and without multiarch on x86_64 for ISA levels:
{generic, x86-64-v2, x86-64-v3, x86-64-v4}
And m32 with and without multiarch.
222 lines
4.7 KiB
ArmAsm
222 lines
4.7 KiB
ArmAsm
/* strcmp with unaligned loads
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Copyright (C) 2013-2022 Free Software Foundation, Inc.
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This file is part of the GNU C Library.
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The GNU C Library is free software; you can redistribute it and/or
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modify it under the terms of the GNU Lesser General Public
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License as published by the Free Software Foundation; either
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version 2.1 of the License, or (at your option) any later version.
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The GNU C Library is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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Lesser General Public License for more details.
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You should have received a copy of the GNU Lesser General Public
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License along with the GNU C Library; if not, see
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<https://www.gnu.org/licenses/>. */
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#include <isa-level.h>
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/* Continue building as ISA level 2. We use this as ISA V2 default
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because strcmp-sse42 uses pcmpstri (slow on some SSE4.2
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processors) and this implementation is potenially faster than
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strcmp-sse42 (aside from the slower page cross case). */
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#if ISA_SHOULD_BUILD (2)
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# define STRCMP_ISA _sse2_unaligned
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# include "strcmp-naming.h"
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# include "sysdep.h"
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ENTRY (STRCMP)
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movl %edi, %eax
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xorl %edx, %edx
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pxor %xmm7, %xmm7
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orl %esi, %eax
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andl $4095, %eax
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cmpl $4032, %eax
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jg L(cross_page)
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movdqu (%rdi), %xmm1
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movdqu (%rsi), %xmm0
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pcmpeqb %xmm1, %xmm0
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pminub %xmm1, %xmm0
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pxor %xmm1, %xmm1
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pcmpeqb %xmm1, %xmm0
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pmovmskb %xmm0, %eax
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testq %rax, %rax
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je L(next_48_bytes)
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L(return):
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bsfq %rax, %rdx
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movzbl (%rdi, %rdx), %eax
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movzbl (%rsi, %rdx), %edx
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subl %edx, %eax
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ret
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.p2align 4
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L(next_48_bytes):
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movdqu 16(%rdi), %xmm6
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movdqu 16(%rsi), %xmm3
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movdqu 32(%rdi), %xmm5
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pcmpeqb %xmm6, %xmm3
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movdqu 32(%rsi), %xmm2
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pminub %xmm6, %xmm3
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pcmpeqb %xmm1, %xmm3
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movdqu 48(%rdi), %xmm4
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pcmpeqb %xmm5, %xmm2
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pmovmskb %xmm3, %edx
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movdqu 48(%rsi), %xmm0
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pminub %xmm5, %xmm2
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pcmpeqb %xmm1, %xmm2
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pcmpeqb %xmm4, %xmm0
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pmovmskb %xmm2, %eax
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salq $16, %rdx
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pminub %xmm4, %xmm0
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pcmpeqb %xmm1, %xmm0
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salq $32, %rax
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orq %rdx, %rax
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pmovmskb %xmm0, %ecx
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movq %rcx, %rdx
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salq $48, %rdx
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orq %rdx, %rax
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jne L(return)
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L(main_loop_header):
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leaq 64(%rdi), %rdx
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movl $4096, %ecx
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pxor %xmm9, %xmm9
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andq $-64, %rdx
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subq %rdi, %rdx
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leaq (%rdi, %rdx), %rax
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addq %rsi, %rdx
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movq %rdx, %rsi
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andl $4095, %esi
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subq %rsi, %rcx
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shrq $6, %rcx
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movq %rcx, %rsi
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jmp L(loop_start)
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.p2align 4
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L(loop):
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addq $64, %rax
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addq $64, %rdx
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L(loop_start):
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testq %rsi, %rsi
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leaq -1(%rsi), %rsi
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je L(loop_cross_page)
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L(back_to_loop):
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movdqu (%rdx), %xmm0
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movdqu 16(%rdx), %xmm1
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movdqa (%rax), %xmm2
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movdqa 16(%rax), %xmm3
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pcmpeqb %xmm2, %xmm0
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movdqu 32(%rdx), %xmm5
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pcmpeqb %xmm3, %xmm1
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pminub %xmm2, %xmm0
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movdqu 48(%rdx), %xmm6
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pminub %xmm3, %xmm1
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movdqa 32(%rax), %xmm2
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pminub %xmm1, %xmm0
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movdqa 48(%rax), %xmm3
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pcmpeqb %xmm2, %xmm5
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pcmpeqb %xmm3, %xmm6
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pminub %xmm2, %xmm5
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pminub %xmm3, %xmm6
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pminub %xmm5, %xmm0
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pminub %xmm6, %xmm0
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pcmpeqb %xmm7, %xmm0
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pmovmskb %xmm0, %ecx
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testl %ecx, %ecx
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je L(loop)
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pcmpeqb %xmm7, %xmm5
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movdqu (%rdx), %xmm0
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pcmpeqb %xmm7, %xmm1
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movdqa (%rax), %xmm2
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pcmpeqb %xmm2, %xmm0
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pminub %xmm2, %xmm0
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pcmpeqb %xmm7, %xmm6
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pcmpeqb %xmm7, %xmm0
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pmovmskb %xmm1, %ecx
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pmovmskb %xmm5, %r8d
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pmovmskb %xmm0, %edi
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salq $16, %rcx
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salq $32, %r8
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pmovmskb %xmm6, %esi
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orq %r8, %rcx
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orq %rdi, %rcx
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salq $48, %rsi
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orq %rsi, %rcx
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bsfq %rcx, %rcx
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movzbl (%rax, %rcx), %eax
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movzbl (%rdx, %rcx), %edx
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subl %edx, %eax
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ret
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.p2align 4
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L(loop_cross_page):
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xor %r10, %r10
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movq %rdx, %r9
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and $63, %r9
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subq %r9, %r10
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movdqa (%rdx, %r10), %xmm0
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movdqa 16(%rdx, %r10), %xmm1
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movdqu (%rax, %r10), %xmm2
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movdqu 16(%rax, %r10), %xmm3
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pcmpeqb %xmm2, %xmm0
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movdqa 32(%rdx, %r10), %xmm5
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pcmpeqb %xmm3, %xmm1
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pminub %xmm2, %xmm0
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movdqa 48(%rdx, %r10), %xmm6
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pminub %xmm3, %xmm1
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movdqu 32(%rax, %r10), %xmm2
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movdqu 48(%rax, %r10), %xmm3
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pcmpeqb %xmm2, %xmm5
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pcmpeqb %xmm3, %xmm6
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pminub %xmm2, %xmm5
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pminub %xmm3, %xmm6
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pcmpeqb %xmm7, %xmm0
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pcmpeqb %xmm7, %xmm1
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pcmpeqb %xmm7, %xmm5
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pcmpeqb %xmm7, %xmm6
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pmovmskb %xmm1, %ecx
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pmovmskb %xmm5, %r8d
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pmovmskb %xmm0, %edi
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salq $16, %rcx
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salq $32, %r8
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pmovmskb %xmm6, %esi
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orq %r8, %rdi
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orq %rcx, %rdi
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salq $48, %rsi
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orq %rsi, %rdi
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movq %r9, %rcx
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movq $63, %rsi
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shrq %cl, %rdi
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test %rdi, %rdi
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je L(back_to_loop)
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bsfq %rdi, %rcx
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movzbl (%rax, %rcx), %eax
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movzbl (%rdx, %rcx), %edx
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subl %edx, %eax
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ret
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.p2align 4
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L(cross_page_loop):
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cmpb %cl, %al
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jne L(different)
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addq $1, %rdx
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cmpq $64, %rdx
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je L(main_loop_header)
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L(cross_page):
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movzbl (%rdi, %rdx), %eax
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movzbl (%rsi, %rdx), %ecx
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testb %al, %al
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jne L(cross_page_loop)
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xorl %eax, %eax
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L(different):
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subl %ecx, %eax
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ret
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END (STRCMP)
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#endif
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