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I used these shell commands: ../glibc/scripts/update-copyrights $PWD/../gnulib/build-aux/update-copyright (cd ../glibc && git commit -am"[this commit message]") and then ignored the output, which consisted lines saying "FOO: warning: copyright statement not found" for each of 6694 files FOO. I then removed trailing white space from benchtests/bench-pthread-locks.c and iconvdata/tst-iconv-big5-hkscs-to-2ucs4.c, to work around this diagnostic from Savannah: remote: *** pre-commit check failed ... remote: *** error: lines with trailing whitespace found remote: error: hook declined to update refs/heads/master
188 lines
4.4 KiB
ArmAsm
188 lines
4.4 KiB
ArmAsm
/* strcpy/stpcpy - copy a string returning pointer to start/end.
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Copyright (C) 2013-2021 Free Software Foundation, Inc.
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This file is part of the GNU C Library.
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The GNU C Library is free software; you can redistribute it and/or
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modify it under the terms of the GNU Lesser General Public
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License as published by the Free Software Foundation; either
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version 2.1 of the License, or (at your option) any later version.
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The GNU C Library is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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Lesser General Public License for more details.
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You should have received a copy of the GNU Lesser General Public
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License along with the GNU C Library; if not, see
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<https://www.gnu.org/licenses/>. */
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/* To build as stpcpy, define BUILD_STPCPY before compiling this file.
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To test the page crossing code path more thoroughly, compile with
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-DSTRCPY_TEST_PAGE_CROSS - this will force all unaligned copies through
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the slower entry path. This option is not intended for production use. */
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#include <sysdep.h>
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/* Assumptions:
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*
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* ARMv8-a, AArch64, Advanced SIMD.
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* MTE compatible.
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*/
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/* Arguments and results. */
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#define dstin x0
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#define srcin x1
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#define result x0
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#define src x2
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#define dst x3
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#define len x4
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#define synd x4
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#define tmp x5
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#define wtmp w5
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#define shift x5
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#define data1 x6
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#define dataw1 w6
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#define data2 x7
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#define dataw2 w7
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#define dataq q0
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#define vdata v0
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#define vhas_nul v1
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#define vrepmask v2
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#define vend v3
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#define dend d3
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#define dataq2 q1
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#ifdef BUILD_STPCPY
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# define STRCPY __stpcpy
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# define IFSTPCPY(X,...) X,__VA_ARGS__
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#else
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# define STRCPY strcpy
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# define IFSTPCPY(X,...)
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#endif
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/* Core algorithm:
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For each 16-byte chunk we calculate a 64-bit syndrome value with four bits
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per byte. For even bytes, bits 0-3 are set if the relevant byte matched the
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requested character or the byte is NUL. Bits 4-7 must be zero. Bits 4-7 are
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set likewise for odd bytes so that adjacent bytes can be merged. Since the
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bits in the syndrome reflect the order in which things occur in the original
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string, counting trailing zeros identifies exactly which byte matched. */
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ENTRY (STRCPY)
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PTR_ARG (0)
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PTR_ARG (1)
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bic src, srcin, 15
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mov wtmp, 0xf00f
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ld1 {vdata.16b}, [src]
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dup vrepmask.8h, wtmp
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cmeq vhas_nul.16b, vdata.16b, 0
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lsl shift, srcin, 2
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and vhas_nul.16b, vhas_nul.16b, vrepmask.16b
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addp vend.16b, vhas_nul.16b, vhas_nul.16b
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fmov synd, dend
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lsr synd, synd, shift
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cbnz synd, L(tail)
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ldr dataq, [src, 16]!
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cmeq vhas_nul.16b, vdata.16b, 0
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and vhas_nul.16b, vhas_nul.16b, vrepmask.16b
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addp vend.16b, vhas_nul.16b, vhas_nul.16b
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fmov synd, dend
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cbz synd, L(start_loop)
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#ifndef __AARCH64EB__
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rbit synd, synd
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#endif
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sub tmp, src, srcin
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clz len, synd
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add len, tmp, len, lsr 2
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tbz len, 4, L(less16)
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sub tmp, len, 15
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ldr dataq, [srcin]
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ldr dataq2, [srcin, tmp]
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str dataq, [dstin]
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str dataq2, [dstin, tmp]
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IFSTPCPY (add result, dstin, len)
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ret
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.p2align 4,,8
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L(tail):
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rbit synd, synd
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clz len, synd
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lsr len, len, 2
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.p2align 4
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L(less16):
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tbz len, 3, L(less8)
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sub tmp, len, 7
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ldr data1, [srcin]
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ldr data2, [srcin, tmp]
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str data1, [dstin]
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str data2, [dstin, tmp]
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IFSTPCPY (add result, dstin, len)
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ret
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.p2align 4
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L(less8):
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subs tmp, len, 3
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b.lo L(less4)
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ldr dataw1, [srcin]
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ldr dataw2, [srcin, tmp]
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str dataw1, [dstin]
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str dataw2, [dstin, tmp]
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IFSTPCPY (add result, dstin, len)
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ret
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L(less4):
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cbz len, L(zerobyte)
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ldrh dataw1, [srcin]
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strh dataw1, [dstin]
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L(zerobyte):
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strb wzr, [dstin, len]
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IFSTPCPY (add result, dstin, len)
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ret
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.p2align 4
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L(start_loop):
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sub len, src, srcin
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ldr dataq2, [srcin]
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add dst, dstin, len
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str dataq2, [dstin]
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.p2align 5
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L(loop):
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str dataq, [dst], 16
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ldr dataq, [src, 16]!
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cmeq vhas_nul.16b, vdata.16b, 0
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umaxp vend.16b, vhas_nul.16b, vhas_nul.16b
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fmov synd, dend
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cbz synd, L(loop)
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and vhas_nul.16b, vhas_nul.16b, vrepmask.16b
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addp vend.16b, vhas_nul.16b, vhas_nul.16b /* 128->64 */
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fmov synd, dend
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#ifndef __AARCH64EB__
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rbit synd, synd
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#endif
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clz len, synd
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lsr len, len, 2
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sub tmp, len, 15
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ldr dataq, [src, tmp]
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str dataq, [dst, tmp]
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IFSTPCPY (add result, dst, len)
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ret
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END (STRCPY)
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#ifdef BUILD_STPCPY
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weak_alias (__stpcpy, stpcpy)
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libc_hidden_def (__stpcpy)
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libc_hidden_builtin_def (stpcpy)
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#else
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libc_hidden_builtin_def (strcpy)
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#endif
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