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4a9392ffc2
Optimised implementations for single and double precision, Advanced SIMD and SVE, copied from Arm Optimized Routines. As previously, data tables are used via a barrier to prevent overly aggressive constant inlining. Special-case handlers are marked NOINLINE to avoid incurring the penalty of switching call standards unnecessarily. Reviewed-by: Szabolcs Nagy <szabolcs.nagy@arm.com>
134 lines
4.3 KiB
C
134 lines
4.3 KiB
C
/* Single-precision vector (Advanced SIMD) exp function.
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Copyright (C) 2023 Free Software Foundation, Inc.
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This file is part of the GNU C Library.
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The GNU C Library is free software; you can redistribute it and/or
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modify it under the terms of the GNU Lesser General Public
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License as published by the Free Software Foundation; either
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version 2.1 of the License, or (at your option) any later version.
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The GNU C Library is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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Lesser General Public License for more details.
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You should have received a copy of the GNU Lesser General Public
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License along with the GNU C Library; if not, see
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<https://www.gnu.org/licenses/>. */
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#include "v_math.h"
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static const struct data
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{
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float32x4_t poly[5];
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float32x4_t shift, inv_ln2, ln2_hi, ln2_lo;
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uint32x4_t exponent_bias;
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#if !WANT_SIMD_EXCEPT
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float32x4_t special_bound, scale_thresh;
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#endif
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} data = {
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/* maxerr: 1.45358 +0.5 ulp. */
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.poly = { V4 (0x1.0e4020p-7f), V4 (0x1.573e2ep-5f), V4 (0x1.555e66p-3f),
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V4 (0x1.fffdb6p-2f), V4 (0x1.ffffecp-1f) },
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.shift = V4 (0x1.8p23f),
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.inv_ln2 = V4 (0x1.715476p+0f),
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.ln2_hi = V4 (0x1.62e4p-1f),
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.ln2_lo = V4 (0x1.7f7d1cp-20f),
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.exponent_bias = V4 (0x3f800000),
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#if !WANT_SIMD_EXCEPT
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.special_bound = V4 (126.0f),
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.scale_thresh = V4 (192.0f),
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#endif
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};
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#define C(i) d->poly[i]
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#if WANT_SIMD_EXCEPT
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# define TinyBound v_u32 (0x20000000) /* asuint (0x1p-63). */
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# define BigBound v_u32 (0x42800000) /* asuint (0x1p6). */
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# define SpecialBound v_u32 (0x22800000) /* BigBound - TinyBound. */
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static float32x4_t VPCS_ATTR NOINLINE
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special_case (float32x4_t x, float32x4_t y, uint32x4_t cmp)
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{
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/* If fenv exceptions are to be triggered correctly, fall back to the scalar
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routine to special lanes. */
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return v_call_f32 (expf, x, y, cmp);
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}
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#else
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# define SpecialOffset v_u32 (0x82000000)
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# define SpecialBias v_u32 (0x7f000000)
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static float32x4_t VPCS_ATTR NOINLINE
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special_case (float32x4_t poly, float32x4_t n, uint32x4_t e, uint32x4_t cmp1,
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float32x4_t scale, const struct data *d)
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{
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/* 2^n may overflow, break it up into s1*s2. */
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uint32x4_t b = vandq_u32 (vclezq_f32 (n), SpecialOffset);
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float32x4_t s1 = vreinterpretq_f32_u32 (vaddq_u32 (b, SpecialBias));
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float32x4_t s2 = vreinterpretq_f32_u32 (vsubq_u32 (e, b));
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uint32x4_t cmp2 = vcagtq_f32 (n, d->scale_thresh);
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float32x4_t r2 = vmulq_f32 (s1, s1);
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float32x4_t r1 = vmulq_f32 (vfmaq_f32 (s2, poly, s2), s1);
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/* Similar to r1 but avoids double rounding in the subnormal range. */
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float32x4_t r0 = vfmaq_f32 (scale, poly, scale);
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float32x4_t r = vbslq_f32 (cmp1, r1, r0);
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return vbslq_f32 (cmp2, r2, r);
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}
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#endif
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float32x4_t VPCS_ATTR V_NAME_F1 (exp) (float32x4_t x)
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{
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const struct data *d = ptr_barrier (&data);
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float32x4_t n, r, r2, scale, p, q, poly, z;
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uint32x4_t cmp, e;
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#if WANT_SIMD_EXCEPT
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/* asuint(x) - TinyBound >= BigBound - TinyBound. */
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cmp = vcgeq_u32 (
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vsubq_u32 (vandq_u32 (vreinterpretq_u32_f32 (x), v_u32 (0x7fffffff)),
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TinyBound),
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SpecialBound);
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float32x4_t xm = x;
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/* If any lanes are special, mask them with 1 and retain a copy of x to allow
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special case handler to fix special lanes later. This is only necessary if
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fenv exceptions are to be triggered correctly. */
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if (__glibc_unlikely (v_any_u32 (cmp)))
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x = vbslq_f32 (cmp, v_f32 (1), x);
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#endif
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/* exp(x) = 2^n (1 + poly(r)), with 1 + poly(r) in [1/sqrt(2),sqrt(2)]
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x = ln2*n + r, with r in [-ln2/2, ln2/2]. */
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z = vfmaq_f32 (d->shift, x, d->inv_ln2);
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n = vsubq_f32 (z, d->shift);
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r = vfmsq_f32 (x, n, d->ln2_hi);
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r = vfmsq_f32 (r, n, d->ln2_lo);
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e = vshlq_n_u32 (vreinterpretq_u32_f32 (z), 23);
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scale = vreinterpretq_f32_u32 (vaddq_u32 (e, d->exponent_bias));
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#if !WANT_SIMD_EXCEPT
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cmp = vcagtq_f32 (n, d->special_bound);
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#endif
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r2 = vmulq_f32 (r, r);
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p = vfmaq_f32 (C (1), C (0), r);
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q = vfmaq_f32 (C (3), C (2), r);
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q = vfmaq_f32 (q, p, r2);
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p = vmulq_f32 (C (4), r);
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poly = vfmaq_f32 (p, q, r2);
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if (__glibc_unlikely (v_any_u32 (cmp)))
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#if WANT_SIMD_EXCEPT
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return special_case (xm, vfmaq_f32 (scale, poly, scale), cmp);
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#else
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return special_case (poly, n, e, cmp, scale, d);
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#endif
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return vfmaq_f32 (scale, poly, scale);
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}
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