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2001-07-06 Paul Eggert <eggert@twinsun.com> * manual/argp.texi: Remove ignored LGPL copyright notice; it's not appropriate for documentation anyway. * manual/libc-texinfo.sh: "Library General Public License" -> "Lesser General Public License". 2001-07-06 Andreas Jaeger <aj@suse.de> * All files under GPL/LGPL version 2: Place under LGPL version 2.1.
225 lines
4.8 KiB
C
225 lines
4.8 KiB
C
/* Copyright (C) 1996, 1997 Free Software Foundation, Inc.
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Contributed by David Mosberger (davidm@cs.arizona.edu).
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This file is part of the GNU C Library.
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The GNU C Library is free software; you can redistribute it and/or
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modify it under the terms of the GNU Lesser General Public
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License as published by the Free Software Foundation; either
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version 2.1 of the License, or (at your option) any later version.
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The GNU C Library is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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Lesser General Public License for more details.
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You should have received a copy of the GNU Lesser General Public
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License along with the GNU C Library; if not, write to the Free
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Software Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA
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02111-1307 USA. */
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/* The current Alpha chips don't provide hardware for integer
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division. The C compiler expects the functions
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__divqu: 64-bit unsigned long divide
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__remqu: 64-bit unsigned long remainder
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__divqs/__remqs: signed 64-bit
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__divlu/__remlu: unsigned 32-bit
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__divls/__remls: signed 32-bit
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These are not normal C functions: instead of the normal calling
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sequence, these expect their arguments in registers t10 and t11, and
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return the result in t12 (aka pv). Register AT may be clobbered
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(assembly temporary), anything else must be saved. */
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#include <sysdep.h>
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#ifdef __linux__
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# include <asm/gentrap.h>
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# include <asm/pal.h>
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#else
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# include <machine/pal.h>
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#endif
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#define mask v0
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#define divisor t0
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#define compare AT
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#define tmp1 t2
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#define tmp2 t3
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#define retaddr t9
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#define arg1 t10
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#define arg2 t11
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#define result t12
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#if IS_REM
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# define DIV_ONLY(x,y...)
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# define REM_ONLY(x,y...) x,##y
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# define modulus result
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# define quotient t1
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# define GETSIGN(x) mov arg1, x
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# define STACK 32
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#else
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# define DIV_ONLY(x,y...) x,##y
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# define REM_ONLY(x,y...)
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# define modulus t1
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# define quotient result
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# define GETSIGN(x) xor arg1, arg2, x
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# define STACK 48
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#endif
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#if SIZE == 8
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# define LONGIFY(x,y) mov x,y
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# define SLONGIFY(x,y) mov x,y
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# define _SLONGIFY(x)
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# define NEG(x,y) negq x,y
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#else
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# define LONGIFY(x,y) zapnot x,15,y
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# define SLONGIFY(x,y) sextl x,y
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# define _SLONGIFY(x) sextl x,x
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# define NEG(x,y) negl x,y
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#endif
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.set noreorder
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.set noat
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.ent UFUNC_NAME
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.globl UFUNC_NAME
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.align 3
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UFUNC_NAME:
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lda sp, -STACK(sp)
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.frame sp, STACK, retaddr, 0
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#ifdef PROF
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stq ra, 0(sp)
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stq pv, 8(sp)
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stq gp, 16(sp)
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br AT, 1f
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1: ldgp gp, 0(AT)
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mov retaddr, ra
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lda AT, _mcount
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jsr AT, (AT), _mcount
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ldq ra, 0(sp)
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ldq pv, 8(sp)
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ldq gp, 16(sp)
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#endif
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.prologue 0
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$udiv:
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stq t0, 0(sp)
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LONGIFY (arg2, divisor)
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stq t1, 8(sp)
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LONGIFY (arg1, modulus)
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stq v0, 16(sp)
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clr quotient
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stq tmp1, 24(sp)
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ldiq mask, 1
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DIV_ONLY(stq tmp2,32(sp))
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beq divisor, $divbyzero
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.align 3
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#if SIZE == 8
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/* Shift divisor left. */
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1: cmpult divisor, modulus, compare
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blt divisor, 2f
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addq divisor, divisor, divisor
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addq mask, mask, mask
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bne compare, 1b
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unop
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2:
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#else
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/* Shift divisor left using 3-bit shifts as we can't overflow.
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This results in looping three times less here, but up to
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two more times later. Thus using a large shift isn't worth it. */
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1: cmpult divisor, modulus, compare
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s8addq divisor, zero, divisor
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s8addq mask, zero, mask
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bne compare, 1b
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#endif
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/* Now go back to the right. */
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3: DIV_ONLY(addq quotient, mask, tmp2)
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srl mask, 1, mask
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cmpule divisor, modulus, compare
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subq modulus, divisor, tmp1
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DIV_ONLY(cmovne compare, tmp2, quotient)
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srl divisor, 1, divisor
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cmovne compare, tmp1, modulus
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bne mask, 3b
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$done: ldq t0, 0(sp)
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ldq t1, 8(sp)
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ldq v0, 16(sp)
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ldq tmp1, 24(sp)
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DIV_ONLY(ldq tmp2, 32(sp))
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lda sp, STACK(sp)
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ret zero, (retaddr), 1
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$divbyzero:
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mov a0, tmp1
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ldiq a0, GEN_INTDIV
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call_pal PAL_gentrap
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mov tmp1, a0
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clr result /* If trap returns, return zero. */
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br $done
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.end UFUNC_NAME
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.ent SFUNC_NAME
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.globl SFUNC_NAME
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.align 3
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SFUNC_NAME:
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lda sp, -STACK(sp)
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.frame sp, STACK, retaddr, 0
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#ifdef PROF
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stq ra, 0(sp)
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stq pv, 8(sp)
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stq gp, 16(sp)
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br AT, 1f
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1: ldgp gp, 0(AT)
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mov retaddr, ra
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jsr AT, _mcount
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ldq ra, 0(sp)
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ldq pv, 8(sp)
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ldq gp, 16(sp)
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#endif
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.prologue 0
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or arg1, arg2, AT
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_SLONGIFY(AT)
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bge AT, $udiv /* don't need to mess with signs */
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/* Save originals and find absolute values. */
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stq arg1, 0(sp)
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NEG (arg1, AT)
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stq arg2, 8(sp)
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cmovge AT, AT, arg1
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stq retaddr, 16(sp)
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NEG (arg2, AT)
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stq tmp1, 24(sp)
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cmovge AT, AT, arg2
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/* Do the unsigned division. */
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bsr retaddr, UFUNC_NAME
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/* Restore originals and adjust the sign of the result. */
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ldq arg1, 0(sp)
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ldq arg2, 8(sp)
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GETSIGN (AT)
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NEG (result, tmp1)
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_SLONGIFY(AT)
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ldq retaddr, 16(sp)
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cmovlt AT, tmp1, result
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ldq tmp1, 24(sp)
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lda sp, STACK(sp)
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ret zero, (retaddr), 1
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.end SFUNC_NAME
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