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14a1d7cc4c
Chek Fast_Unaligned_Load, instead of Slow_BSF, and also check for Fast_Copy_Backward to enable __memcpy_ssse3_back. Existing selection order is updated with following selection order: 1. __memcpy_avx_unaligned if AVX_Fast_Unaligned_Load bit is set. 2. __memcpy_sse2_unaligned if Fast_Unaligned_Load bit is set. 3. __memcpy_sse2 if SSSE3 isn't available. 4. __memcpy_ssse3_back if Fast_Copy_Backward bit it set. 5. __memcpy_ssse3 [BZ #18880] * sysdeps/x86_64/multiarch/memcpy.S: Check Fast_Unaligned_Load, instead of Slow_BSF, and also check for Fast_Copy_Backward to enable __memcpy_ssse3_back.
91 lines
2.7 KiB
ArmAsm
91 lines
2.7 KiB
ArmAsm
/* Multiple versions of memcpy
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All versions must be listed in ifunc-impl-list.c.
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Copyright (C) 2010-2016 Free Software Foundation, Inc.
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Contributed by Intel Corporation.
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This file is part of the GNU C Library.
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The GNU C Library is free software; you can redistribute it and/or
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modify it under the terms of the GNU Lesser General Public
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License as published by the Free Software Foundation; either
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version 2.1 of the License, or (at your option) any later version.
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The GNU C Library is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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Lesser General Public License for more details.
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You should have received a copy of the GNU Lesser General Public
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License along with the GNU C Library; if not, see
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<http://www.gnu.org/licenses/>. */
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#include <sysdep.h>
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#include <shlib-compat.h>
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#include <init-arch.h>
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/* Define multiple versions only for the definition in lib and for
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DSO. In static binaries we need memcpy before the initialization
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happened. */
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#if defined SHARED && IS_IN (libc)
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.text
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ENTRY(__new_memcpy)
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.type __new_memcpy, @gnu_indirect_function
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LOAD_RTLD_GLOBAL_RO_RDX
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#ifdef HAVE_AVX512_ASM_SUPPORT
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HAS_ARCH_FEATURE (AVX512F_Usable)
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jz 1f
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HAS_ARCH_FEATURE (Prefer_No_VZEROUPPER)
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jz 1f
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lea __memcpy_avx512_no_vzeroupper(%rip), %RAX_LP
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ret
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#endif
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1: lea __memcpy_avx_unaligned(%rip), %RAX_LP
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HAS_ARCH_FEATURE (AVX_Fast_Unaligned_Load)
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jnz 2f
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lea __memcpy_sse2_unaligned(%rip), %RAX_LP
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HAS_ARCH_FEATURE (Fast_Unaligned_Load)
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jnz 2f
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lea __memcpy_sse2(%rip), %RAX_LP
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HAS_CPU_FEATURE (SSSE3)
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jz 2f
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lea __memcpy_ssse3_back(%rip), %RAX_LP
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HAS_ARCH_FEATURE (Fast_Copy_Backward)
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jnz 2f
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lea __memcpy_ssse3(%rip), %RAX_LP
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2: ret
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END(__new_memcpy)
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# undef ENTRY
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# define ENTRY(name) \
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.type __memcpy_sse2, @function; \
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.globl __memcpy_sse2; \
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.hidden __memcpy_sse2; \
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.p2align 4; \
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__memcpy_sse2: cfi_startproc; \
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CALL_MCOUNT
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# undef END
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# define END(name) \
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cfi_endproc; .size __memcpy_sse2, .-__memcpy_sse2
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# undef ENTRY_CHK
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# define ENTRY_CHK(name) \
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.type __memcpy_chk_sse2, @function; \
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.globl __memcpy_chk_sse2; \
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.p2align 4; \
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__memcpy_chk_sse2: cfi_startproc; \
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CALL_MCOUNT
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# undef END_CHK
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# define END_CHK(name) \
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cfi_endproc; .size __memcpy_chk_sse2, .-__memcpy_chk_sse2
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# undef libc_hidden_builtin_def
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/* It doesn't make sense to send libc-internal memcpy calls through a PLT.
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The speedup we get from using SSSE3 instruction is likely eaten away
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by the indirect call in the PLT. */
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# define libc_hidden_builtin_def(name) \
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.globl __GI_memcpy; __GI_memcpy = __memcpy_sse2
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versioned_symbol (libc, __new_memcpy, memcpy, GLIBC_2_14);
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#endif
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#include "../memcpy.S"
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