glibc/sysdeps/i386/fpu/fclrexcpt.c
Ulrich Drepper afdca0f2a3 Update.
* sysdeps/sparc/sparc64/dl-machine.h: Likewise.
	* sysdeps/sparc/sparc32/dl-machine.h: Likewise.
	* sysdeps/s390/s390-64/dl-machine.h: Likewise.
	* sysdeps/s390/s390-32/dl-machine.h: Likewise.
	* sysdeps/powerpc/powerpc64/dl-machine.h: Likewise.
	* sysdeps/powerpc/powerpc32/dl-machine.c: Likewise.
	* sysdeps/m68k/dl-machine.h: Likewise.
	* sysdeps/ia64/dl-machine.h: Likewise.
	* sysdeps/arm/dl-machine.h: Likewise.
	* sysdeps/alpha/dl-machine.h: Likewise.
2004-03-05 10:29:47 +00:00

70 lines
2.2 KiB
C

/* Clear given exceptions in current floating-point environment.
Copyright (C) 1997,99,2000, 2001, 2003, 2004 Free Software Foundation, Inc.
This file is part of the GNU C Library.
Contributed by Ulrich Drepper <drepper@cygnus.com>, 1997.
The GNU C Library is free software; you can redistribute it and/or
modify it under the terms of the GNU Lesser General Public
License as published by the Free Software Foundation; either
version 2.1 of the License, or (at your option) any later version.
The GNU C Library is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
Lesser General Public License for more details.
You should have received a copy of the GNU Lesser General Public
License along with the GNU C Library; if not, write to the Free
Software Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA
02111-1307 USA. */
#include <fenv.h>
#include <unistd.h>
#include <ldsodefs.h>
#include <dl-procinfo.h>
int
__feclearexcept (int excepts)
{
fenv_t temp;
/* Mask out unsupported bits/exceptions. */
excepts &= FE_ALL_EXCEPT;
/* Bah, we have to clear selected exceptions. Since there is no
`fldsw' instruction we have to do it the hard way. */
__asm__ ("fnstenv %0" : "=m" (*&temp));
/* Clear the relevant bits. */
temp.__status_word &= excepts ^ FE_ALL_EXCEPT;
/* Put the new data in effect. */
__asm__ ("fldenv %0" : : "m" (*&temp));
/* If the CPU supports SSE, we clear the MXCSR as well. */
if ((GLRO(dl_hwcap) & HWCAP_I386_XMM) != 0)
{
unsigned int xnew_exc;
/* Get the current MXCSR. */
__asm__ ("stmxcsr %0" : "=m" (*&xnew_exc));
/* Clear the relevant bits. */
xnew_exc &= ~excepts;
/* Put the new data in effect. */
__asm__ ("ldmxcsr %0" : : "m" (*&xnew_exc));
}
/* Success. */
return 0;
}
#include <shlib-compat.h>
#if SHLIB_COMPAT (libm, GLIBC_2_1, GLIBC_2_2)
strong_alias (__feclearexcept, __old_feclearexcept)
compat_symbol (libm, __old_feclearexcept, feclearexcept, GLIBC_2_1);
#endif
versioned_symbol (libm, __feclearexcept, feclearexcept, GLIBC_2_2);