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c69f960b01
The changes for these functions are different than the others because
the best implementation (sse4_2) requires the generic
implementation as a fallback to be built as well.
Changes are:
1. Add non-multiarch functions for str{c|p}{brk|spn}.c to statically
select the best implementation based on the configured ISA build
level.
2. Add stubs for str{c|p}{brk|spn}-generic and varshift.c to in the
sysdeps/x86_64 directory so that the the sse4 implementation will
have all of its dependencies for the non-multiarch / rtld build
when ISA level >= 2.
3. Add new multiarch/rtld-strcspn.c that just include the
non-multiarch strcspn.c which will in turn select the best
implementation based on the compiled ISA level.
4. Refactor the ifunc selector and ifunc implementation list to use
the ISA level aware wrapper macros that allow functions below the
compiled ISA level (with a guranteed replacement) to be skipped.
Tested with and without multiarch on x86_64 for ISA levels:
{generic, x86-64-v2, x86-64-v3, x86-64-v4}
And m32 with and without multiarch.
140 lines
4.0 KiB
C
140 lines
4.0 KiB
C
/* strspn with SSE4.2 intrinsics
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Copyright (C) 2009-2022 Free Software Foundation, Inc.
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This file is part of the GNU C Library.
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The GNU C Library is free software; you can redistribute it and/or
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modify it under the terms of the GNU Lesser General Public
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License as published by the Free Software Foundation; either
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version 2.1 of the License, or (at your option) any later version.
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The GNU C Library is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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Lesser General Public License for more details.
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You should have received a copy of the GNU Lesser General Public
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License along with the GNU C Library; if not, see
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<https://www.gnu.org/licenses/>. */
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#include <nmmintrin.h>
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#include <string.h>
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#include "varshift.h"
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/* We use 0x12:
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_SIDD_SBYTE_OPS
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| _SIDD_CMP_EQUAL_ANY
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| _SIDD_NEGATIVE_POLARITY
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| _SIDD_LEAST_SIGNIFICANT
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on pcmpistri to compare xmm/mem128
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0 1 2 3 4 5 6 7 8 9 A B C D E F
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X X X X X X X X X X X X X X X X
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against xmm
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0 1 2 3 4 5 6 7 8 9 A B C D E F
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A A A A A A A A A A A A A A A A
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to find out if the first 16byte data element has any non-A byte and
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the offset of the first byte. There are 2 cases:
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1. The first 16byte data element has the non-A byte, including
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EOS, at the offset X.
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2. The first 16byte data element is valid and doesn't have the non-A
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byte.
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Here is the table of ECX, CFlag, ZFlag and SFlag for 2 cases:
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case ECX CFlag ZFlag SFlag
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1 X 1 0/1 0
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2 16 0 0 0
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We exit from the loop for case 1. */
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extern size_t __strspn_generic (const char *, const char *) attribute_hidden;
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#ifndef STRSPN
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# define STRSPN __strspn_sse42
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#endif
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size_t
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__attribute__ ((section (".text.sse4.2")))
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STRSPN (const char *s, const char *a)
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{
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if (*a == 0)
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return 0;
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const char *aligned;
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__m128i mask, maskz, zero;
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unsigned int maskz_bits;
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unsigned int offset = (int) ((size_t) a & 15);
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zero = _mm_set1_epi8 (0);
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if (offset != 0)
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{
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/* Load masks. */
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aligned = (const char *) ((size_t) a & -16L);
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__m128i mask0 = _mm_load_si128 ((__m128i *) aligned);
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maskz = _mm_cmpeq_epi8 (mask0, zero);
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/* Find where the NULL terminator is. */
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maskz_bits = _mm_movemask_epi8 (maskz) >> offset;
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if (maskz_bits != 0)
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{
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mask = __m128i_shift_right (mask0, offset);
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offset = (unsigned int) ((size_t) s & 15);
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if (offset)
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goto start_unaligned;
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aligned = s;
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goto start_loop;
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}
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}
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/* A is aligned. */
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mask = _mm_loadu_si128 ((__m128i *) a);
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/* Find where the NULL terminator is. */
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maskz = _mm_cmpeq_epi8 (mask, zero);
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maskz_bits = _mm_movemask_epi8 (maskz);
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if (maskz_bits == 0)
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{
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/* There is no NULL terminator. Don't use SSE4.2 if the length
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of A > 16. */
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if (a[16] != 0)
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return __strspn_generic (s, a);
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}
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aligned = s;
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offset = (unsigned int) ((size_t) s & 15);
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if (offset != 0)
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{
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start_unaligned:
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/* Check partial string. */
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aligned = (const char *) ((size_t) s & -16L);
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__m128i value = _mm_load_si128 ((__m128i *) aligned);
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__m128i adj_value = __m128i_shift_right (value, offset);
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unsigned int length = _mm_cmpistri (mask, adj_value, 0x12);
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/* No need to check CFlag since it is always 1. */
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if (length < 16 - offset)
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return length;
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/* Find where the NULL terminator is. */
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maskz = _mm_cmpeq_epi8 (value, zero);
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maskz_bits = _mm_movemask_epi8 (maskz) >> offset;
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if (maskz_bits != 0)
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return length;
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aligned += 16;
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}
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start_loop:
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while (1)
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{
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__m128i value = _mm_load_si128 ((__m128i *) aligned);
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unsigned int index = _mm_cmpistri (mask, value, 0x12);
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unsigned int cflag = _mm_cmpistrc (mask, value, 0x12);
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if (cflag)
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return (size_t) (aligned + index - s);
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aligned += 16;
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}
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}
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