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2123d5815e
Nothing uses these wrong values yet, but it fixes a warning due to conflicting definitions in <asm/cputable.h>.
183 lines
4.8 KiB
C
183 lines
4.8 KiB
C
/* Copyright (C) 1999, 2001, 2002, 2006 Free Software Foundation, Inc.
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This file is part of the GNU C Library.
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The GNU C Library is free software; you can redistribute it and/or
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modify it under the terms of the GNU Lesser General Public
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License as published by the Free Software Foundation; either
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version 2.1 of the License, or (at your option) any later version.
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The GNU C Library is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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Lesser General Public License for more details.
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You should have received a copy of the GNU Lesser General Public
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License along with the GNU C Library; if not, write to the Free
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Software Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA
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02111-1307 USA. */
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/*
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* Powerpc Feature masks for the Aux Vector Hardware Capabilities (AT_HWCAP).
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* This entry is copied to _dl_hwcap or rtld_global._dl_hwcap during startup.
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* The following must match the kernels linux/asm/cputable.h.
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*/
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#define PPC_FEATURE_32 0x80000000 /* 32-bit mode. */
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#define PPC_FEATURE_64 0x40000000 /* 64-bit mode. */
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#define PPC_FEATURE_601_INSTR 0x20000000 /* 601 chip, Old POWER ISA. */
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#define PPC_FEATURE_HAS_ALTIVEC 0x10000000 /* SIMD/Vector Unit. */
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#define PPC_FEATURE_HAS_FPU 0x08000000 /* Floating Point Unit. */
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#define PPC_FEATURE_HAS_MMU 0x04000000 /* Memory Management Unit. */
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#define PPC_FEATURE_HAS_4xxMAC 0x02000000 /* 4xx Multiply Accumulator. */
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#define PPC_FEATURE_UNIFIED_CACHE 0x01000000 /* Unified I/D cache. */
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#define PPC_FEATURE_HAS_SPE 0x00800000 /* Signal Processing ext. */
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#define PPC_FEATURE_HAS_EFP_SINGLE 0x00400000 /* SPE Float. */
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#define PPC_FEATURE_HAS_EFP_DOUBLE 0x00200000 /* SPE Double. */
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#define PPC_FEATURE_NO_TB 0x00100000 /* 601/403gx have no timebase */
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#define PPC_FEATURE_POWER4 0x00080000 /* POWER4 ISA 2.00 */
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#define PPC_FEATURE_POWER5 0x00040000 /* POWER5 ISA 2.02 */
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#define PPC_FEATURE_POWER5_PLUS 0x00020000 /* POWER5+ ISA 2.03 */
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#define PPC_FEATURE_CELL_BE 0x00010000 /* CELL Broadband Engine */
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#define PPC_FEATURE_BOOKE 0x00008000
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#define PPC_FEATURE_SMT 0x00004000 /* Simultaneous Multi-Threading */
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#define PPC_FEATURE_ICACHE_SNOOP 0x00002000
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#define PPC_FEATURE_ARCH_2_05 0x00001000 /* ISA 2.05 */
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#define PPC_FEATURE_PA6T 0x00000800 /* PA Semi 6T Core */
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#define PPC_FEATURE_HAS_DFP 0x00000400 /* Decimal FP Unit */
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#define PPC_FEATURE_POWER6_EXT 0x00000200 /* P6 + mffgpr/mftgpr */
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#define PPC_FEATURE_ARCH_2_06 0x00000100 /* ISA 2.06 */
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#define PPC_FEATURE_HAS_VSX 0x00000080 /* P7 Vector Extension. */
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#define PPC_FEATURE_970 (PPC_FEATURE_POWER4 + PPC_FEATURE_HAS_ALTIVEC)
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#ifdef __ASSEMBLER__
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/* Symbolic names for the registers. The only portable way to write asm
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code is to use number but this produces really unreadable code.
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Therefore these symbolic names. */
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/* Integer registers. */
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#define r0 0
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#define r1 1
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#define r2 2
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#define r3 3
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#define r4 4
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#define r5 5
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#define r6 6
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#define r7 7
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#define r8 8
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#define r9 9
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#define r10 10
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#define r11 11
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#define r12 12
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#define r13 13
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#define r14 14
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#define r15 15
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#define r16 16
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#define r17 17
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#define r18 18
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#define r19 19
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#define r20 20
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#define r21 21
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#define r22 22
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#define r23 23
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#define r24 24
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#define r25 25
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#define r26 26
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#define r27 27
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#define r28 28
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#define r29 29
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#define r30 30
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#define r31 31
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/* Floating-point registers. */
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#define fp0 0
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#define fp1 1
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#define fp2 2
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#define fp3 3
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#define fp4 4
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#define fp5 5
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#define fp6 6
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#define fp7 7
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#define fp8 8
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#define fp9 9
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#define fp10 10
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#define fp11 11
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#define fp12 12
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#define fp13 13
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#define fp14 14
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#define fp15 15
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#define fp16 16
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#define fp17 17
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#define fp18 18
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#define fp19 19
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#define fp20 20
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#define fp21 21
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#define fp22 22
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#define fp23 23
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#define fp24 24
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#define fp25 25
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#define fp26 26
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#define fp27 27
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#define fp28 28
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#define fp29 29
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#define fp30 30
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#define fp31 31
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/* Condition code registers. */
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#define cr0 0
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#define cr1 1
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#define cr2 2
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#define cr3 3
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#define cr4 4
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#define cr5 5
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#define cr6 6
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#define cr7 7
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/* Vector registers. */
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#define v0 0
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#define v1 1
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#define v2 2
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#define v3 3
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#define v4 4
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#define v5 5
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#define v6 6
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#define v7 7
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#define v8 8
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#define v9 9
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#define v10 10
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#define v11 11
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#define v12 12
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#define v13 13
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#define v14 14
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#define v15 15
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#define v16 16
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#define v17 17
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#define v18 18
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#define v19 19
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#define v20 20
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#define v21 21
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#define v22 22
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#define v23 23
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#define v24 24
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#define v25 25
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#define v26 26
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#define v27 27
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#define v28 28
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#define v29 29
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#define v30 30
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#define v31 31
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#define VRSAVE 256
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#ifdef __ELF__
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/* This seems to always be the case on PPC. */
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#define ALIGNARG(log2) log2
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/* For ELF we need the `.type' directive to make shared libs work right. */
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#define ASM_TYPE_DIRECTIVE(name,typearg) .type name,typearg;
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#define ASM_SIZE_DIRECTIVE(name) .size name,.-name
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#endif /* __ELF__ */
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#endif /* __ASSEMBLER__ */
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